pub fn check_logic_loops(uut: &dyn Block) -> Result<(), CheckError>
Expand description

Check a circuit for logical loops. Logic loops are circular dependencies in the logic that are neither simulateable nor synthesizable. For example

use rust_hdl::prelude::*;
use rust_hdl::core::check_logic_loops::check_logic_loops;
 
#[derive(LogicBlock, Default)]
struct Circle {
   in1: Signal<In, Bit>,
   loc: Signal<Local, Bit>,
   out: Signal<Out, Bit>,
}
 
impl Logic for Circle {
    #[hdl_gen]
    fn update(&mut self) {
        self.loc.next = self.out.val();
        self.out.next = self.loc.val();  // <-- head scratcher...
    }
}
 
let mut uut = Circle::default(); uut.connect_all();
assert!(check_logic_loops(&uut).is_err());