rust_hdl_hls/
expander.rs

1use crate::bus::{FIFOReadController, FIFOWriteController};
2use rust_hdl_core::prelude::*;
3use rust_hdl_widgets::prelude::*;
4
5#[derive(LogicBlock)]
6pub struct Expander<const DN: usize, const DW: usize> {
7    pub bus_read: FIFOReadController<Bits<DN>>,
8    pub bus_write: FIFOWriteController<Bits<DW>>,
9    pub clock: Signal<In, Clock>,
10    expander: FIFOExpanderN<DN, DW>,
11}
12
13impl<const DW: usize, const DN: usize> Logic for Expander<DN, DW> {
14    #[hdl_gen]
15    fn update(&mut self) {
16        clock!(self, clock, expander);
17        // Connect the HLS read bus to the expanders native signals
18        self.bus_read.read.next = self.expander.read.val();
19        self.expander.empty.next = self.bus_read.empty.val();
20        self.expander.data_in.next = self.bus_read.data.val();
21        // Connect the HLS write bus to the expanders native signals
22        self.expander.full.next = self.bus_write.full.val();
23        self.bus_write.data.next = self.expander.data_out.val();
24        self.bus_write.write.next = self.expander.write.val();
25    }
26}
27
28impl<const DW: usize, const DN: usize> Expander<DN, DW> {
29    pub fn new(order: WordOrder) -> Self {
30        Self {
31            bus_read: Default::default(),
32            bus_write: Default::default(),
33            clock: Default::default(),
34            expander: FIFOExpanderN::new(order),
35        }
36    }
37}
rust_hdl_hls/expander.rs

rust_hdl_hls/
expander.rs
