Trait VerilogVisitor

Source

pub trait VerilogVisitor {
Show 26 methods    // Provided methods
    fn visit_block(&mut self, b: &VerilogBlock) { ... }
    fn visit_statement(&mut self, s: &VerilogStatement) { ... }
    fn visit_index_assignment(&mut self, a: &VerilogIndexAssignment) { ... }
    fn visit_loop(&mut self, a: &VerilogLoop) { ... }
    fn visit_slice_assignment(
        &mut self,
        base: &VerilogExpression,
        width: &usize,
        offset: &VerilogExpression,
        replacement: &VerilogExpression,
    ) { ... }
    fn visit_conditional(&mut self, c: &VerilogConditional) { ... }
    fn visit_block_or_conditional(&mut self, c: &VerilogBlockOrConditional) { ... }
    fn visit_match(&mut self, m: &VerilogMatch) { ... }
    fn visit_comment(&mut self, _c: &str) { ... }
    fn visit_signal(&mut self, _c: &str) { ... }
    fn visit_literal(&mut self, _a: &VerilogLiteral) { ... }
    fn visit_link(&mut self, _c: &[VerilogLink]) { ... }
    fn visit_case(&mut self, c: &VerilogCase) { ... }
    fn visit_lhs_expression(&mut self, e: &VerilogExpression) { ... }
    fn visit_expression(&mut self, e: &VerilogExpression) { ... }
    fn visit_binop(
        &mut self,
        l: &VerilogExpression,
        o: &VerilogOp,
        r: &VerilogExpression,
    ) { ... }
    fn visit_unop(&mut self, o: &VerilogOpUnary, ex: &VerilogExpression) { ... }
    fn visit_assignment(&mut self, l: &VerilogExpression, r: &VerilogExpression) { ... }
    fn visit_paren(&mut self, p: &VerilogExpression) { ... }
    fn visit_cast(&mut self, a: &VerilogExpression, b: &usize) { ... }
    fn visit_signed(&mut self, a: &VerilogExpression) { ... }
    fn visit_unsigned(&mut self, a: &VerilogExpression) { ... }
    fn visit_index(&mut self, a: &VerilogExpression, b: &VerilogExpression) { ... }
    fn visit_slice(
        &mut self,
        a: &VerilogExpression,
        b: &usize,
        c: &VerilogExpression,
    ) { ... }
    fn visit_slice_replace(
        &mut self,
        a: &VerilogExpression,
        b: &usize,
        c: &VerilogExpression,
        d: &VerilogExpression,
    ) { ... }
    fn visit_index_replace(
        &mut self,
        a: &VerilogExpression,
        b: &VerilogExpression,
        c: &VerilogExpression,
    ) { ... }
}