Skip to main content

rucc_regalloc/
assign.rs

1//! Which register each value lives in, and which values live on the stack instead.
2//!
3//! Design: `spec/10-backend.md` section 10.4.
4//!
5//! This is the `-O0` allocator's decision and nothing else. It is linear scan over the line
6//! [`crate::order`] lays the function out in: the values are taken in the order they are written,
7//! each is given a register that nothing else live at the same time is in, and when there is no
8//! such register one of the values in flight goes to the stack instead. There is no splitting and
9//! no coalescing, so a value gets one place for the whole of its range and keeps it. That produces
10//! mediocre code quickly, which is what `-O0` is for, and the allocator that produces good code
11//! slowly is a separate one, in M4.
12//!
13//! Which value is sent to the stack is the one whose range ends last, counting the value being
14//! placed among the candidates. A value wanted for a long time is the cheapest to spill per
15//! instruction it frees a register over, and it is the only heuristic here. What is picked is
16//! really a register and not a value, since two values that are never both wanted share one, and
17//! then every value in that register which is in this one's way goes.
18//!
19//! # Where the line is not the function
20//!
21//! The line is the order the blocks arrived in, and `crate::layout` puts them in a different one
22//! afterwards, so being between two blocks on the line says nothing about being between them in
23//! the code. A value live in one loop and live again in a later one is written down with
24//! everything in between inside the interval around it, and it is not live in any of it.
25//!
26//! Which is why what decides anything here is the area from `crate::live`, and the interval is
27//! only the sweep's bookkeeping: it says which values to compare and the areas say which of them
28//! actually collide. Three loops one after another in a function put a dozen values in flight at
29//! the same instant of the line and never at the same instant of the program, and asking the
30//! interval would spill the one this loop is walking for the sake of eleven values in the other
31//! two. tamnd/rucc#982.
32//!
33//! The same holds for a register an instruction insists on. A call destroys seven registers on
34//! x86-64, and a function whose blocks happen to arrive with a call written between the blocks of
35//! a loop would otherwise lose all seven for every value in that loop, for a call the loop never
36//! reaches, so that question is asked of the area and not of the interval either.
37//!
38//! Allowed is not the same as free, though, so the registers are offered in two passes. First the
39//! ones nothing insists on anywhere the range reaches, then the ones something insists on somewhere
40//! the value never goes. The second kind costs: the instruction that insists has to be handed the
41//! register in the end, and what hands it over is a move. A function that gives a value back has an
42//! operand fixed to `rax` at the end of it, and putting the busiest value in the function in `rax`
43//! because no path reaches the return with it live buys one register and pays a move at every
44//! return. Ordering the two passes is what keeps the register and drops the moves.
45//!
46//! The hint below is asked the first question rather than the second for the same reason. A value
47//! taking the register its own operand asked for saves a move, and taking one somebody else's
48//! operand asked for somewhere it never goes costs one, so a hint is worth following when the
49//! register is clear and not worth following when it is merely allowed.
50//!
51//! # What it does with a register an instruction insists on
52//!
53//! Two things. It stays out of that register for everybody else, and it tries that register first
54//! for the value the operand names. A division wants its dividend in `rax`, so `rax` is
55//! unavailable to every other value that is live where the division reads, and it is the first
56//! register offered to the dividend itself. When the dividend gets it there is no move on the way
57//! in, and when it does not the rewrite writes one and nothing else changes.
58//!
59//! That second half is the hint, and without it the register an instruction insists on is the one
60//! register the value in it can never have, since the value's own operand is what makes the
61//! register look busy. The effect is largest on returns, because a function that gives a value
62//! back has an operand fixed to `rax` at the end of it and most functions give a value back.
63//!
64//! What makes the hint safe is asking about the register at each of the instruction's two points
65//! rather than across the whole of it. An instruction reads at the first and writes at the second,
66//! so a register it insists on is one value's at the first, another value's at the second, and
67//! nobody else's at either. A division reads its dividend from `rax` and writes its quotient to
68//! `rax`, and those are different values that can both live there. A value passed to a call in
69//! `rdi` and wanted again afterwards cannot, because nothing writes `rdi` at the second point and
70//! a register the call does not write is a register the call is assumed to destroy.
71//!
72//! An operand that has to be in memory is the other way round. The value it names goes on the
73//! stack whatever else is true of it, because that is the only place the instruction could read it
74//! from.
75//!
76//! # What it does with a two address instruction
77//!
78//! An `add` on x86-64 writes one of the registers it reads, which the operand says as a reuse of
79//! another operand. The rewrite can always make that true by copying the source into the
80//! destination first, but only if the destination is a register the instruction does not otherwise
81//! read, so a value written by a reuse is treated here as live from where the instruction reads
82//! rather than from where it writes. Then the copy is always safe.
83//!
84//! The copy is also usually unnecessary, and the one place this looks past the interval it is
85//! placing is to see that: if the value being reused is read here for the last time and the value
86//! being written starts here, the second may have the first's register, and the instruction is
87//! already two address without anything being moved anywhere. That is the whole of the coalescing
88//! this allocator does, and it is worth the dozen lines, because otherwise every piece of
89//! arithmetic in the output carries a move in front of it.
90//!
91//! Both halves of that are needed. The second is the one a loop breaks: an instruction at the
92//! bottom of a loop can write a value the top of the loop reads on the next turn, and such a value
93//! is live on the way into the instruction that writes it as well as after. It is then wanted at
94//! the same time as the value it reuses, whatever is true of the reuse, and giving it the same
95//! register makes an addition read the answer to the last one instead of its own operand.
96//!
97//! # What it does not do
98//!
99//! It does not touch the function. What comes out is a table saying where each value went, and the
100//! pass that rewrites the operands and writes the moves reads it. Keeping the decision and the
101//! rewrite apart is what lets the decision be checked by looking at it, and it is the shape
102//! `spec/10-backend.md` section 10.4 asks for: an allocator is a function from a program to an
103//! assignment and the moves that make it true.
104
105use std::cmp::Reverse;
106
107use rucc_mir::{Constraint, Flags, Func, Inst, Operand, Reg, Role};
108use rucc_target::{PhysReg, RegClass};
109
110use crate::live::{Area, Live, Range};
111use crate::order::{Order, Point};
112
113/// Where a value lives.
114#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
115pub enum Place {
116    /// In a register, for the whole of its range.
117    Reg(PhysReg),
118    /// In a slot of the frame, which is what a value the allocator ran out of registers for gets,
119    /// and what a value an instruction can only read from memory gets.
120    Slot(u32),
121}
122
123/// What the allocator is allowed to use.
124///
125/// The order is the calling convention's, because which register to hand out first follows from
126/// which ones a call destroys, and `rucc-target` is where a convention says so. The scratch
127/// registers are held back out of the order and are what a spilled value is read into at each
128/// instruction that wants it, so a class needs as many of them as one of its instructions has
129/// register operands. Nothing here uses them, since a spilled value is only read once the rewrite
130/// is writing the instruction that reads it, but they are held back here because this is what
131/// decides what everything else may have.
132#[derive(Debug, Clone, Default)]
133pub struct Env {
134    classes: Vec<Class>,
135}
136
137/// What one class of registers offers.
138#[derive(Debug, Clone, Default)]
139struct Class {
140    order: Vec<PhysReg>,
141    scratch: Vec<PhysReg>,
142}
143
144impl Env {
145    /// An environment offering nothing, which is what a target that has said nothing offers.
146    #[must_use]
147    pub fn new() -> Self {
148        Self::default()
149    }
150
151    /// The same environment, with that class described.
152    #[must_use]
153    pub fn with(mut self, class: RegClass, order: &[PhysReg], scratch: &[PhysReg]) -> Self {
154        let index = usize::from(class.number());
155        if self.classes.len() <= index {
156            self.classes.resize(index + 1, Class::default());
157        }
158        self.classes[index] = Class { order: order.to_vec(), scratch: scratch.to_vec() };
159        self
160    }
161
162    /// The registers it may hand out in a class, in the order it prefers them.
163    #[must_use]
164    pub fn order(&self, class: RegClass) -> &[PhysReg] {
165        self.classes.get(usize::from(class.number())).map_or(&[], |class| &class.order)
166    }
167
168    /// The registers it may hand out, by class number, empty for a class it says nothing about.
169    pub(crate) fn offered(&self) -> impl Iterator<Item = &[PhysReg]> + '_ {
170        self.classes.iter().map(|class| class.order.as_slice())
171    }
172
173    /// The registers held back in a class for reading a spilled value into.
174    #[must_use]
175    pub fn scratch(&self, class: RegClass) -> &[PhysReg] {
176        self.classes.get(usize::from(class.number())).map_or(&[], |class| &class.scratch)
177    }
178}
179
180/// Where every value in a function went.
181#[derive(Debug, Clone)]
182pub struct Assignment {
183    places: Vec<Option<Place>>,
184    slots: Vec<RegClass>,
185    commuted: Vec<Inst>,
186}
187
188impl Assignment {
189    /// Records that the sources of `inst` are to be swapped, for an answer written over the second.
190    pub(crate) fn commute(&mut self, inst: Inst) {
191        self.commuted.push(inst);
192    }
193
194    /// An assignment that says nothing yet about a function with that many values.
195    ///
196    /// This and [`Assignment::put`] and [`Assignment::take_slot`] are how an allocator says what
197    /// it decided. There will be a second one in M4 and it will not reach its answer this way, so
198    /// what an assignment is has to be separable from how this file arrives at one, and the
199    /// checker in [`crate::check`] reads an assignment without caring which allocator wrote it.
200    #[must_use]
201    pub fn empty(vregs: usize) -> Self {
202        Self { places: vec![None; vregs], slots: Vec::new(), commuted: Vec::new() }
203    }
204
205    /// The two address instructions whose answer went into the register of their second source.
206    ///
207    /// Each has to have its two sources swapped before anything reads the assignment against the
208    /// function, which [`crate::run`] does. After that the answer reuses what is then the first
209    /// source, as every two address instruction does. tamnd/rucc#1895.
210    #[must_use]
211    pub fn commuted(&self) -> &[Inst] {
212        &self.commuted
213    }
214
215    /// Records where a value went.
216    ///
217    /// # Panics
218    ///
219    /// Panics on a physical register, which is somewhere already, and on a virtual one the
220    /// function never handed out.
221    pub fn put(&mut self, reg: Reg, place: Place) {
222        self.places[index(reg)] = Some(place);
223    }
224
225    /// Takes a slot of the frame, of that class, and gives back which one it is.
226    ///
227    /// # Panics
228    ///
229    /// Panics past four billion slots, which is a frame no machine has room for.
230    pub fn take_slot(&mut self, class: RegClass) -> u32 {
231        let slot = u32::try_from(self.slots.len()).expect("too many spilled values");
232        self.slots.push(class);
233        slot
234    }
235
236    /// Where a value lives, or `None` for a virtual register this function never mentions and for
237    /// a physical one, which is already where it is.
238    #[must_use]
239    pub fn place(&self, reg: Reg) -> Option<Place> {
240        self.places.get(usize::try_from(reg.number()?).ok()?).copied().flatten()
241    }
242
243    /// The class of each slot of the frame, which is what says how wide it has to be.
244    #[must_use]
245    pub fn slots(&self) -> &[RegClass] {
246        &self.slots
247    }
248
249    /// Every value that went somewhere, and where it went.
250    ///
251    /// The assignment read the other way round, which is what a caller wants when the question is
252    /// about the places rather than about the values. The stack slot allocator asks it that way,
253    /// since what it needs is which value is in each slot and the assignment is stored by value.
254    pub fn placed(&self) -> impl Iterator<Item = (Reg, Place)> + '_ {
255        self.places.iter().enumerate().filter_map(|(number, place)| {
256            let number = u32::try_from(number).ok()?;
257            Some((Reg::virtual_reg(number), (*place)?))
258        })
259    }
260
261    /// How many values went to the stack.
262    #[must_use]
263    pub fn spilled(&self) -> usize {
264        self.slots.len()
265    }
266
267    /// Puts a value on the stack, in a slot of its own.
268    pub(crate) fn spill(&mut self, reg: Reg, class: RegClass) {
269        let slot = self.take_slot(class);
270        self.put(reg, Place::Slot(slot));
271    }
272}
273
274/// One value waiting for a place.
275#[derive(Debug, Clone, Copy)]
276struct Interval<'a> {
277    reg: Reg,
278    class: RegClass,
279    /// The interval around the area, which is what the sweep below reads and what says which value
280    /// is wanted for longest when one of them has to go.
281    range: Range,
282    /// Everywhere the value is really live, which is what says whether two of them fit in one
283    /// register.
284    area: Area<'a>,
285}
286
287/// One value that has a register, for as long as it still wants it.
288#[derive(Debug, Clone, Copy)]
289struct Held<'a> {
290    reg: Reg,
291    class: RegClass,
292    range: Range,
293    area: Area<'a>,
294    at: PhysReg,
295    /// How many values were given a register before this one, which is the order the values in
296    /// flight are looked at in when one register has to be taken back.
297    since: usize,
298}
299
300/// The values that have a register, kept by the register each is in.
301///
302/// Nearly every question asked of them is about one register: whether it is free for an interval,
303/// or whether a value is still in it. They used to be one list walked from the start for every
304/// register tried, and on a function with a thousand values in flight that walk was most of the
305/// time the allocator took. Keeping them by register means asking about one reads only the values
306/// that are in it. Registers are numbered within their class, so two classes can share a list and
307/// the class is still checked.
308#[derive(Default)]
309struct Active<'a> {
310    by: Vec<Vec<Held<'a>>>,
311    /// For each register, a point no value in it ends before. Values are let go of at the start of
312    /// every interval, and most of those times nothing in most registers has ended, so a register
313    /// whose values all end at or after the point is not walked at all.
314    soonest: Vec<Point>,
315    /// How many values have been given a register so far.
316    count: usize,
317}
318
319impl<'a> Active<'a> {
320    /// The values in one register, in the order they were given it.
321    fn at(&self, at: PhysReg) -> &[Held<'a>] {
322        self.by.get(usize::from(at.number())).map_or(&[], Vec::as_slice)
323    }
324
325    fn push(&mut self, reg: Reg, class: RegClass, range: Range, area: Area<'a>, at: PhysReg) {
326        let slot = usize::from(at.number());
327        if self.by.len() <= slot {
328            self.by.resize_with(slot + 1, Vec::new);
329            self.soonest.resize(slot + 1, Point::MAX);
330        }
331        self.by[slot].push(Held { reg, class, range, area, at, since: self.count });
332        self.soonest[slot] = self.soonest[slot].min(range.end);
333        self.count += 1;
334    }
335
336    /// Lets go of every value whose interval ends before a point.
337    ///
338    /// Taking a value out of a register anywhere else leaves that register's soonest end where it
339    /// was, which is still a point nothing in it ends before, so only this and [`Active::push`]
340    /// have to keep it.
341    fn expire(&mut self, point: Point) {
342        for (held, soonest) in self.by.iter_mut().zip(&mut self.soonest) {
343            if *soonest >= point {
344                continue;
345            }
346            held.retain(|held| held.range.end >= point);
347            *soonest = held.iter().map(|held| held.range.end).min().unwrap_or(Point::MAX);
348        }
349    }
350}
351
352/// A register an instruction insists on, and where it insists on it.
353#[derive(Debug, Clone, Copy)]
354struct Blocked {
355    class: RegClass,
356    at: PhysReg,
357    /// One of the instruction's two points. Every register an instruction insists on has an entry
358    /// at each of them, because a register held at one of the two is a register nothing else may
359    /// be in across the instruction.
360    point: Point,
361    /// The one value that may be in it there, which is the value of an operand the instruction
362    /// reads at that point or writes at it. `None` means nothing may: an operand naming a physical
363    /// register outright claims it against everything, and a point no operand covers is a point
364    /// the instruction has the register to itself at.
365    by: Option<Reg>,
366    /// The byte the instruction writes the register from, when it leaves the bottom of it alone,
367    /// which is what a call does to a register AArch64 keeps the low half of. A value that fits
368    /// below it is not in the way. See [`Constraint::Above`].
369    above: Option<u8>,
370}
371
372impl Blocked {
373    /// Whether this is in the way of a value of that width, which it is unless it writes only
374    /// above everything the value takes.
375    fn reaches(&self, width: Option<u8>) -> bool {
376        match (self.above, width) {
377            (Some(above), Some(width)) => width > above,
378            _ => true,
379        }
380    }
381}
382
383/// A value written into the register another operand of the same instruction was read from.
384#[derive(Debug, Clone, Copy)]
385pub(crate) struct Reuse {
386    /// The value being read, which is the one whose register would do.
387    pub(crate) source: Reg,
388    /// The other value the instruction reads, when the instruction reads the two either way round
389    /// and so could write its answer over this one instead.
390    pub(crate) second: Option<Reg>,
391    /// Where the instruction reads it.
392    pub(crate) at: Point,
393    /// The instruction, which is swapped round if the answer takes the second value's register.
394    pub(crate) inst: Inst,
395}
396
397/// Decides where every value in a function lives.
398///
399/// # Panics
400///
401/// Panics if a class has no registers to hand out and something in the function is in that class,
402/// since that is a target description that does not describe the target the function is for.
403#[must_use]
404pub fn assign(func: &Func, order: &Order, live: &Live, env: &Env) -> Assignment {
405    let blocked = blocked(func, order);
406    let forced = forced(func);
407    let reuses = reuses(func, order);
408    let hints = hints(func);
409    let passed = passed(func);
410
411    let mut intervals = Vec::with_capacity(func.vregs());
412    for (number, reuse) in reuses.iter().enumerate() {
413        let reg = Reg::virtual_reg(u32::try_from(number).expect("a register number"));
414        let (Some(mut area), Some(class)) = (live.area(reg), func.class_of(reg)) else {
415            continue;
416        };
417        if let Some(reuse) = reuse {
418            area = area.with(reuse.at);
419        }
420        intervals.push(Interval { reg, class, range: area.hull(), area });
421    }
422    intervals.sort_by_key(|interval| (interval.range.start, interval.reg));
423
424    let mut assignment = Assignment::empty(func.vregs());
425    let mut active = Active::default();
426    for interval in intervals {
427        active.expire(interval.range.start);
428        if forced.contains(&interval.reg) {
429            assignment.spill(interval.reg, interval.class);
430            continue;
431        }
432        // A class with no order is one the target says nothing allocates from, which on x86-64 is
433        // the x87 stack. A value of such a class is a mistake at the point it was made rather than
434        // a value with nowhere to go: what the target means is that the value lives in memory and
435        // that whatever operates on it takes an address. See `ClassInfo::allocatable`.
436        assert!(
437            !env.order(interval.class).is_empty(),
438            "a value in class {}, which the target hands out no registers from",
439            interval.class.number()
440        );
441        let reuse = reuses[index(interval.reg)];
442        let coalesced = |source| coalesce(&assignment, &active, &blocked, live, interval, source);
443        let first = reuse.and_then(|reuse| coalesced(reuse.source));
444        let second = reuse.and_then(|reuse| reuse.second).and_then(coalesced);
445        // An instruction that reads its sources either way round can write over the second one
446        // instead, which is what it needs when the first is read again later and the second is
447        // not. When both would do, the first is kept unless only the second is where something
448        // wants the answer, which saves the move in front of that reader.
449        //
450        // A block the answer is passed to wants it where that block's parameter already is. That
451        // has to count as much as an instruction asking for a register. A sum a loop carries is
452        // passed back to the parameter it was read from, and taking the register of the other
453        // source because the sum is also printed at the end moves the copy onto the back edge,
454        // where it runs every turn instead of once.
455        let hinted_at = |at: Option<PhysReg>| {
456            at.is_some_and(|at| {
457                hints[index(interval.reg)].contains(&at)
458                    || passed[index(interval.reg)]
459                        .iter()
460                        .any(|&param| assignment.place(param) == Some(Place::Reg(at)))
461            })
462        };
463        let commute =
464            second.is_some() && (first.is_none() || hinted_at(second) && !hinted_at(first));
465        let two_address = if commute { second } else { first };
466        if let (true, Some(reuse)) = (commute, reuse) {
467            assignment.commuted.push(reuse.inst);
468        }
469        // The reuse comes first, because a two address instruction that has to copy its left
470        // operand in pays for the copy whatever the hint says, and taking the hint here would buy
471        // one move at the cost of another.
472        let hinted = hints[index(interval.reg)].iter().copied().find(|&at| {
473            env.order(interval.class).contains(&at)
474                && available(&active, &blocked, interval, at, None, Want::Clear)
475        });
476        // A register nobody else wants anywhere near this value first, and one somebody wants
477        // somewhere the value never goes only when there is no other. Both are correct and the
478        // second is the worse buy, since the instruction that wants it has to be handed it and
479        // whatever this value is doing there has to move out of the way first.
480        let scan = |want| {
481            env.order(interval.class)
482                .iter()
483                .copied()
484                .find(|&at| available(&active, &blocked, interval, at, None, want))
485        };
486        let chosen =
487            two_address.or(hinted).or_else(|| scan(Want::Clear)).or_else(|| scan(Want::Allowed));
488        match chosen {
489            Some(at) => {
490                assignment.places[index(interval.reg)] = Some(Place::Reg(at));
491                active.push(interval.reg, interval.class, interval.range, interval.area, at);
492            }
493            None => spill_one(&mut assignment, &mut active, &blocked, interval),
494        }
495    }
496    assignment
497}
498
499/// How much a register suits an interval.
500#[derive(Debug, Clone, Copy, PartialEq, Eq)]
501pub(crate) enum Want {
502    /// Nothing insists on it anywhere the range reaches, so taking it costs nobody anything.
503    Clear,
504    /// Something insists on it somewhere the range reaches and nowhere the value is live, so taking
505    /// it is allowed and may still cost: the instruction that insists wants the register for a
506    /// value of its own, and that value now has to be moved into it.
507    Allowed,
508}
509
510/// Every register every instruction in the function insists on, arranged to be asked about.
511///
512/// Built once and never changed afterwards, and there is only one question ever asked of it: of the
513/// constraints naming one register of one class, is there one at a point some interval covers. So
514/// the entries are ordered by the register they name and then by the point, and the question is a
515/// binary search for the start of the interval followed by a walk that stops at its end.
516///
517/// It used to be a flat list walked from one end for every candidate register of every interval,
518/// which is quadratic in the size of a function and is most of the compile on a large one. See
519/// tamnd/rucc#1003 for the profile that found it.
520pub(crate) struct Blocks {
521    /// The constraints, sorted by class, then by register, then by point.
522    all: Vec<Blocked>,
523    /// How many bytes of its register each virtual register's value takes, by number, which is
524    /// what [`Blocked::reaches`] asks.
525    widths: Vec<Option<u8>>,
526}
527
528impl Blocks {
529    /// Whether an instruction insists on `at` where a value over `area` would be in its way: at any
530    /// point the value's range reaches when the register is wanted clear, and only at a point the
531    /// value is live at when it is merely wanted allowed. The value's own operands never count.
532    pub(crate) fn insists(
533        &self,
534        reg: Reg,
535        class: RegClass,
536        area: Area<'_>,
537        range: Range,
538        at: PhysReg,
539        want: Want,
540    ) -> bool {
541        self.over(class, at, range).any(|one| {
542            one.by != Some(reg)
543                && one.reaches(self.width(reg))
544                && (want == Want::Clear || area.covers(one.point))
545        })
546    }
547
548    /// How many bytes of its register a value takes, or `None` for all of it.
549    fn width(&self, reg: Reg) -> Option<u8> {
550        let number = usize::try_from(reg.number()?).ok()?;
551        self.widths.get(number).copied().flatten()
552    }
553
554    /// Every register an instruction takes for itself where no value may be in it, with the class
555    /// and the point, sorted by class, then by register, then by point.
556    ///
557    /// Not one it writes only the top of, since a value narrow enough may still be in that.
558    pub(crate) fn taken(&self) -> impl Iterator<Item = (RegClass, PhysReg, Point)> + '_ {
559        self.all
560            .iter()
561            .filter(|one| one.by.is_none() && one.above.is_none())
562            .map(|one| (one.class, one.at, one.point))
563    }
564
565    /// The constraints on one register of one class at the points an interval covers.
566    ///
567    /// Both ends of the walk come from the ordering rather than from a test, so what comes back is
568    /// exactly what the old `covers` call used to keep and in the same order.
569    fn over(
570        &self,
571        class: RegClass,
572        at: PhysReg,
573        range: Range,
574    ) -> impl Iterator<Item = &Blocked> + '_ {
575        let first = self
576            .all
577            .partition_point(|one| (one.class, one.at, one.point) < (class, at, range.start));
578        self.all[first..]
579            .iter()
580            .take_while(move |one| one.class == class && one.at == at && one.point <= range.end)
581    }
582}
583
584/// Whether a register is one this interval could have.
585///
586/// The exception is the value a reuse is coalescing with, which holds the register right up to the
587/// point the new value takes it over and is the one thing that may overlap.
588///
589/// The sweep only keeps a value in `active` while the interval around it reaches this one, so the
590/// areas still have to be compared: two values whose intervals cross can have holes that let them
591/// share a register anyway, which on a function with several loops in it is most of them.
592fn available(
593    active: &Active<'_>,
594    blocked: &Blocks,
595    interval: Interval<'_>,
596    at: PhysReg,
597    except: Option<Reg>,
598    want: Want,
599) -> bool {
600    let taken = active.at(at).iter().any(|held| {
601        held.class == interval.class
602            && Some(held.reg) != except
603            && held.area.overlaps(interval.area)
604    });
605    let width = blocked.width(interval.reg);
606    let insisted = blocked.over(interval.class, at, interval.range).any(|one| {
607        one.by != Some(interval.reg)
608            && one.reaches(width)
609            && (want == Want::Clear || interval.area.covers(one.point))
610    });
611    !taken && !insisted
612}
613
614/// The register the value being reused is in, when the value being written is never live at the
615/// same time as it and the register is otherwise free.
616fn coalesce(
617    assignment: &Assignment,
618    active: &Active<'_>,
619    blocked: &Blocks,
620    live: &Live,
621    interval: Interval<'_>,
622    source: Reg,
623) -> Option<PhysReg> {
624    let Some(Place::Reg(at)) = assignment.place(source) else { return None };
625    active.at(at).iter().find(|held| held.reg == source)?;
626    // The two have to be apart everywhere, asked of the areas liveness worked out and without the
627    // point the reuse adds, since that point is the one they are allowed to share.
628    //
629    // That covers both ways it can go wrong. A value read again later needs its register after
630    // this instruction would have overwritten it. And a value being written that is live where the
631    // instruction reads already is what a loop carrying its own result round looks like: the
632    // instruction writes it at the bottom and the top of the loop reads what the last turn wrote.
633    // Either way the two are wanted at once, and no register holds both.
634    //
635    // It used to be asked of the end of the interval around the value being read, and that is not
636    // the same question. A block laid out after this instruction where the value is still live,
637    // such as the default arm of a `switch` that joins back in above it, stretches the interval
638    // past this point when nothing past it reads the value at all. The sum a loop carries round
639    // then went into a new register and was copied back at the bottom of every turn.
640    // tamnd/rucc#1965.
641    let free = available(active, blocked, interval, at, Some(source), Want::Allowed);
642    (apart(live, source, interval.reg) && free).then_some(at)
643}
644
645/// Whether two values are never live at the same time, going by what liveness worked out.
646pub(crate) fn apart(live: &Live, first: Reg, second: Reg) -> bool {
647    match (live.area(first), live.area(second)) {
648        (Some(first), Some(second)) => !first.overlaps(second),
649        _ => false,
650    }
651}
652
653/// Sends values to the stack to free a register: the ones wanted for longest, since a register
654/// held that long pays for itself over the most instructions.
655///
656/// What is chosen is a register rather than a value, because two values whose areas miss each
657/// other share one and taking it means every value in it this one is really on top of has to go.
658/// A register holding two of those costs twice as much to take as one holding a single value, so
659/// the cheap ones are looked at first and the reach only settles ties.
660fn spill_one<'a>(
661    assignment: &mut Assignment,
662    active: &mut Active<'a>,
663    blocked: &Blocks,
664    interval: Interval<'a>,
665) {
666    // What each register would cost: how many values would go, and the furthest any of them
667    // reaches. The list is one entry per register of the class, so walking it for each value in
668    // flight is the same shape as everything else here. The first number is when the earliest of
669    // them was given the register, and sorting by it puts the registers in the order the values
670    // were given them, which is what settles a tie.
671    let mut costs: Vec<(usize, PhysReg, usize, Point)> = Vec::new();
672    for held in active.by.iter().flatten() {
673        if held.class != interval.class || !held.area.overlaps(interval.area) {
674            continue;
675        }
676        match costs.iter_mut().find(|(_, at, _, _)| *at == held.at) {
677            Some((first, _, count, reach)) => {
678                *first = (*first).min(held.since);
679                *count += 1;
680                *reach = (*reach).max(held.range.end);
681            }
682            None => costs.push((held.since, held.at, 1, held.range.end)),
683        }
684    }
685    costs.sort_unstable_by_key(|&(first, _, _, _)| first);
686    // A register the instructions in the way insist on for themselves is no use, because taking it
687    // over would put this value in a register it may not have.
688    let none = Active::default();
689    let chosen = costs
690        .iter()
691        .filter(|&&(_, at, _, reach)| {
692            reach > interval.range.end
693                && available(&none, blocked, interval, at, None, Want::Allowed)
694        })
695        .min_by_key(|&&(_, _, count, reach)| (count, Reverse(reach)))
696        .map(|&(_, at, _, _)| at);
697    match chosen {
698        Some(at) => {
699            active.by[usize::from(at.number())].retain(|held| {
700                let goes = held.class == interval.class && held.area.overlaps(interval.area);
701                if goes {
702                    assignment.spill(held.reg, held.class);
703                }
704                !goes
705            });
706            assignment.places[index(interval.reg)] = Some(Place::Reg(at));
707            active.push(interval.reg, interval.class, interval.range, interval.area, at);
708        }
709        None => assignment.spill(interval.reg, interval.class),
710    }
711}
712
713/// The registers the instructions insist on, and where.
714///
715/// A physical register an operand names outright counts the same way. Nothing before allocation
716/// writes one except an instruction that has to, and it has to for the length of that one
717/// instruction, which is the same statement a fixed constraint makes.
718pub(crate) fn blocked(func: &Func, order: &Order) -> Blocks {
719    let mut blocked = Vec::new();
720    let mut claimed: Vec<(RegClass, PhysReg)> = Vec::new();
721    for block in func.blocks() {
722        for inst in func.insts(block) {
723            let operands = &func[func[inst].operands];
724            claimed.clear();
725            for operand in operands {
726                if let Some(at) = insisted(operand) {
727                    let key = (operand.class, at);
728                    if !claimed.contains(&key) {
729                        claimed.push(key);
730                    }
731                }
732            }
733            for &(class, at) in &claimed {
734                // Both points, whether or not an operand is at them. A register an instruction
735                // reads and does not write is still gone by the time the instruction is done as far
736                // as anything here knows, which is what stops the value a call is passed in `rdi`
737                // from staying in `rdi` over the call.
738                for (point, role) in [(order.early(inst), Role::Use), (order.late(inst), Role::Def)]
739                {
740                    let mut named = false;
741                    for operand in operands {
742                        let mine = insisted(operand) == Some(at) && operand.class == class;
743                        if !mine || !(operand.role == role || operand.role == Role::EarlyDef) {
744                            continue;
745                        }
746                        named = true;
747                        let by = operand.reg.is_virtual().then_some(operand.reg);
748                        let above = match operand.constraint {
749                            Constraint::Above(above) => Some(above),
750                            _ => None,
751                        };
752                        blocked.push(Blocked { class, at, point, by, above });
753                    }
754                    // A register no operand names where the operands are read is one the
755                    // instruction writes and does not read, which is what a clobber is, and the
756                    // seven registers a call destroys are the whole of why that case is worth
757                    // separating. Such a register is free right up to the point it is written, so a
758                    // value whose last read is this instruction may sit in one: it is read before
759                    // the instruction writes anything, the way any other operand is. Blocking it
760                    // where the operands are read as well would take every caller saved register
761                    // away from the value a call is passed, which is a value that dies at the call
762                    // and pays for a callee saved register it holds for two instructions. Anything
763                    // living past the instruction is still refused, by the block below.
764                    //
765                    // This is where a target's early definitions are paid for. An instruction that
766                    // fills a register before it has finished reading has to say so, because that
767                    // is the one thing a plain definition here no longer covers: a division on
768                    // x86-64 is a sign extension and then the division itself, so `rdx` is gone
769                    // before the divisor is read, and a divisor that went there would be read as
770                    // the dividend's own sign bits. `rucc_target::x86_64` writes both of them down
771                    // as early definitions for exactly that reason.
772                    if !named && role == Role::Def {
773                        blocked.push(Blocked { class, at, point, by: None, above: None });
774                    }
775                }
776            }
777        }
778    }
779    // Program order already has the points ascending, but the registers one instruction claims are
780    // walked outside the two points rather than inside them, so the list arrives in order by
781    // instruction and not by register. A sort by the key the lookup searches on is what makes it
782    // searchable, and it is stable so two constraints on one register at one point keep the order
783    // the instruction wrote them in.
784    blocked.sort_by_key(|one: &Blocked| (one.class, one.at, one.point));
785    let widths = (0..func.vregs())
786        .map(|number| func.width(Reg::virtual_reg(u32::try_from(number).ok()?)))
787        .collect();
788    Blocks { all: blocked, widths }
789}
790
791/// The register an operand has to be in, which is the one a constraint asks for or the one the
792/// operand names outright.
793fn insisted(operand: &Operand) -> Option<PhysReg> {
794    match operand.constraint {
795        Constraint::Fixed(at) => Some(at),
796        _ => operand.reg.phys(),
797    }
798}
799
800/// The registers each value would rather be in, which are the ones the operands naming it insist on.
801///
802/// In the order the function writes them down, so the definition comes first where there is one,
803/// since a value written into a fixed register and then moved somewhere else pays for the move at
804/// the top of its life rather than at the bottom. The ones after it are worth keeping for the same
805/// reason the first one is, and the value a call is passed is where that shows: its definition may
806/// insist on the register a parameter arrived in, which the call it is handed to has usually taken
807/// back for an argument of its own by then, and behind that is the register the convention passes
808/// it in, which is free and is exactly where the value wants to end up.
809pub(crate) fn hints(func: &Func) -> Vec<Vec<PhysReg>> {
810    let mut hints = vec![Vec::new(); func.vregs()];
811    for block in func.blocks() {
812        for inst in func.insts(block) {
813            for operand in &func[func[inst].operands] {
814                let Constraint::Fixed(at) = operand.constraint else { continue };
815                let number = operand.reg.number().and_then(|number| usize::try_from(number).ok());
816                let Some(number) = number else { continue };
817                let wanted: &mut Vec<PhysReg> = &mut hints[number];
818                if func.class_of(operand.reg) == Some(operand.class) && !wanted.contains(&at) {
819                    wanted.push(at);
820                }
821            }
822        }
823    }
824    hints
825}
826
827/// The block parameters each value is passed to, by the virtual register passed.
828pub(crate) fn passed(func: &Func) -> Vec<Vec<Reg>> {
829    let mut passed = vec![Vec::new(); func.vregs()];
830    for block in func.blocks() {
831        for call in &func[block].succs {
832            for (&arg, param) in call.args.iter().zip(&func[call.block].params) {
833                let number = arg.number().and_then(|number| usize::try_from(number).ok());
834                let Some(number) = number else { continue };
835                let to: &mut Vec<Reg> = &mut passed[number];
836                if !to.contains(&param.reg) {
837                    to.push(param.reg);
838                }
839            }
840        }
841    }
842    passed
843}
844
845/// The values that have to be on the stack whatever else is true of them.
846pub(crate) fn forced(func: &Func) -> Vec<Reg> {
847    let mut forced = Vec::new();
848    for block in func.blocks() {
849        for inst in func.insts(block) {
850            for operand in &func[func[inst].operands] {
851                if operand.constraint == Constraint::Stack
852                    && operand.reg.is_virtual()
853                    && !forced.contains(&operand.reg)
854                {
855                    forced.push(operand.reg);
856                }
857            }
858        }
859    }
860    forced
861}
862
863/// The value each two address instruction reuses, by the virtual register it writes.
864pub(crate) fn reuses(func: &Func, order: &Order) -> Vec<Option<Reuse>> {
865    let mut reuses = vec![None; func.vregs()];
866    for block in func.blocks() {
867        for inst in func.insts(block) {
868            let operands = &func[func[inst].operands];
869            for operand in operands {
870                let Constraint::Reuse(other) = operand.constraint else { continue };
871                let number = operand.reg.number().and_then(|number| usize::try_from(number).ok());
872                let Some(number) = number else { continue };
873                let source = operands[usize::from(other)].reg;
874                let second = if func[inst].flags.contains(Flags::COMMUTES) {
875                    swappable(operands, usize::from(other))
876                } else {
877                    None
878                };
879                reuses[number] = Some(Reuse { source, second, at: order.early(inst), inst });
880            }
881        }
882    }
883    reuses
884}
885
886/// The second source of an instruction that reads its two sources either way round, when the
887/// answer could go over it instead of over the first.
888///
889/// Only the shape of a two address instruction with two sources, the answer and then the two, with
890/// the answer reusing the first. The second has to be a value of the same class that asks for
891/// nothing more than a register, since after the swap it is the one the answer reuses.
892fn swappable(operands: &[Operand], other: usize) -> Option<Reg> {
893    let [answer, first, second] = operands else { return None };
894    let same = second.class == first.class && second.class == answer.class;
895    let plain = second.role == Role::Use && second.constraint == Constraint::Reg;
896    (other == 1 && same && plain && second.reg.is_virtual() && second.reg != first.reg)
897        .then_some(second.reg)
898}
899
900/// A virtual register's number as a table index.
901fn index(reg: Reg) -> usize {
902    usize::try_from(reg.number().expect("a virtual register")).expect("a register number")
903}
904
905#[cfg(test)]
906mod tests {
907    use rucc_base::Interner;
908    use rucc_mir::{BlockCall, Opcode, Operand, Param};
909    use rucc_target::x86_64::{GPR, R13, R14, R15, RAX, RCX, RDX, REGS, RSI, SYSV};
910
911    use super::*;
912
913    /// The x86-64 environment, with the last three of the allocation order held back as scratch.
914    fn env() -> Env {
915        let (order, scratch) = SYSV.int_order.split_at(SYSV.int_order.len() - 3);
916        Env::new().with(GPR, order, scratch)
917    }
918
919    /// An environment with that many general purpose registers, for putting a function under
920    /// pressure without writing a hundred instructions.
921    fn narrow(count: usize) -> Env {
922        Env::new().with(GPR, &SYSV.int_order[..count], &SYSV.int_order[count..count + 1])
923    }
924
925    /// What a place is called, which is what an assertion reads.
926    fn named(place: Option<Place>) -> String {
927        match place {
928            Some(Place::Reg(reg)) => REGS.name(GPR, reg).expect("a register").to_string(),
929            Some(Place::Slot(slot)) => format!("slot {slot}"),
930            None => "nowhere".to_string(),
931        }
932    }
933
934    /// Where every value in a function went.
935    fn places(func: &Func, env: &Env) -> Vec<String> {
936        let order = Order::of(func);
937        let live = Live::of(func, &order);
938        let assignment = assign(func, &order, &live, env);
939        (0..func.vregs())
940            .map(|number| {
941                let reg = Reg::virtual_reg(u32::try_from(number).expect("a register number"));
942                named(assignment.place(reg))
943            })
944            .collect()
945    }
946
947    #[test]
948    fn two_values_that_are_never_both_wanted_share_a_register() {
949        let mut names = Interner::new();
950        let mut func = Func::new(names.intern("f"));
951        let opcode = Opcode::new(names.intern("x64.nop"));
952        let block = func.create_block();
953        let first = func.new_vreg(GPR);
954        let second = func.new_vreg(GPR);
955        func.build(block, opcode).def(first, GPR).finish();
956        func.build(block, opcode).uses(first, GPR).finish();
957        func.build(block, opcode).def(second, GPR).finish();
958        func.build(block, opcode).uses(second, GPR).finish();
959
960        // The first register in the order, twice, because the first value is finished with before
961        // the second one is written.
962        assert_eq!(places(&func, &env()), ["rax", "rax"]);
963    }
964
965    /// A value held over an instruction that writes the whole of the first register and the top
966    /// of the second, which is a call on AArch64 and `v8` in small, with the value as wide as that.
967    fn over_the_top(width: u32) -> Func {
968        let mut names = Interner::new();
969        let mut func = Func::new(names.intern("f"));
970        let opcode = Opcode::new(names.intern("x64.nop"));
971        let block = func.create_block();
972        let held = func.new_vreg(GPR);
973        func.set_width(held, width);
974        func.build(block, opcode).def(held, GPR).finish();
975        func.build(block, opcode)
976            .operand(Operand::write(Reg::physical(RAX), GPR))
977            .operand(Operand::write(Reg::physical(RCX), GPR).with(Constraint::Above(8)))
978            .finish();
979        func.build(block, opcode).uses(held, GPR).finish();
980        func
981    }
982
983    #[test]
984    fn a_value_that_fits_under_what_an_instruction_writes_stays_in_the_register() {
985        assert_eq!(places(&over_the_top(8), &narrow(2)), ["rcx"]);
986        assert_eq!(places(&over_the_top(4), &narrow(2)), ["rcx"]);
987    }
988
989    #[test]
990    fn a_value_wider_than_that_or_of_no_known_width_does_not() {
991        assert_eq!(places(&over_the_top(16), &narrow(2)), ["slot 0"]);
992        assert_eq!(places(&over_the_top(0), &narrow(2)), ["slot 0"]);
993    }
994
995    #[test]
996    fn two_values_that_are_both_wanted_do_not() {
997        let mut names = Interner::new();
998        let mut func = Func::new(names.intern("f"));
999        let opcode = Opcode::new(names.intern("x64.nop"));
1000        let block = func.create_block();
1001        let first = func.new_vreg(GPR);
1002        let second = func.new_vreg(GPR);
1003        func.build(block, opcode).def(first, GPR).finish();
1004        func.build(block, opcode).def(second, GPR).finish();
1005        func.build(block, opcode).uses(first, GPR).finish();
1006        func.build(block, opcode).uses(second, GPR).finish();
1007
1008        assert_eq!(places(&func, &env()), ["rax", "rcx"]);
1009    }
1010
1011    #[test]
1012    fn a_value_written_early_that_nothing_reads_still_holds_its_register() {
1013        let mut names = Interner::new();
1014        let mut func = Func::new(names.intern("f"));
1015        let opcode = Opcode::new(names.intern("x64.nop"));
1016        let block = func.create_block();
1017        let wanted = func.new_vreg(GPR);
1018        let spare = func.new_vreg(GPR);
1019        // A division: a remainder somebody wants, and a quotient nobody does. Both are written by
1020        // the one instruction and the quotient is written before the operands have been read.
1021        func.build(block, opcode)
1022            .def(wanted, GPR)
1023            .operand(Operand::write_early(spare, GPR))
1024            .finish();
1025        func.build(block, opcode).uses(wanted, GPR).finish();
1026
1027        // Two registers, not one. A value nothing reads is still somewhere, and the instruction
1028        // that wrote it wrote the other one too, so the two cannot be the same place. Handing them
1029        // the same register loses the remainder, because the copy that takes the quotient out of
1030        // the register the machine insisted on goes on top of it. The quotient gets the first
1031        // register because it is written first, which is the whole of what early means.
1032        assert_eq!(places(&func, &env()), ["rcx", "rax"]);
1033    }
1034
1035    #[test]
1036    fn the_value_wanted_longest_is_the_one_that_goes_to_the_stack() {
1037        let mut names = Interner::new();
1038        let mut func = Func::new(names.intern("f"));
1039        let opcode = Opcode::new(names.intern("x64.nop"));
1040        let block = func.create_block();
1041        let long = func.new_vreg(GPR);
1042        let short = func.new_vreg(GPR);
1043        let third = func.new_vreg(GPR);
1044        func.build(block, opcode).def(long, GPR).finish();
1045        func.build(block, opcode).def(short, GPR).finish();
1046        func.build(block, opcode).def(third, GPR).finish();
1047        func.build(block, opcode).uses(short, GPR).finish();
1048        func.build(block, opcode).uses(third, GPR).finish();
1049        func.build(block, opcode).uses(long, GPR).finish();
1050
1051        // Two registers between three values. The one still wanted at the end of the function is
1052        // the one whose register is worth the most to everybody else, so it is the one that goes.
1053        assert_eq!(places(&func, &narrow(2)), ["slot 0", "rcx", "rax"]);
1054    }
1055
1056    #[test]
1057    fn a_register_an_instruction_insists_on_goes_to_the_values_that_asked_for_it() {
1058        let mut names = Interner::new();
1059        let mut func = Func::new(names.intern("f"));
1060        let opcode = Opcode::new(names.intern("x64.nop"));
1061        let block = func.create_block();
1062        let across = func.new_vreg(GPR);
1063        let dividend = func.new_vreg(GPR);
1064        let quotient = func.new_vreg(GPR);
1065        let remainder = func.new_vreg(GPR);
1066        func.build(block, opcode).def(across, GPR).finish();
1067        func.build(block, opcode).def(dividend, GPR).finish();
1068        func.build(block, opcode)
1069            .operand(Operand::write(quotient, GPR).with(Constraint::Fixed(RAX)))
1070            .operand(Operand::write_early(remainder, GPR).with(Constraint::Fixed(RDX)))
1071            .operand(Operand::read(dividend, GPR).with(Constraint::Fixed(RAX)))
1072            .finish();
1073        func.build(block, opcode).uses(across, GPR).finish();
1074
1075        // The value that has to be across the division is nowhere near `rax` or `rdx`, and each of
1076        // the three the division names is in the register the division asked for it in. The
1077        // dividend and the quotient share `rax` because the first is read where the second is
1078        // written, which is what a division does.
1079        assert_eq!(places(&func, &env()), ["rcx", "rax", "rax", "rdx"]);
1080    }
1081
1082    /// A value read by an instruction that fills a register before it reads is kept out of that
1083    /// register, even though the read is the last thing the value is wanted for.
1084    ///
1085    /// The divisor of a division is the case. What the machine runs is `cltd` and then `idivl`, so
1086    /// `rdx` holds the top half of the dividend by the time the divisor is read, and a divisor
1087    /// sitting in `rdx` is read as the dividend's own sign bits. An early definition is how the
1088    /// target says a register goes before the operands are read, and this is where the allocator
1089    /// has to hear it, since a value dying at an instruction is otherwise free to sit in a
1090    /// register that instruction writes. tamnd/rucc#1232.
1091    #[test]
1092    fn a_value_that_dies_at_an_instruction_stays_out_of_what_it_fills_first() {
1093        let mut names = Interner::new();
1094        let mut func = Func::new(names.intern("f"));
1095        let opcode = Opcode::new(names.intern("x64.nop"));
1096        let block = func.create_block();
1097        let across = func.new_vreg(GPR);
1098        let dividend = func.new_vreg(GPR);
1099        let divisor = func.new_vreg(GPR);
1100        let remainder = func.new_vreg(GPR);
1101        func.build(block, opcode).def(across, GPR).finish();
1102        func.build(block, opcode).def(dividend, GPR).finish();
1103        func.build(block, opcode).def(divisor, GPR).finish();
1104        func.build(block, opcode)
1105            .operand(Operand::write_early(remainder, GPR).with(Constraint::Fixed(RDX)))
1106            .operand(Operand::read(dividend, GPR).with(Constraint::Fixed(RAX)))
1107            .operand(Operand::read(divisor, GPR))
1108            .finish();
1109        func.build(block, opcode).uses(across, GPR).uses(remainder, GPR).finish();
1110
1111        // Four registers for four values, and the divisor takes the fourth. `rdx` is free
1112        // everywhere in this function except at the instruction that is about to fill it, which is
1113        // the one instruction the divisor is wanted at.
1114        assert_eq!(places(&func, &narrow(4)), ["rcx", "rax", "rsi", "rdx"]);
1115    }
1116
1117    #[test]
1118    fn a_value_wanted_after_the_instruction_that_insists_does_not_get_that_register() {
1119        let mut names = Interner::new();
1120        let mut func = Func::new(names.intern("f"));
1121        let opcode = Opcode::new(names.intern("x64.nop"));
1122        let block = func.create_block();
1123        let dividend = func.new_vreg(GPR);
1124        let quotient = func.new_vreg(GPR);
1125        func.build(block, opcode).def(dividend, GPR).finish();
1126        func.build(block, opcode)
1127            .operand(Operand::write(quotient, GPR).with(Constraint::Fixed(RAX)))
1128            .operand(Operand::read(dividend, GPR).with(Constraint::Fixed(RAX)))
1129            .finish();
1130        func.build(block, opcode).uses(dividend, GPR).finish();
1131
1132        // The hint is a preference and not a claim. The dividend would rather be in `rax` and
1133        // cannot be, because the division writes `rax` and the dividend is wanted afterwards, so
1134        // it takes the next register and the quotient keeps the one it was promised.
1135        assert_eq!(places(&func, &env()), ["rcx", "rax"]);
1136    }
1137
1138    #[test]
1139    fn a_value_an_instruction_can_only_read_from_memory_is_on_the_stack() {
1140        let mut names = Interner::new();
1141        let mut func = Func::new(names.intern("f"));
1142        let opcode = Opcode::new(names.intern("x64.nop"));
1143        let block = func.create_block();
1144        let value = func.new_vreg(GPR);
1145        func.build(block, opcode).def(value, GPR).finish();
1146        func.build(block, opcode)
1147            .operand(Operand::read(value, GPR).with(Constraint::Stack))
1148            .finish();
1149
1150        assert_eq!(places(&func, &env()), ["slot 0"]);
1151    }
1152
1153    #[test]
1154    fn a_two_address_instruction_writes_the_register_it_read_when_it_can() {
1155        let mut names = Interner::new();
1156        let mut func = Func::new(names.intern("f"));
1157        let opcode = Opcode::new(names.intern("x64.nop"));
1158        let block = func.create_block();
1159        let left = func.new_vreg(GPR);
1160        let right = func.new_vreg(GPR);
1161        let sum = func.new_vreg(GPR);
1162        func.build(block, opcode).def(left, GPR).finish();
1163        func.build(block, opcode).def(right, GPR).finish();
1164        func.build(block, opcode)
1165            .operand(Operand::write(sum, GPR).with(Constraint::Reuse(1)))
1166            .uses(left, GPR)
1167            .uses(right, GPR)
1168            .finish();
1169        func.build(block, opcode).uses(right, GPR).finish();
1170
1171        // The addition reads the left value for the last time, so the answer goes where that was
1172        // and the instruction is two address without a move in front of it.
1173        assert_eq!(places(&func, &env()), ["rax", "rcx", "rax"]);
1174    }
1175
1176    #[test]
1177    fn a_two_address_instruction_that_cannot_gets_a_register_nothing_it_reads_is_in() {
1178        let mut names = Interner::new();
1179        let mut func = Func::new(names.intern("f"));
1180        let opcode = Opcode::new(names.intern("x64.nop"));
1181        let block = func.create_block();
1182        let left = func.new_vreg(GPR);
1183        let right = func.new_vreg(GPR);
1184        let sum = func.new_vreg(GPR);
1185        func.build(block, opcode).def(left, GPR).finish();
1186        func.build(block, opcode).def(right, GPR).finish();
1187        func.build(block, opcode)
1188            .operand(Operand::write(sum, GPR).with(Constraint::Reuse(1)))
1189            .uses(left, GPR)
1190            .uses(right, GPR)
1191            .finish();
1192        func.build(block, opcode).uses(left, GPR).finish();
1193
1194        // The left value is wanted afterwards, so the answer cannot have its register. It cannot
1195        // have the right one's either, because the rewrite is about to write a move into it before
1196        // the addition has read anything.
1197        assert_eq!(places(&func, &env()), ["rax", "rcx", "rdx"]);
1198    }
1199
1200    #[test]
1201    fn an_answer_that_commutes_goes_over_the_source_that_is_finished_with() {
1202        let mut names = Interner::new();
1203        let mut func = Func::new(names.intern("f"));
1204        let opcode = Opcode::new(names.intern("x64.nop"));
1205        let block = func.create_block();
1206        let left = func.new_vreg(GPR);
1207        let right = func.new_vreg(GPR);
1208        let sum = func.new_vreg(GPR);
1209        func.build(block, opcode).def(left, GPR).finish();
1210        func.build(block, opcode).def(right, GPR).finish();
1211        let add = func
1212            .build(block, opcode)
1213            .flags(Flags::COMMUTES)
1214            .operand(Operand::write(sum, GPR).with(Constraint::Reuse(1)))
1215            .uses(left, GPR)
1216            .uses(right, GPR)
1217            .finish();
1218        func.build(block, opcode).uses(left, GPR).uses(sum, GPR).finish();
1219
1220        // The same shape as the one above where the answer got a register of its own, except that
1221        // the addition reads its sources either way round, so the answer goes where the right one
1222        // was and the instruction is marked to be swapped.
1223        assert_eq!(places(&func, &env()), ["rax", "rcx", "rcx"]);
1224        let order = Order::of(&func);
1225        let live = Live::of(&func, &order);
1226        let assignment = assign(&func, &order, &live, &env());
1227        assert_eq!(assignment.commuted(), [add]);
1228
1229        // Once swapped, the instruction is an ordinary reuse of its first source, the checker and
1230        // the trace agree with it, and nothing has to be moved in front of it. The rewrite has put
1231        // the registers in by then, so the right one is `rcx` and the left one `rax`.
1232        let allocation = crate::run(&mut func, &env(), "f", true);
1233        assert!(allocation.edits.is_empty());
1234        let operands = &func[func[add].operands];
1235        let (first, second) = (operands[1].reg.phys(), operands[2].reg.phys());
1236        assert_eq!((first, second), (Some(RCX), Some(RAX)));
1237    }
1238
1239    #[test]
1240    fn an_answer_that_commutes_takes_the_source_something_after_it_wants() {
1241        let mut names = Interner::new();
1242        let mut func = Func::new(names.intern("f"));
1243        let opcode = Opcode::new(names.intern("x64.nop"));
1244        let block = func.create_block();
1245        let left = func.new_vreg(GPR);
1246        let right = func.new_vreg(GPR);
1247        let sum = func.new_vreg(GPR);
1248        func.build(block, opcode).def(left, GPR).finish();
1249        func.build(block, opcode)
1250            .operand(Operand::write(right, GPR).with(Constraint::Fixed(RAX)))
1251            .finish();
1252        let add = func
1253            .build(block, opcode)
1254            .flags(Flags::COMMUTES)
1255            .operand(Operand::write(sum, GPR).with(Constraint::Reuse(1)))
1256            .uses(left, GPR)
1257            .uses(right, GPR)
1258            .finish();
1259        func.build(block, opcode)
1260            .operand(Operand::read(sum, GPR).with(Constraint::Fixed(RAX)))
1261            .finish();
1262
1263        // Both sources are finished with, so either register would do for the answer. The one
1264        // reading it wants it in `rax`, which is where the right one already is, so it goes there
1265        // and nothing is moved in front of that reader.
1266        let names = places(&func, &env());
1267        assert_eq!(names[2], "rax");
1268        assert_ne!(names[0], "rax");
1269        let allocation = crate::run(&mut func, &env(), "f", true);
1270        assert!(allocation.edits.is_empty());
1271        assert_eq!(func[func[add].operands][1].reg.phys(), Some(RAX));
1272    }
1273
1274    #[test]
1275    fn an_answer_that_commutes_stays_where_the_loop_passes_it() {
1276        let mut names = Interner::new();
1277        let mut func = Func::new(names.intern("f"));
1278        let opcode = Opcode::new(names.intern("x64.nop"));
1279        let entry = func.create_block();
1280        let head = func.create_block();
1281        let out = func.create_block();
1282        let seed = func.new_vreg(GPR);
1283        let total = func.new_vreg(GPR);
1284        let term = func.new_vreg(GPR);
1285        let next = func.new_vreg(GPR);
1286        func.build(entry, opcode).def(seed, GPR).finish();
1287        *func.succs_mut(entry) = vec![BlockCall::with(head, vec![seed])];
1288        func.params_mut(head).push(Param { reg: total, class: GPR });
1289        func.build(head, opcode).def(term, GPR).finish();
1290        let add = func
1291            .build(head, opcode)
1292            .flags(Flags::COMMUTES)
1293            .operand(Operand::write(next, GPR).with(Constraint::Reuse(1)))
1294            .uses(total, GPR)
1295            .uses(term, GPR)
1296            .finish();
1297        func.build(head, opcode)
1298            .operand(Operand::read(next, GPR).with(Constraint::Fixed(RSI)))
1299            .finish();
1300        *func.succs_mut(head) = vec![BlockCall::with(head, vec![next]), BlockCall::to(out)];
1301
1302        // Both sources are finished with and the sum is wanted in `rsi` as well, but the loop
1303        // passes it back to `total`, so it goes where `total` is and the back edge has nothing to
1304        // copy.
1305        let order = Order::of(&func);
1306        let live = Live::of(&func, &order);
1307        let assignment = assign(&func, &order, &live, &env());
1308        assert_eq!(assignment.place(next), assignment.place(total));
1309        assert!(!assignment.commuted().contains(&add));
1310    }
1311
1312    #[test]
1313    fn an_answer_that_does_not_commute_leaves_its_sources_where_they_are() {
1314        let mut names = Interner::new();
1315        let mut func = Func::new(names.intern("f"));
1316        let opcode = Opcode::new(names.intern("x64.nop"));
1317        let block = func.create_block();
1318        let left = func.new_vreg(GPR);
1319        let right = func.new_vreg(GPR);
1320        let sum = func.new_vreg(GPR);
1321        func.build(block, opcode).def(left, GPR).finish();
1322        func.build(block, opcode).def(right, GPR).finish();
1323        func.build(block, opcode)
1324            .flags(Flags::COMMUTES)
1325            .operand(Operand::write(sum, GPR).with(Constraint::Reuse(1)))
1326            .uses(left, GPR)
1327            .uses(right, GPR)
1328            .finish();
1329        func.build(block, opcode).uses(right, GPR).finish();
1330
1331        // The left one is finished with, so the answer goes over it as it always did, and there is
1332        // nothing to swap.
1333        assert_eq!(places(&func, &env()), ["rax", "rcx", "rax"]);
1334        let order = Order::of(&func);
1335        let live = Live::of(&func, &order);
1336        assert!(assign(&func, &order, &live, &env()).commuted().is_empty());
1337    }
1338
1339    #[test]
1340    fn a_value_live_across_a_whole_loop_holds_its_register_over_all_of_it() {
1341        let mut names = Interner::new();
1342        let mut func = Func::new(names.intern("f"));
1343        let opcode = Opcode::new(names.intern("x64.nop"));
1344        let head = func.create_block();
1345        let body = func.create_block();
1346        let carried = func.new_vreg(GPR);
1347        let inside = func.new_vreg(GPR);
1348        func.build(head, opcode).def(carried, GPR).finish();
1349        *func.succs_mut(head) = vec![BlockCall::to(body)];
1350        func.build(body, opcode).def(inside, GPR).finish();
1351        func.build(body, opcode).uses(inside, GPR).uses(carried, GPR).finish();
1352        *func.succs_mut(body) = vec![BlockCall::to(body)];
1353
1354        // The value inside the loop cannot have the carried one's register, even though nothing
1355        // between the two definitions says so.
1356        assert_eq!(places(&func, &env()), ["rax", "rcx"]);
1357    }
1358
1359    #[test]
1360    fn a_two_address_answer_already_live_does_not_take_the_register_it_read() {
1361        let mut names = Interner::new();
1362        let mut func = Func::new(names.intern("f"));
1363        let opcode = Opcode::new(names.intern("x64.nop"));
1364        let head = func.create_block();
1365        let latch = func.create_block();
1366        let out = func.create_block();
1367        let source = func.new_vreg(GPR);
1368        let carried = func.new_vreg(GPR);
1369        func.build(head, opcode).def(source, GPR).finish();
1370        func.build(head, opcode).def(carried, GPR).finish();
1371        *func.succs_mut(head) = vec![BlockCall::to(latch)];
1372        // The bottom of the loop adds the source to the carried value and writes the answer back
1373        // over it, reusing the register the source is in. The next turn round redefines both.
1374        func.build(latch, opcode)
1375            .operand(Operand::write(carried, GPR).with(Constraint::Reuse(1)))
1376            .uses(source, GPR)
1377            .uses(carried, GPR)
1378            .finish();
1379        *func.succs_mut(latch) = vec![BlockCall::to(head), BlockCall::to(out)];
1380        func.build(out, opcode).uses(carried, GPR).finish();
1381
1382        // The source is read here for the last time, which on its own is the shape the two address
1383        // shortcut is for, and taking it would be wrong. The carried value was written by the same
1384        // instruction on the last turn and is read by this one, so the two are both wanted where
1385        // the instruction reads and one register cannot hold both.
1386        assert_eq!(places(&func, &env()), ["rax", "rcx"]);
1387
1388        // And the checker has to agree, since it excused this pair on the same reasoning and so
1389        // would have let the answer through.
1390        let order = Order::of(&func);
1391        let live = Live::of(&func, &order);
1392        let assignment = assign(&func, &order, &live, &env());
1393        assert!(crate::check::check(&func, &order, &live, &assignment).is_empty());
1394    }
1395
1396    #[test]
1397    fn a_two_address_answer_with_a_hole_in_front_of_it_does_not_take_its_other_operand() {
1398        let mut names = Interner::new();
1399        let mut func = Func::new(names.intern("f"));
1400        let nop = Opcode::new(names.intern("x64.nop"));
1401        let add = Opcode::new(names.intern("x64.add"));
1402        let entry = func.create_block();
1403        let head = func.create_block();
1404        let arm = func.create_block();
1405        let latch = func.create_block();
1406        let out = func.create_block();
1407        let seed = func.new_vreg(GPR);
1408        let sum = func.new_vreg(GPR);
1409        let inside = func.new_vreg(GPR);
1410        let loaded = func.new_vreg(GPR);
1411        func.build(entry, nop).def(seed, GPR).finish();
1412        func.build(entry, nop).def(sum, GPR).finish();
1413        *func.succs_mut(entry) = vec![BlockCall::to(head)];
1414        func.build(head, nop).uses(sum, GPR).finish();
1415        *func.succs_mut(head) = vec![BlockCall::to(arm), BlockCall::to(latch)];
1416        func.build(arm, nop).def(inside, GPR).finish();
1417        func.build(arm, nop).uses(inside, GPR).finish();
1418        *func.succs_mut(arm) = vec![BlockCall::to(out)];
1419        func.build(latch, nop).def(loaded, GPR).finish();
1420        func.build(latch, add)
1421            .operand(Operand::write(sum, GPR).with(Constraint::Reuse(1)))
1422            .uses(seed, GPR)
1423            .uses(loaded, GPR)
1424            .finish();
1425        *func.succs_mut(latch) = vec![BlockCall::to(head), BlockCall::to(out)];
1426
1427        // The answer is live in the entry and the head as well, and the arm between them is a hole
1428        // in it, so the piece the addition writes is not the first one. The value the addition reads
1429        // out of memory is still wanted where the addition reads, so it may not be in the register
1430        // the answer is about to be copied into, holes or no holes. tamnd/rucc#982.
1431        let places = places(&func, &env());
1432        assert_ne!(places[index(sum)], places[index(loaded)]);
1433
1434        let order = Order::of(&func);
1435        let live = Live::of(&func, &order);
1436        let assignment = assign(&func, &order, &live, &env());
1437        assert!(crate::check::check(&func, &order, &live, &assignment).is_empty());
1438    }
1439
1440    #[test]
1441    fn a_sum_a_loop_carries_round_keeps_its_register_past_an_arm_laid_out_after_it() {
1442        let mut names = Interner::new();
1443        let mut func = Func::new(names.intern("f"));
1444        let nop = Opcode::new(names.intern("x64.nop"));
1445        let add = Opcode::new(names.intern("x64.add"));
1446        let entry = func.create_block();
1447        let head = func.create_block();
1448        let join = func.create_block();
1449        let arm = func.create_block();
1450        let out = func.create_block();
1451        let seed = func.new_vreg(GPR);
1452        let term = func.new_vreg(GPR);
1453        let next = func.new_vreg(GPR);
1454        func.build(entry, nop).def(seed, GPR).finish();
1455        *func.succs_mut(entry) = vec![BlockCall::with(head, vec![seed])];
1456        let total = func.append_param(head, GPR);
1457        func.build(head, nop).def(term, GPR).finish();
1458        *func.succs_mut(head) = vec![BlockCall::to(join), BlockCall::to(arm)];
1459        func.build(join, add)
1460            .operand(Operand::write(next, GPR).with(Constraint::Reuse(1)))
1461            .uses(total, GPR)
1462            .uses(term, GPR)
1463            .finish();
1464        *func.succs_mut(join) =
1465            vec![BlockCall::with(head, vec![next]), BlockCall::with(out, vec![next])];
1466        // The default arm of a `switch`, laid out after the addition it joins back in above. The
1467        // sum is live in it and nothing in it or after it reads the sum again.
1468        func.build(arm, nop).def(term, GPR).finish();
1469        *func.succs_mut(arm) = vec![BlockCall::to(join)];
1470        let result = func.append_param(out, GPR);
1471        func.build(out, nop).uses(result, GPR).finish();
1472
1473        // The addition reads the sum for the last time, so the new sum goes where the old one was
1474        // and the edge back to the top of the loop has nothing to move. tamnd/rucc#1965.
1475        let places = places(&func, &env());
1476        assert_eq!(places[index(next)], places[index(total)]);
1477
1478        let order = Order::of(&func);
1479        let live = Live::of(&func, &order);
1480        let assignment = assign(&func, &order, &live, &env());
1481        assert!(crate::check::check(&func, &order, &live, &assignment).is_empty());
1482    }
1483
1484    /// Two blocks the entry chooses between, with the one the clobber is in written first. The two
1485    /// values written in the entry block are read in the other one, so their ranges cover the
1486    /// clobber whether or not either of them ever reaches it.
1487    fn arms(reaches: bool) -> Func {
1488        let mut names = Interner::new();
1489        let mut func = Func::new(names.intern("f"));
1490        let opcode = Opcode::new(names.intern("x64.nop"));
1491        let entry = func.create_block();
1492        let arm = func.create_block();
1493        let tail = func.create_block();
1494        let first = func.new_vreg(GPR);
1495        let second = func.new_vreg(GPR);
1496        func.build(entry, opcode).def(first, GPR).finish();
1497        func.build(entry, opcode).def(second, GPR).finish();
1498        *func.succs_mut(entry) = vec![BlockCall::to(arm), BlockCall::to(tail)];
1499        // What a call looks like here: an instruction writing the registers the convention says it
1500        // destroys, named outright so that nothing else may be in them.
1501        func.build(arm, opcode).operand(Operand::write(Reg::physical(RAX), GPR)).finish();
1502        *func.succs_mut(arm) = if reaches { vec![BlockCall::to(tail)] } else { Vec::new() };
1503        func.build(tail, opcode).uses(first, GPR).uses(second, GPR).finish();
1504        func
1505    }
1506
1507    #[test]
1508    fn a_register_a_clobber_takes_beats_the_stack_for_a_value_not_live_in_that_block() {
1509        let func = arms(false);
1510
1511        // Two registers between two values, and a clobber in the arm that takes the first of them.
1512        // The intervals around both values cover the clobber, since the arm is written between the
1513        // two blocks they are live in, and the arm is a hole in both of their areas. So the second
1514        // value has `rax` rather than a stack slot: the arm is a block its own path never goes
1515        // through. tamnd/rucc#982.
1516        assert_eq!(places(&func, &narrow(2)), ["rcx", "rax"]);
1517
1518        let order = Order::of(&func);
1519        let live = Live::of(&func, &order);
1520        let assignment = assign(&func, &order, &live, &narrow(2));
1521        assert!(crate::check::check(&func, &order, &live, &assignment).is_empty());
1522    }
1523
1524    #[test]
1525    fn a_register_a_clobber_takes_is_not_free_to_a_value_that_is_live_there() {
1526        let func = arms(true);
1527
1528        // The same blocks with an edge from the arm to the tail, which is all it takes: both values
1529        // now arrive at the read either way, so the clobber is on a path they are live over and the
1530        // one register left has to do for both of them.
1531        assert_eq!(places(&func, &narrow(2)), ["rcx", "slot 0"]);
1532    }
1533
1534    /// A value and the instruction that destroys a register, written one after the other, with the
1535    /// value read by that instruction or by the one after it.
1536    fn dies_at_the_clobber(here: bool) -> Func {
1537        let mut names = Interner::new();
1538        let mut func = Func::new(names.intern("f"));
1539        let opcode = Opcode::new(names.intern("x64.nop"));
1540        let entry = func.create_block();
1541        let value = func.new_vreg(GPR);
1542        func.build(entry, opcode).def(value, GPR).finish();
1543        let call = func.build(entry, opcode).operand(Operand::write(Reg::physical(RAX), GPR));
1544        if here {
1545            call.uses(value, GPR).finish();
1546        } else {
1547            call.finish();
1548            func.build(entry, opcode).uses(value, GPR).finish();
1549        }
1550        func
1551    }
1552
1553    /// A value whose last read is the instruction that destroys a register may be in that register,
1554    /// because the instruction reads what it is handed before it writes anything.
1555    ///
1556    /// The call is what this is about, and the value a call is passed is the case: seven registers
1557    /// on this machine are destroyed by one, every argument dies at the call that reads it, and
1558    /// refusing all seven to those values left them taking a callee saved register for a life two
1559    /// instructions long and paying for it in the prologue and the epilogue. tamnd/rucc#1232.
1560    #[test]
1561    fn a_value_that_dies_where_a_register_is_destroyed_may_be_in_that_register() {
1562        let func = dies_at_the_clobber(true);
1563        assert_eq!(places(&func, &narrow(1)), ["rax"]);
1564
1565        let order = Order::of(&func);
1566        let live = Live::of(&func, &order);
1567        let assignment = assign(&func, &order, &live, &narrow(1));
1568        assert!(crate::check::check(&func, &order, &live, &assignment).is_empty());
1569    }
1570
1571    /// And one read later than that is one the instruction really does destroy, which is the same
1572    /// function with the read moved down by one instruction.
1573    #[test]
1574    fn a_value_read_after_the_instruction_that_destroys_a_register_is_not_in_it() {
1575        let func = dies_at_the_clobber(false);
1576        assert_eq!(places(&func, &narrow(1)), ["slot 0"]);
1577    }
1578
1579    #[test]
1580    fn a_hint_is_followed_when_the_register_is_clear_and_not_when_it_is_merely_allowed() {
1581        let mut names = Interner::new();
1582        let mut func = Func::new(names.intern("f"));
1583        let opcode = Opcode::new(names.intern("x64.nop"));
1584        let entry = func.create_block();
1585        let mid = func.create_block();
1586        let tail = func.create_block();
1587        let first = func.new_vreg(GPR);
1588        let second = func.new_vreg(GPR);
1589        func.build(entry, opcode).def(first, GPR).finish();
1590        func.build(entry, opcode).def(second, GPR).finish();
1591        *func.succs_mut(entry) = vec![BlockCall::to(mid), BlockCall::to(tail)];
1592        // Two arms, each ending in an instruction that wants its own value in `rax`, which is what
1593        // a return out of either side of a branch looks like.
1594        func.build(mid, opcode)
1595            .operand(Operand::read(second, GPR).with(Constraint::Fixed(RAX)))
1596            .finish();
1597        func.build(tail, opcode)
1598            .operand(Operand::read(first, GPR).with(Constraint::Fixed(RAX)))
1599            .finish();
1600
1601        // The first value is hinted at `rax` and does not get it, because the other arm wants `rax`
1602        // for the other value and the first value's range reaches that far. Following the hint here
1603        // would save a move in the tail and cost one in the middle, and the second value gets `rax`
1604        // with nothing moved anywhere instead.
1605        assert_eq!(places(&func, &env()), ["rcx", "rax"]);
1606    }
1607
1608    #[test]
1609    fn a_value_living_in_a_hole_of_another_gets_the_same_register() {
1610        let mut names = Interner::new();
1611        let mut func = Func::new(names.intern("f"));
1612        let opcode = Opcode::new(names.intern("x64.nop"));
1613        let entry = func.create_block();
1614        let arm = func.create_block();
1615        let tail = func.create_block();
1616        let across = func.new_vreg(GPR);
1617        let inside = func.new_vreg(GPR);
1618        func.build(entry, opcode).def(across, GPR).finish();
1619        *func.succs_mut(entry) = vec![BlockCall::to(arm), BlockCall::to(tail)];
1620        func.build(arm, opcode).def(inside, GPR).finish();
1621        func.build(arm, opcode).uses(inside, GPR).finish();
1622        func.build(tail, opcode).uses(across, GPR).finish();
1623
1624        // One register between the two of them, and one register is enough. Nothing in the arm can
1625        // reach the read in the tail, so the value the arm makes is welcome to the register the
1626        // value crossing the function is in. The interval around that value covers the arm and the
1627        // value is nowhere near it, which is what used to send one of the two to the stack.
1628        // tamnd/rucc#982.
1629        assert_eq!(places(&func, &narrow(1)), ["rax", "rax"]);
1630
1631        let order = Order::of(&func);
1632        let live = Live::of(&func, &order);
1633        let assignment = assign(&func, &order, &live, &narrow(1));
1634        assert_eq!(assignment.spilled(), 0);
1635        assert!(crate::check::check(&func, &order, &live, &assignment).is_empty());
1636    }
1637
1638    #[test]
1639    fn a_register_a_clobber_takes_is_the_last_one_offered_rather_than_the_first() {
1640        let func = arms(false);
1641
1642        // With a register to spare the value takes the spare one. Being allowed a register some
1643        // instruction insists on is not the same as it being free: the instruction has to be handed
1644        // it in the end, and what hands it over is a move.
1645        assert_eq!(places(&func, &narrow(3)), ["rcx", "rdx"]);
1646    }
1647
1648    #[test]
1649    fn a_frame_says_what_each_of_its_slots_is_for() {
1650        let mut names = Interner::new();
1651        let mut func = Func::new(names.intern("f"));
1652        let opcode = Opcode::new(names.intern("x64.nop"));
1653        let block = func.create_block();
1654        let first = func.new_vreg(GPR);
1655        let second = func.new_vreg(GPR);
1656        func.build(block, opcode).def(first, GPR).finish();
1657        func.build(block, opcode).def(second, GPR).finish();
1658        func.build(block, opcode).uses(first, GPR).uses(second, GPR).finish();
1659
1660        let order = Order::of(&func);
1661        let live = Live::of(&func, &order);
1662        let assignment = assign(&func, &order, &live, &narrow(1));
1663        assert_eq!(assignment.spilled(), 1);
1664        assert_eq!(assignment.slots(), [GPR]);
1665        // A register that is already a register is where it is, and this has nothing to say about
1666        // it.
1667        assert_eq!(assignment.place(Reg::physical(RCX)), None);
1668        assert_eq!(env().scratch(GPR), [R13, R14, R15]);
1669    }
1670}