Expand description
The IR as something a lowering rule can match against.
Design: spec/10-backend.md section 10.2.
A rule is written about a term and the compiler has no terms. It has a function full of
instructions, and what a pattern is about is one of them together with whatever its operands
were computed from. So this is the Subject the matcher asks its three questions of, and
the answers come out of the IR: nothing is built and nothing is thrown away.
§How an operand is shown
The same IR value can be several different terms. (add.i32 (value.i32 x) (iconst.i32 k))
and (add.i32 (value.i32 x) (value.i32 y)) are two patterns over one instruction, and which
one it is depends on whether the second operand is a constant and on whether the rule that
wants a constant will take this one. (add.i64 (value.i64 x) (mul.i64 (value.i64 y) (iconst.i64 4))) is a third, and it is about two instructions rather than one.
The matcher does not backtrack across alternatives for one node: Subject::head gives one
answer and the walk believes it. So the choice is made before the walk rather than during it.
A Plan says how each operand of the instruction is shown, the selector tries the plans in
order, and the first that matches is the one that fires. There are at most three ways to show
an operand and at most two operands in any pattern this rule set has, so the whole of the
search is a handful of walks over a trie, each of which fails in its first node or two.
§How deep it goes
One level. An operand may be shown as the instruction that computed it, and that
instruction’s own operands are shown as a register or as a constant and never expanded
again, which is as deep as any pattern in x86-64.rules reaches. A rule set that wants three
levels needs this to grow a level, and it would be found by the rule failing to fire rather
than by anything going wrong.
Structs§
- Terms
- One instruction of a function, as the terms a rule could match.
Enums§
Constants§
- MAX_
ARGS - How many operands of one instruction a plan can speak about.
- PLAIN
- Everything shown as a register, which is the plan that matches when no other does.
Type Aliases§
- Plan
- How every operand of one instruction is shown.