rstsr_core/device_cpu_serial/
assignment.rs

1use crate::prelude_dev::*;
2
3impl<TC, DC, DA, TA> OpAssignArbitaryAPI<TC, DC, DA, TA> for DeviceCpuSerial
4where
5    TC: Clone,
6    TA: Clone + DTypeCastAPI<TC>,
7    DC: DimAPI,
8    DA: DimAPI,
9{
10    fn assign_arbitary(&self, c: &mut Vec<TC>, lc: &Layout<DC>, a: &Vec<TA>, la: &Layout<DA>) -> Result<()> {
11        let default_order = self.default_order();
12        return assign_arbitary_promote_cpu_serial(c, lc, a, la, default_order);
13    }
14
15    fn assign_arbitary_uninit(
16        &self,
17        c: &mut Vec<MaybeUninit<TC>>,
18        lc: &Layout<DC>,
19        a: &Vec<TA>,
20        la: &Layout<DA>,
21    ) -> Result<()> {
22        let default_order = self.default_order();
23        return assign_arbitary_uninit_promote_cpu_serial(c, lc, a, la, default_order);
24    }
25}
26
27impl<TC, D, TA> OpAssignAPI<TC, D, TA> for DeviceCpuSerial
28where
29    TC: Clone,
30    TA: Clone + DTypeCastAPI<TC>,
31    D: DimAPI,
32{
33    fn assign(&self, c: &mut Vec<TC>, lc: &Layout<D>, a: &Vec<TA>, la: &Layout<D>) -> Result<()> {
34        return assign_promote_cpu_serial(c, lc, a, la);
35    }
36
37    fn assign_uninit(&self, c: &mut Vec<MaybeUninit<TC>>, lc: &Layout<D>, a: &Vec<TA>, la: &Layout<D>) -> Result<()> {
38        return assign_uninit_promote_cpu_serial(c, lc, a, la);
39    }
40
41    fn fill(&self, c: &mut Vec<TC>, lc: &Layout<D>, fill: TA) -> Result<()> {
42        return fill_promote_cpu_serial(c, lc, fill);
43    }
44}
rstsr_core/device_cpu_serial/assignment.rs

rstsr_core/device_cpu_serial/
assignment.rs
