rsl10_pac/sysctrl/
sysctrl_dss_ctrl.rs

1#[doc = "Reader of register SYSCTRL_DSS_CTRL"]
2pub type R = crate::R<u32, super::SYSCTRL_DSS_CTRL>;
3#[doc = "Writer for register SYSCTRL_DSS_CTRL"]
4pub type W = crate::W<u32, super::SYSCTRL_DSS_CTRL>;
5#[doc = "Register SYSCTRL_DSS_CTRL `reset()`'s with value 0x0100"]
6impl crate::ResetValue for super::SYSCTRL_DSS_CTRL {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0x0100
11    }
12}
13#[doc = "LPDSP32 feature status\n\nValue on reset: 1"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15pub enum LPDSP32_STATUS_A {
16    #[doc = "0: Device does not have the LPDSP32 feature"]
17    LPDSP32_DISABLED_DEVICE = 0,
18    #[doc = "1: Device has the LPDSP32 feature"]
19    LPDSP32_ENABLED_DEVICE = 1,
20}
21impl From<LPDSP32_STATUS_A> for bool {
22    #[inline(always)]
23    fn from(variant: LPDSP32_STATUS_A) -> Self {
24        variant as u8 != 0
25    }
26}
27#[doc = "Reader of field `LPDSP32_STATUS`"]
28pub type LPDSP32_STATUS_R = crate::R<bool, LPDSP32_STATUS_A>;
29impl LPDSP32_STATUS_R {
30    #[doc = r"Get enumerated values variant"]
31    #[inline(always)]
32    pub fn variant(&self) -> LPDSP32_STATUS_A {
33        match self.bits {
34            false => LPDSP32_STATUS_A::LPDSP32_DISABLED_DEVICE,
35            true => LPDSP32_STATUS_A::LPDSP32_ENABLED_DEVICE,
36        }
37    }
38    #[doc = "Checks if the value of the field is `LPDSP32_DISABLED_DEVICE`"]
39    #[inline(always)]
40    pub fn is_lpdsp32_disabled_device(&self) -> bool {
41        *self == LPDSP32_STATUS_A::LPDSP32_DISABLED_DEVICE
42    }
43    #[doc = "Checks if the value of the field is `LPDSP32_ENABLED_DEVICE`"]
44    #[inline(always)]
45    pub fn is_lpdsp32_enabled_device(&self) -> bool {
46        *self == LPDSP32_STATUS_A::LPDSP32_ENABLED_DEVICE
47    }
48}
49#[doc = "Write a 1 to reset pending CSS interrupts in the DSS interrupt controller\n\nValue on reset: 0"]
50#[derive(Clone, Copy, Debug, PartialEq)]
51pub enum DSS_CSS_INT_RESET_AW {
52    #[doc = "1: Reset CSS interrupts in the DSS interrupt controller"]
53    DSS_CSS_INT_RESET = 1,
54}
55impl From<DSS_CSS_INT_RESET_AW> for bool {
56    #[inline(always)]
57    fn from(variant: DSS_CSS_INT_RESET_AW) -> Self {
58        variant as u8 != 0
59    }
60}
61#[doc = "Write proxy for field `DSS_CSS_INT_RESET`"]
62pub struct DSS_CSS_INT_RESET_W<'a> {
63    w: &'a mut W,
64}
65impl<'a> DSS_CSS_INT_RESET_W<'a> {
66    #[doc = r"Writes `variant` to the field"]
67    #[inline(always)]
68    pub fn variant(self, variant: DSS_CSS_INT_RESET_AW) -> &'a mut W {
69        {
70            self.bit(variant.into())
71        }
72    }
73    #[doc = "Reset CSS interrupts in the DSS interrupt controller"]
74    #[inline(always)]
75    pub fn dss_css_int_reset(self) -> &'a mut W {
76        self.variant(DSS_CSS_INT_RESET_AW::DSS_CSS_INT_RESET)
77    }
78    #[doc = r"Sets the field bit"]
79    #[inline(always)]
80    pub fn set_bit(self) -> &'a mut W {
81        self.bit(true)
82    }
83    #[doc = r"Clears the field bit"]
84    #[inline(always)]
85    pub fn clear_bit(self) -> &'a mut W {
86        self.bit(false)
87    }
88    #[doc = r"Writes raw bits to the field"]
89    #[inline(always)]
90    pub fn bit(self, value: bool) -> &'a mut W {
91        self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
92        self.w
93    }
94}
95#[doc = "Write a 1 to reset pending DMA interrupts in the DSS interrupt controller\n\nValue on reset: 0"]
96#[derive(Clone, Copy, Debug, PartialEq)]
97pub enum DSS_DMA_INT_RESET_AW {
98    #[doc = "1: Reset DMA interrupts in the DSS interrupt controller"]
99    DSS_DMA_INT_RESET = 1,
100}
101impl From<DSS_DMA_INT_RESET_AW> for bool {
102    #[inline(always)]
103    fn from(variant: DSS_DMA_INT_RESET_AW) -> Self {
104        variant as u8 != 0
105    }
106}
107#[doc = "Write proxy for field `DSS_DMA_INT_RESET`"]
108pub struct DSS_DMA_INT_RESET_W<'a> {
109    w: &'a mut W,
110}
111impl<'a> DSS_DMA_INT_RESET_W<'a> {
112    #[doc = r"Writes `variant` to the field"]
113    #[inline(always)]
114    pub fn variant(self, variant: DSS_DMA_INT_RESET_AW) -> &'a mut W {
115        {
116            self.bit(variant.into())
117        }
118    }
119    #[doc = "Reset DMA interrupts in the DSS interrupt controller"]
120    #[inline(always)]
121    pub fn dss_dma_int_reset(self) -> &'a mut W {
122        self.variant(DSS_DMA_INT_RESET_AW::DSS_DMA_INT_RESET)
123    }
124    #[doc = r"Sets the field bit"]
125    #[inline(always)]
126    pub fn set_bit(self) -> &'a mut W {
127        self.bit(true)
128    }
129    #[doc = r"Clears the field bit"]
130    #[inline(always)]
131    pub fn clear_bit(self) -> &'a mut W {
132        self.bit(false)
133    }
134    #[doc = r"Writes raw bits to the field"]
135    #[inline(always)]
136    pub fn bit(self, value: bool) -> &'a mut W {
137        self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
138        self.w
139    }
140}
141#[doc = "Write a 1 to reset DSS\n\nValue on reset: 0"]
142#[derive(Clone, Copy, Debug, PartialEq)]
143pub enum DSS_RESET_AW {
144    #[doc = "1: Reset DSS"]
145    DSS_RESET = 1,
146}
147impl From<DSS_RESET_AW> for bool {
148    #[inline(always)]
149    fn from(variant: DSS_RESET_AW) -> Self {
150        variant as u8 != 0
151    }
152}
153#[doc = "Write proxy for field `DSS_RESET`"]
154pub struct DSS_RESET_W<'a> {
155    w: &'a mut W,
156}
157impl<'a> DSS_RESET_W<'a> {
158    #[doc = r"Writes `variant` to the field"]
159    #[inline(always)]
160    pub fn variant(self, variant: DSS_RESET_AW) -> &'a mut W {
161        {
162            self.bit(variant.into())
163        }
164    }
165    #[doc = "Reset DSS"]
166    #[inline(always)]
167    pub fn dss_reset(self) -> &'a mut W {
168        self.variant(DSS_RESET_AW::DSS_RESET)
169    }
170    #[doc = r"Sets the field bit"]
171    #[inline(always)]
172    pub fn set_bit(self) -> &'a mut W {
173        self.bit(true)
174    }
175    #[doc = r"Clears the field bit"]
176    #[inline(always)]
177    pub fn clear_bit(self) -> &'a mut W {
178        self.bit(false)
179    }
180    #[doc = r"Writes raw bits to the field"]
181    #[inline(always)]
182    pub fn bit(self, value: bool) -> &'a mut W {
183        self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
184        self.w
185    }
186}
187#[doc = "Write a 1 to pause LPDSP32\n\nValue on reset: 0"]
188#[derive(Clone, Copy, Debug, PartialEq)]
189pub enum LPDSP32_PAUSE_AW {
190    #[doc = "1: Pause LPDSP32"]
191    DSS_LPDSP32_PAUSE = 1,
192}
193impl From<LPDSP32_PAUSE_AW> for bool {
194    #[inline(always)]
195    fn from(variant: LPDSP32_PAUSE_AW) -> Self {
196        variant as u8 != 0
197    }
198}
199#[doc = "Write proxy for field `LPDSP32_PAUSE`"]
200pub struct LPDSP32_PAUSE_W<'a> {
201    w: &'a mut W,
202}
203impl<'a> LPDSP32_PAUSE_W<'a> {
204    #[doc = r"Writes `variant` to the field"]
205    #[inline(always)]
206    pub fn variant(self, variant: LPDSP32_PAUSE_AW) -> &'a mut W {
207        {
208            self.bit(variant.into())
209        }
210    }
211    #[doc = "Pause LPDSP32"]
212    #[inline(always)]
213    pub fn dss_lpdsp32_pause(self) -> &'a mut W {
214        self.variant(LPDSP32_PAUSE_AW::DSS_LPDSP32_PAUSE)
215    }
216    #[doc = r"Sets the field bit"]
217    #[inline(always)]
218    pub fn set_bit(self) -> &'a mut W {
219        self.bit(true)
220    }
221    #[doc = r"Clears the field bit"]
222    #[inline(always)]
223    pub fn clear_bit(self) -> &'a mut W {
224        self.bit(false)
225    }
226    #[doc = r"Writes raw bits to the field"]
227    #[inline(always)]
228    pub fn bit(self, value: bool) -> &'a mut W {
229        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
230        self.w
231    }
232}
233#[doc = "Write a 1 to run LPDSP32\n\nValue on reset: 0"]
234#[derive(Clone, Copy, Debug, PartialEq)]
235pub enum LPDSP32_RESUME_AW {
236    #[doc = "1: Resume LPDSP32"]
237    DSS_LPDSP32_RESUME = 1,
238}
239impl From<LPDSP32_RESUME_AW> for bool {
240    #[inline(always)]
241    fn from(variant: LPDSP32_RESUME_AW) -> Self {
242        variant as u8 != 0
243    }
244}
245#[doc = "Write proxy for field `LPDSP32_RESUME`"]
246pub struct LPDSP32_RESUME_W<'a> {
247    w: &'a mut W,
248}
249impl<'a> LPDSP32_RESUME_W<'a> {
250    #[doc = r"Writes `variant` to the field"]
251    #[inline(always)]
252    pub fn variant(self, variant: LPDSP32_RESUME_AW) -> &'a mut W {
253        {
254            self.bit(variant.into())
255        }
256    }
257    #[doc = "Resume LPDSP32"]
258    #[inline(always)]
259    pub fn dss_lpdsp32_resume(self) -> &'a mut W {
260        self.variant(LPDSP32_RESUME_AW::DSS_LPDSP32_RESUME)
261    }
262    #[doc = r"Sets the field bit"]
263    #[inline(always)]
264    pub fn set_bit(self) -> &'a mut W {
265        self.bit(true)
266    }
267    #[doc = r"Clears the field bit"]
268    #[inline(always)]
269    pub fn clear_bit(self) -> &'a mut W {
270        self.bit(false)
271    }
272    #[doc = r"Writes raw bits to the field"]
273    #[inline(always)]
274    pub fn bit(self, value: bool) -> &'a mut W {
275        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
276        self.w
277    }
278}
279#[doc = "LPDSP32 running status\n\nValue on reset: 0"]
280#[derive(Clone, Copy, Debug, PartialEq)]
281pub enum LPDSP32_RUNNING_A {
282    #[doc = "0: LPDSP32 paused"]
283    DSS_LPDSP32_STATE_PAUSE = 0,
284    #[doc = "1: LPDSP32 running"]
285    DSS_LPDSP32_STATE_RUN = 1,
286}
287impl From<LPDSP32_RUNNING_A> for bool {
288    #[inline(always)]
289    fn from(variant: LPDSP32_RUNNING_A) -> Self {
290        variant as u8 != 0
291    }
292}
293#[doc = "Reader of field `LPDSP32_RUNNING`"]
294pub type LPDSP32_RUNNING_R = crate::R<bool, LPDSP32_RUNNING_A>;
295impl LPDSP32_RUNNING_R {
296    #[doc = r"Get enumerated values variant"]
297    #[inline(always)]
298    pub fn variant(&self) -> LPDSP32_RUNNING_A {
299        match self.bits {
300            false => LPDSP32_RUNNING_A::DSS_LPDSP32_STATE_PAUSE,
301            true => LPDSP32_RUNNING_A::DSS_LPDSP32_STATE_RUN,
302        }
303    }
304    #[doc = "Checks if the value of the field is `DSS_LPDSP32_STATE_PAUSE`"]
305    #[inline(always)]
306    pub fn is_dss_lpdsp32_state_pause(&self) -> bool {
307        *self == LPDSP32_RUNNING_A::DSS_LPDSP32_STATE_PAUSE
308    }
309    #[doc = "Checks if the value of the field is `DSS_LPDSP32_STATE_RUN`"]
310    #[inline(always)]
311    pub fn is_dss_lpdsp32_state_run(&self) -> bool {
312        *self == LPDSP32_RUNNING_A::DSS_LPDSP32_STATE_RUN
313    }
314}
315impl R {
316    #[doc = "Bit 8 - LPDSP32 feature status"]
317    #[inline(always)]
318    pub fn lpdsp32_status(&self) -> LPDSP32_STATUS_R {
319        LPDSP32_STATUS_R::new(((self.bits >> 8) & 0x01) != 0)
320    }
321    #[doc = "Bit 0 - LPDSP32 running status"]
322    #[inline(always)]
323    pub fn lpdsp32_running(&self) -> LPDSP32_RUNNING_R {
324        LPDSP32_RUNNING_R::new((self.bits & 0x01) != 0)
325    }
326}
327impl W {
328    #[doc = "Bit 5 - Write a 1 to reset pending CSS interrupts in the DSS interrupt controller"]
329    #[inline(always)]
330    pub fn dss_css_int_reset(&mut self) -> DSS_CSS_INT_RESET_W {
331        DSS_CSS_INT_RESET_W { w: self }
332    }
333    #[doc = "Bit 4 - Write a 1 to reset pending DMA interrupts in the DSS interrupt controller"]
334    #[inline(always)]
335    pub fn dss_dma_int_reset(&mut self) -> DSS_DMA_INT_RESET_W {
336        DSS_DMA_INT_RESET_W { w: self }
337    }
338    #[doc = "Bit 3 - Write a 1 to reset DSS"]
339    #[inline(always)]
340    pub fn dss_reset(&mut self) -> DSS_RESET_W {
341        DSS_RESET_W { w: self }
342    }
343    #[doc = "Bit 2 - Write a 1 to pause LPDSP32"]
344    #[inline(always)]
345    pub fn lpdsp32_pause(&mut self) -> LPDSP32_PAUSE_W {
346        LPDSP32_PAUSE_W { w: self }
347    }
348    #[doc = "Bit 1 - Write a 1 to run LPDSP32"]
349    #[inline(always)]
350    pub fn lpdsp32_resume(&mut self) -> LPDSP32_RESUME_W {
351        LPDSP32_RESUME_W { w: self }
352    }
353}
rsl10_pac/sysctrl/sysctrl_dss_ctrl.rs

rsl10_pac/sysctrl/
sysctrl_dss_ctrl.rs
