rsl10_pac/
sysctrl.rs

1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    #[doc = "0x00 - DSS Control"]
5    pub sysctrl_dss_ctrl: SYSCTRL_DSS_CTRL,
6    #[doc = "0x04 - DSS Commands"]
7    pub sysctrl_dss_cmd: SYSCTRL_DSS_CMD,
8    #[doc = "0x08 - Flash Overlay Configuration"]
9    pub sysctrl_flash_overlay_cfg: SYSCTRL_FLASH_OVERLAY_CFG,
10    #[doc = "0x0c - CSS Loop Cache Configuration"]
11    pub sysctrl_css_loop_cache_cfg: SYSCTRL_CSS_LOOP_CACHE_CFG,
12    #[doc = "0x10 - DSS Loop Cache Configuration"]
13    pub sysctrl_dss_loop_cache_cfg: SYSCTRL_DSS_LOOP_CACHE_CFG,
14    #[doc = "0x14 - Memory Access Error Flags"]
15    pub sysctrl_mem_error: SYSCTRL_MEM_ERROR,
16    #[doc = "0x18 - Memory Power Configuration"]
17    pub sysctrl_mem_power_cfg: SYSCTRL_MEM_POWER_CFG,
18    #[doc = "0x1c - Memory Access Configuration and Wakeup Restore Address in packed 7-bit format"]
19    pub sysctrl_mem_access_cfg: SYSCTRL_MEM_ACCESS_CFG,
20    #[doc = "0x20 - Wakeup Restore Address in Unpacked 32-bit Format"]
21    pub sysctrl_wakeup_addr: SYSCTRL_WAKEUP_ADDR,
22    #[doc = "0x24 - Memory Retention Configuration"]
23    pub sysctrl_mem_retention_cfg: SYSCTRL_MEM_RETENTION_CFG,
24    #[doc = "0x28 - Memory Arbiter Configuration"]
25    pub sysctrl_mem_arbiter_cfg: SYSCTRL_MEM_ARBITER_CFG,
26    #[doc = "0x2c - Memory Timing Configuration"]
27    pub sysctrl_mem_timing_cfg: SYSCTRL_MEM_TIMING_CFG,
28    #[doc = "0x30 - Activity Counters Control"]
29    pub sysctrl_cnt_ctrl: SYSCTRL_CNT_CTRL,
30    #[doc = "0x34 - System Clock Counter Value"]
31    pub sysctrl_sysclk_cnt: SYSCTRL_SYSCLK_CNT,
32    #[doc = "0x38 - CM3 Activity Counter Value"]
33    pub sysctrl_cm3_cnt: SYSCTRL_CM3_CNT,
34    #[doc = "0x3c - LPDSP32 Activity Counter Value"]
35    pub sysctrl_lpdsp32_cnt: SYSCTRL_LPDSP32_CNT,
36    #[doc = "0x40 - Flash Read Access Counter Value"]
37    pub sysctrl_flash_read_cnt: SYSCTRL_FLASH_READ_CNT,
38    _reserved17: [u8; 4usize],
39    #[doc = "0x48 - Critical Path Speed Measurement"]
40    pub sysctrl_speed_measure: SYSCTRL_SPEED_MEASURE,
41    #[doc = "0x4c - LPDSP32 Debug Port Configuration"]
42    pub sysctrl_lpdsp32_debug_cfg: SYSCTRL_LPDSP32_DEBUG_CFG,
43    #[doc = "0x50 - RF Power Configuration"]
44    pub sysctrl_rf_power_cfg: SYSCTRL_RF_POWER_CFG,
45    #[doc = "0x54 - RF Access Configuration"]
46    pub sysctrl_rf_access_cfg: SYSCTRL_RF_ACCESS_CFG,
47    #[doc = "0x58 - WAKEUP Pad Value"]
48    pub sysctrl_wakeup_pad: SYSCTRL_WAKEUP_PAD,
49    _reserved22: [u8; 128usize],
50    #[doc = "0xdc - Debug Port Access Configuration"]
51    pub sysctrl_dbg_lock: SYSCTRL_DBG_LOCK,
52    #[doc = "0xe0 - Debug Port Lock Key Part 0 to 3"]
53    pub sysctrl_dbg_lock_key: [SYSCTRL_DBG_LOCK_KEY; 4],
54}
55#[doc = "DSS Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_dss_ctrl](sysctrl_dss_ctrl) module"]
56pub type SYSCTRL_DSS_CTRL = crate::Reg<u32, _SYSCTRL_DSS_CTRL>;
57#[allow(missing_docs)]
58#[doc(hidden)]
59pub struct _SYSCTRL_DSS_CTRL;
60#[doc = "`read()` method returns [sysctrl_dss_ctrl::R](sysctrl_dss_ctrl::R) reader structure"]
61impl crate::Readable for SYSCTRL_DSS_CTRL {}
62#[doc = "`write(|w| ..)` method takes [sysctrl_dss_ctrl::W](sysctrl_dss_ctrl::W) writer structure"]
63impl crate::Writable for SYSCTRL_DSS_CTRL {}
64#[doc = "DSS Control"]
65pub mod sysctrl_dss_ctrl;
66#[doc = "DSS Commands\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_dss_cmd](sysctrl_dss_cmd) module"]
67pub type SYSCTRL_DSS_CMD = crate::Reg<u32, _SYSCTRL_DSS_CMD>;
68#[allow(missing_docs)]
69#[doc(hidden)]
70pub struct _SYSCTRL_DSS_CMD;
71#[doc = "`read()` method returns [sysctrl_dss_cmd::R](sysctrl_dss_cmd::R) reader structure"]
72impl crate::Readable for SYSCTRL_DSS_CMD {}
73#[doc = "`write(|w| ..)` method takes [sysctrl_dss_cmd::W](sysctrl_dss_cmd::W) writer structure"]
74impl crate::Writable for SYSCTRL_DSS_CMD {}
75#[doc = "DSS Commands"]
76pub mod sysctrl_dss_cmd;
77#[doc = "Flash Overlay Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_flash_overlay_cfg](sysctrl_flash_overlay_cfg) module"]
78pub type SYSCTRL_FLASH_OVERLAY_CFG = crate::Reg<u32, _SYSCTRL_FLASH_OVERLAY_CFG>;
79#[allow(missing_docs)]
80#[doc(hidden)]
81pub struct _SYSCTRL_FLASH_OVERLAY_CFG;
82#[doc = "`read()` method returns [sysctrl_flash_overlay_cfg::R](sysctrl_flash_overlay_cfg::R) reader structure"]
83impl crate::Readable for SYSCTRL_FLASH_OVERLAY_CFG {}
84#[doc = "`write(|w| ..)` method takes [sysctrl_flash_overlay_cfg::W](sysctrl_flash_overlay_cfg::W) writer structure"]
85impl crate::Writable for SYSCTRL_FLASH_OVERLAY_CFG {}
86#[doc = "Flash Overlay Configuration"]
87pub mod sysctrl_flash_overlay_cfg;
88#[doc = "CSS Loop Cache Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_css_loop_cache_cfg](sysctrl_css_loop_cache_cfg) module"]
89pub type SYSCTRL_CSS_LOOP_CACHE_CFG = crate::Reg<u32, _SYSCTRL_CSS_LOOP_CACHE_CFG>;
90#[allow(missing_docs)]
91#[doc(hidden)]
92pub struct _SYSCTRL_CSS_LOOP_CACHE_CFG;
93#[doc = "`read()` method returns [sysctrl_css_loop_cache_cfg::R](sysctrl_css_loop_cache_cfg::R) reader structure"]
94impl crate::Readable for SYSCTRL_CSS_LOOP_CACHE_CFG {}
95#[doc = "`write(|w| ..)` method takes [sysctrl_css_loop_cache_cfg::W](sysctrl_css_loop_cache_cfg::W) writer structure"]
96impl crate::Writable for SYSCTRL_CSS_LOOP_CACHE_CFG {}
97#[doc = "CSS Loop Cache Configuration"]
98pub mod sysctrl_css_loop_cache_cfg;
99#[doc = "DSS Loop Cache Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_dss_loop_cache_cfg](sysctrl_dss_loop_cache_cfg) module"]
100pub type SYSCTRL_DSS_LOOP_CACHE_CFG = crate::Reg<u32, _SYSCTRL_DSS_LOOP_CACHE_CFG>;
101#[allow(missing_docs)]
102#[doc(hidden)]
103pub struct _SYSCTRL_DSS_LOOP_CACHE_CFG;
104#[doc = "`read()` method returns [sysctrl_dss_loop_cache_cfg::R](sysctrl_dss_loop_cache_cfg::R) reader structure"]
105impl crate::Readable for SYSCTRL_DSS_LOOP_CACHE_CFG {}
106#[doc = "`write(|w| ..)` method takes [sysctrl_dss_loop_cache_cfg::W](sysctrl_dss_loop_cache_cfg::W) writer structure"]
107impl crate::Writable for SYSCTRL_DSS_LOOP_CACHE_CFG {}
108#[doc = "DSS Loop Cache Configuration"]
109pub mod sysctrl_dss_loop_cache_cfg;
110#[doc = "Memory Access Error Flags\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_mem_error](sysctrl_mem_error) module"]
111pub type SYSCTRL_MEM_ERROR = crate::Reg<u32, _SYSCTRL_MEM_ERROR>;
112#[allow(missing_docs)]
113#[doc(hidden)]
114pub struct _SYSCTRL_MEM_ERROR;
115#[doc = "`read()` method returns [sysctrl_mem_error::R](sysctrl_mem_error::R) reader structure"]
116impl crate::Readable for SYSCTRL_MEM_ERROR {}
117#[doc = "`write(|w| ..)` method takes [sysctrl_mem_error::W](sysctrl_mem_error::W) writer structure"]
118impl crate::Writable for SYSCTRL_MEM_ERROR {}
119#[doc = "Memory Access Error Flags"]
120pub mod sysctrl_mem_error;
121#[doc = "Memory Power Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_mem_power_cfg](sysctrl_mem_power_cfg) module"]
122pub type SYSCTRL_MEM_POWER_CFG = crate::Reg<u32, _SYSCTRL_MEM_POWER_CFG>;
123#[allow(missing_docs)]
124#[doc(hidden)]
125pub struct _SYSCTRL_MEM_POWER_CFG;
126#[doc = "`read()` method returns [sysctrl_mem_power_cfg::R](sysctrl_mem_power_cfg::R) reader structure"]
127impl crate::Readable for SYSCTRL_MEM_POWER_CFG {}
128#[doc = "`write(|w| ..)` method takes [sysctrl_mem_power_cfg::W](sysctrl_mem_power_cfg::W) writer structure"]
129impl crate::Writable for SYSCTRL_MEM_POWER_CFG {}
130#[doc = "Memory Power Configuration"]
131pub mod sysctrl_mem_power_cfg;
132#[doc = "Memory Access Configuration and Wakeup Restore Address in packed 7-bit format\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_mem_access_cfg](sysctrl_mem_access_cfg) module"]
133pub type SYSCTRL_MEM_ACCESS_CFG = crate::Reg<u32, _SYSCTRL_MEM_ACCESS_CFG>;
134#[allow(missing_docs)]
135#[doc(hidden)]
136pub struct _SYSCTRL_MEM_ACCESS_CFG;
137#[doc = "`read()` method returns [sysctrl_mem_access_cfg::R](sysctrl_mem_access_cfg::R) reader structure"]
138impl crate::Readable for SYSCTRL_MEM_ACCESS_CFG {}
139#[doc = "`write(|w| ..)` method takes [sysctrl_mem_access_cfg::W](sysctrl_mem_access_cfg::W) writer structure"]
140impl crate::Writable for SYSCTRL_MEM_ACCESS_CFG {}
141#[doc = "Memory Access Configuration and Wakeup Restore Address in packed 7-bit format"]
142pub mod sysctrl_mem_access_cfg;
143#[doc = "Wakeup Restore Address in Unpacked 32-bit Format\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_wakeup_addr](sysctrl_wakeup_addr) module"]
144pub type SYSCTRL_WAKEUP_ADDR = crate::Reg<u32, _SYSCTRL_WAKEUP_ADDR>;
145#[allow(missing_docs)]
146#[doc(hidden)]
147pub struct _SYSCTRL_WAKEUP_ADDR;
148#[doc = "`read()` method returns [sysctrl_wakeup_addr::R](sysctrl_wakeup_addr::R) reader structure"]
149impl crate::Readable for SYSCTRL_WAKEUP_ADDR {}
150#[doc = "`write(|w| ..)` method takes [sysctrl_wakeup_addr::W](sysctrl_wakeup_addr::W) writer structure"]
151impl crate::Writable for SYSCTRL_WAKEUP_ADDR {}
152#[doc = "Wakeup Restore Address in Unpacked 32-bit Format"]
153pub mod sysctrl_wakeup_addr;
154#[doc = "Memory Retention Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_mem_retention_cfg](sysctrl_mem_retention_cfg) module"]
155pub type SYSCTRL_MEM_RETENTION_CFG = crate::Reg<u32, _SYSCTRL_MEM_RETENTION_CFG>;
156#[allow(missing_docs)]
157#[doc(hidden)]
158pub struct _SYSCTRL_MEM_RETENTION_CFG;
159#[doc = "`read()` method returns [sysctrl_mem_retention_cfg::R](sysctrl_mem_retention_cfg::R) reader structure"]
160impl crate::Readable for SYSCTRL_MEM_RETENTION_CFG {}
161#[doc = "`write(|w| ..)` method takes [sysctrl_mem_retention_cfg::W](sysctrl_mem_retention_cfg::W) writer structure"]
162impl crate::Writable for SYSCTRL_MEM_RETENTION_CFG {}
163#[doc = "Memory Retention Configuration"]
164pub mod sysctrl_mem_retention_cfg;
165#[doc = "Memory Arbiter Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_mem_arbiter_cfg](sysctrl_mem_arbiter_cfg) module"]
166pub type SYSCTRL_MEM_ARBITER_CFG = crate::Reg<u32, _SYSCTRL_MEM_ARBITER_CFG>;
167#[allow(missing_docs)]
168#[doc(hidden)]
169pub struct _SYSCTRL_MEM_ARBITER_CFG;
170#[doc = "`read()` method returns [sysctrl_mem_arbiter_cfg::R](sysctrl_mem_arbiter_cfg::R) reader structure"]
171impl crate::Readable for SYSCTRL_MEM_ARBITER_CFG {}
172#[doc = "`write(|w| ..)` method takes [sysctrl_mem_arbiter_cfg::W](sysctrl_mem_arbiter_cfg::W) writer structure"]
173impl crate::Writable for SYSCTRL_MEM_ARBITER_CFG {}
174#[doc = "Memory Arbiter Configuration"]
175pub mod sysctrl_mem_arbiter_cfg;
176#[doc = "Memory Timing Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_mem_timing_cfg](sysctrl_mem_timing_cfg) module"]
177pub type SYSCTRL_MEM_TIMING_CFG = crate::Reg<u32, _SYSCTRL_MEM_TIMING_CFG>;
178#[allow(missing_docs)]
179#[doc(hidden)]
180pub struct _SYSCTRL_MEM_TIMING_CFG;
181#[doc = "`read()` method returns [sysctrl_mem_timing_cfg::R](sysctrl_mem_timing_cfg::R) reader structure"]
182impl crate::Readable for SYSCTRL_MEM_TIMING_CFG {}
183#[doc = "`write(|w| ..)` method takes [sysctrl_mem_timing_cfg::W](sysctrl_mem_timing_cfg::W) writer structure"]
184impl crate::Writable for SYSCTRL_MEM_TIMING_CFG {}
185#[doc = "Memory Timing Configuration"]
186pub mod sysctrl_mem_timing_cfg;
187#[doc = "Activity Counters Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_cnt_ctrl](sysctrl_cnt_ctrl) module"]
188pub type SYSCTRL_CNT_CTRL = crate::Reg<u32, _SYSCTRL_CNT_CTRL>;
189#[allow(missing_docs)]
190#[doc(hidden)]
191pub struct _SYSCTRL_CNT_CTRL;
192#[doc = "`read()` method returns [sysctrl_cnt_ctrl::R](sysctrl_cnt_ctrl::R) reader structure"]
193impl crate::Readable for SYSCTRL_CNT_CTRL {}
194#[doc = "`write(|w| ..)` method takes [sysctrl_cnt_ctrl::W](sysctrl_cnt_ctrl::W) writer structure"]
195impl crate::Writable for SYSCTRL_CNT_CTRL {}
196#[doc = "Activity Counters Control"]
197pub mod sysctrl_cnt_ctrl;
198#[doc = "System Clock Counter Value\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_sysclk_cnt](sysctrl_sysclk_cnt) module"]
199pub type SYSCTRL_SYSCLK_CNT = crate::Reg<u32, _SYSCTRL_SYSCLK_CNT>;
200#[allow(missing_docs)]
201#[doc(hidden)]
202pub struct _SYSCTRL_SYSCLK_CNT;
203#[doc = "`read()` method returns [sysctrl_sysclk_cnt::R](sysctrl_sysclk_cnt::R) reader structure"]
204impl crate::Readable for SYSCTRL_SYSCLK_CNT {}
205#[doc = "`write(|w| ..)` method takes [sysctrl_sysclk_cnt::W](sysctrl_sysclk_cnt::W) writer structure"]
206impl crate::Writable for SYSCTRL_SYSCLK_CNT {}
207#[doc = "System Clock Counter Value"]
208pub mod sysctrl_sysclk_cnt;
209#[doc = "CM3 Activity Counter Value\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_cm3_cnt](sysctrl_cm3_cnt) module"]
210pub type SYSCTRL_CM3_CNT = crate::Reg<u32, _SYSCTRL_CM3_CNT>;
211#[allow(missing_docs)]
212#[doc(hidden)]
213pub struct _SYSCTRL_CM3_CNT;
214#[doc = "`read()` method returns [sysctrl_cm3_cnt::R](sysctrl_cm3_cnt::R) reader structure"]
215impl crate::Readable for SYSCTRL_CM3_CNT {}
216#[doc = "`write(|w| ..)` method takes [sysctrl_cm3_cnt::W](sysctrl_cm3_cnt::W) writer structure"]
217impl crate::Writable for SYSCTRL_CM3_CNT {}
218#[doc = "CM3 Activity Counter Value"]
219pub mod sysctrl_cm3_cnt;
220#[doc = "LPDSP32 Activity Counter Value\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_lpdsp32_cnt](sysctrl_lpdsp32_cnt) module"]
221pub type SYSCTRL_LPDSP32_CNT = crate::Reg<u32, _SYSCTRL_LPDSP32_CNT>;
222#[allow(missing_docs)]
223#[doc(hidden)]
224pub struct _SYSCTRL_LPDSP32_CNT;
225#[doc = "`read()` method returns [sysctrl_lpdsp32_cnt::R](sysctrl_lpdsp32_cnt::R) reader structure"]
226impl crate::Readable for SYSCTRL_LPDSP32_CNT {}
227#[doc = "`write(|w| ..)` method takes [sysctrl_lpdsp32_cnt::W](sysctrl_lpdsp32_cnt::W) writer structure"]
228impl crate::Writable for SYSCTRL_LPDSP32_CNT {}
229#[doc = "LPDSP32 Activity Counter Value"]
230pub mod sysctrl_lpdsp32_cnt;
231#[doc = "Flash Read Access Counter Value\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_flash_read_cnt](sysctrl_flash_read_cnt) module"]
232pub type SYSCTRL_FLASH_READ_CNT = crate::Reg<u32, _SYSCTRL_FLASH_READ_CNT>;
233#[allow(missing_docs)]
234#[doc(hidden)]
235pub struct _SYSCTRL_FLASH_READ_CNT;
236#[doc = "`read()` method returns [sysctrl_flash_read_cnt::R](sysctrl_flash_read_cnt::R) reader structure"]
237impl crate::Readable for SYSCTRL_FLASH_READ_CNT {}
238#[doc = "`write(|w| ..)` method takes [sysctrl_flash_read_cnt::W](sysctrl_flash_read_cnt::W) writer structure"]
239impl crate::Writable for SYSCTRL_FLASH_READ_CNT {}
240#[doc = "Flash Read Access Counter Value"]
241pub mod sysctrl_flash_read_cnt;
242#[doc = "Critical Path Speed Measurement\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_speed_measure](sysctrl_speed_measure) module"]
243pub type SYSCTRL_SPEED_MEASURE = crate::Reg<u32, _SYSCTRL_SPEED_MEASURE>;
244#[allow(missing_docs)]
245#[doc(hidden)]
246pub struct _SYSCTRL_SPEED_MEASURE;
247#[doc = "`read()` method returns [sysctrl_speed_measure::R](sysctrl_speed_measure::R) reader structure"]
248impl crate::Readable for SYSCTRL_SPEED_MEASURE {}
249#[doc = "`write(|w| ..)` method takes [sysctrl_speed_measure::W](sysctrl_speed_measure::W) writer structure"]
250impl crate::Writable for SYSCTRL_SPEED_MEASURE {}
251#[doc = "Critical Path Speed Measurement"]
252pub mod sysctrl_speed_measure;
253#[doc = "LPDSP32 Debug Port Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_lpdsp32_debug_cfg](sysctrl_lpdsp32_debug_cfg) module"]
254pub type SYSCTRL_LPDSP32_DEBUG_CFG = crate::Reg<u32, _SYSCTRL_LPDSP32_DEBUG_CFG>;
255#[allow(missing_docs)]
256#[doc(hidden)]
257pub struct _SYSCTRL_LPDSP32_DEBUG_CFG;
258#[doc = "`read()` method returns [sysctrl_lpdsp32_debug_cfg::R](sysctrl_lpdsp32_debug_cfg::R) reader structure"]
259impl crate::Readable for SYSCTRL_LPDSP32_DEBUG_CFG {}
260#[doc = "`write(|w| ..)` method takes [sysctrl_lpdsp32_debug_cfg::W](sysctrl_lpdsp32_debug_cfg::W) writer structure"]
261impl crate::Writable for SYSCTRL_LPDSP32_DEBUG_CFG {}
262#[doc = "LPDSP32 Debug Port Configuration"]
263pub mod sysctrl_lpdsp32_debug_cfg;
264#[doc = "RF Power Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_rf_power_cfg](sysctrl_rf_power_cfg) module"]
265pub type SYSCTRL_RF_POWER_CFG = crate::Reg<u32, _SYSCTRL_RF_POWER_CFG>;
266#[allow(missing_docs)]
267#[doc(hidden)]
268pub struct _SYSCTRL_RF_POWER_CFG;
269#[doc = "`read()` method returns [sysctrl_rf_power_cfg::R](sysctrl_rf_power_cfg::R) reader structure"]
270impl crate::Readable for SYSCTRL_RF_POWER_CFG {}
271#[doc = "`write(|w| ..)` method takes [sysctrl_rf_power_cfg::W](sysctrl_rf_power_cfg::W) writer structure"]
272impl crate::Writable for SYSCTRL_RF_POWER_CFG {}
273#[doc = "RF Power Configuration"]
274pub mod sysctrl_rf_power_cfg;
275#[doc = "RF Access Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_rf_access_cfg](sysctrl_rf_access_cfg) module"]
276pub type SYSCTRL_RF_ACCESS_CFG = crate::Reg<u32, _SYSCTRL_RF_ACCESS_CFG>;
277#[allow(missing_docs)]
278#[doc(hidden)]
279pub struct _SYSCTRL_RF_ACCESS_CFG;
280#[doc = "`read()` method returns [sysctrl_rf_access_cfg::R](sysctrl_rf_access_cfg::R) reader structure"]
281impl crate::Readable for SYSCTRL_RF_ACCESS_CFG {}
282#[doc = "`write(|w| ..)` method takes [sysctrl_rf_access_cfg::W](sysctrl_rf_access_cfg::W) writer structure"]
283impl crate::Writable for SYSCTRL_RF_ACCESS_CFG {}
284#[doc = "RF Access Configuration"]
285pub mod sysctrl_rf_access_cfg;
286#[doc = "WAKEUP Pad Value\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_wakeup_pad](sysctrl_wakeup_pad) module"]
287pub type SYSCTRL_WAKEUP_PAD = crate::Reg<u32, _SYSCTRL_WAKEUP_PAD>;
288#[allow(missing_docs)]
289#[doc(hidden)]
290pub struct _SYSCTRL_WAKEUP_PAD;
291#[doc = "`read()` method returns [sysctrl_wakeup_pad::R](sysctrl_wakeup_pad::R) reader structure"]
292impl crate::Readable for SYSCTRL_WAKEUP_PAD {}
293#[doc = "WAKEUP Pad Value"]
294pub mod sysctrl_wakeup_pad;
295#[doc = "Debug Port Access Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_dbg_lock](sysctrl_dbg_lock) module"]
296pub type SYSCTRL_DBG_LOCK = crate::Reg<u32, _SYSCTRL_DBG_LOCK>;
297#[allow(missing_docs)]
298#[doc(hidden)]
299pub struct _SYSCTRL_DBG_LOCK;
300#[doc = "`read()` method returns [sysctrl_dbg_lock::R](sysctrl_dbg_lock::R) reader structure"]
301impl crate::Readable for SYSCTRL_DBG_LOCK {}
302#[doc = "`write(|w| ..)` method takes [sysctrl_dbg_lock::W](sysctrl_dbg_lock::W) writer structure"]
303impl crate::Writable for SYSCTRL_DBG_LOCK {}
304#[doc = "Debug Port Access Configuration"]
305pub mod sysctrl_dbg_lock;
306#[doc = "Debug Port Lock Key Part 0 to 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysctrl_dbg_lock_key](sysctrl_dbg_lock_key) module"]
307pub type SYSCTRL_DBG_LOCK_KEY = crate::Reg<u32, _SYSCTRL_DBG_LOCK_KEY>;
308#[allow(missing_docs)]
309#[doc(hidden)]
310pub struct _SYSCTRL_DBG_LOCK_KEY;
311#[doc = "`read()` method returns [sysctrl_dbg_lock_key::R](sysctrl_dbg_lock_key::R) reader structure"]
312impl crate::Readable for SYSCTRL_DBG_LOCK_KEY {}
313#[doc = "`write(|w| ..)` method takes [sysctrl_dbg_lock_key::W](sysctrl_dbg_lock_key::W) writer structure"]
314impl crate::Writable for SYSCTRL_DBG_LOCK_KEY {}
315#[doc = "Debug Port Lock Key Part 0 to 3"]
316pub mod sysctrl_dbg_lock_key;
rsl10_pac/sysctrl.rs

rsl10_pac/
sysctrl.rs
