rsl10_pac/spi0/
spi0_ctrl1.rs

1#[doc = "Reader of register SPI0_CTRL1"]
2pub type R = crate::R<u32, super::SPI0_CTRL1>;
3#[doc = "Writer for register SPI0_CTRL1"]
4pub type W = crate::W<u32, super::SPI0_CTRL1>;
5#[doc = "Register SPI0_CTRL1 `reset()`'s with value 0x20"]
6impl crate::ResetValue for super::SPI0_CTRL1 {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0x20
11    }
12}
13#[doc = "Start an SPI data transfer and indicate if a transfer is in progress\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15pub enum SPI0_START_BUSY_AW {
16    #[doc = "0: Stop a transfer or indicate that the SPI interface is idle"]
17    SPI0_IDLE = 0,
18    #[doc = "1: Start a transfer on the SPI interface (master mode only)"]
19    SPI0_START = 1,
20}
21impl From<SPI0_START_BUSY_AW> for bool {
22    #[inline(always)]
23    fn from(variant: SPI0_START_BUSY_AW) -> Self {
24        variant as u8 != 0
25    }
26}
27#[doc = "Write proxy for field `SPI0_START_BUSY`"]
28pub struct SPI0_START_BUSY_W<'a> {
29    w: &'a mut W,
30}
31impl<'a> SPI0_START_BUSY_W<'a> {
32    #[doc = r"Writes `variant` to the field"]
33    #[inline(always)]
34    pub fn variant(self, variant: SPI0_START_BUSY_AW) -> &'a mut W {
35        {
36            self.bit(variant.into())
37        }
38    }
39    #[doc = "Stop a transfer or indicate that the SPI interface is idle"]
40    #[inline(always)]
41    pub fn spi0_idle(self) -> &'a mut W {
42        self.variant(SPI0_START_BUSY_AW::SPI0_IDLE)
43    }
44    #[doc = "Start a transfer on the SPI interface (master mode only)"]
45    #[inline(always)]
46    pub fn spi0_start(self) -> &'a mut W {
47        self.variant(SPI0_START_BUSY_AW::SPI0_START)
48    }
49    #[doc = r"Sets the field bit"]
50    #[inline(always)]
51    pub fn set_bit(self) -> &'a mut W {
52        self.bit(true)
53    }
54    #[doc = r"Clears the field bit"]
55    #[inline(always)]
56    pub fn clear_bit(self) -> &'a mut W {
57        self.bit(false)
58    }
59    #[doc = r"Writes raw bits to the field"]
60    #[inline(always)]
61    pub fn bit(self, value: bool) -> &'a mut W {
62        self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
63        self.w
64    }
65}
66#[doc = "SPI data transfer status read\n\nValue on reset: 0"]
67#[derive(Clone, Copy, Debug, PartialEq)]
68pub enum SPI0_BUSY_STATUS_A {
69    #[doc = "1: Indicate that the SPI interface is currently transferring data"]
70    SPI0_BUSY = 1,
71}
72impl From<SPI0_BUSY_STATUS_A> for bool {
73    #[inline(always)]
74    fn from(variant: SPI0_BUSY_STATUS_A) -> Self {
75        variant as u8 != 0
76    }
77}
78#[doc = "Reader of field `SPI0_BUSY_STATUS`"]
79pub type SPI0_BUSY_STATUS_R = crate::R<bool, SPI0_BUSY_STATUS_A>;
80impl SPI0_BUSY_STATUS_R {
81    #[doc = r"Get enumerated values variant"]
82    #[inline(always)]
83    pub fn variant(&self) -> crate::Variant<bool, SPI0_BUSY_STATUS_A> {
84        use crate::Variant::*;
85        match self.bits {
86            true => Val(SPI0_BUSY_STATUS_A::SPI0_BUSY),
87            i => Res(i),
88        }
89    }
90    #[doc = "Checks if the value of the field is `SPI0_BUSY`"]
91    #[inline(always)]
92    pub fn is_spi0_busy(&self) -> bool {
93        *self == SPI0_BUSY_STATUS_A::SPI0_BUSY
94    }
95}
96#[doc = "Issue a read command or write command to the SPI interface\n\nValue on reset: 0"]
97#[derive(Clone, Copy, Debug, PartialEq)]
98#[repr(u8)]
99pub enum SPI0_RW_CMD_A {
100    #[doc = "0: No operation"]
101    SPI0_NOP = 0,
102    #[doc = "1: Write data using the SPI interface"]
103    SPI0_WRITE_DATA = 1,
104    #[doc = "2: Read data using the SPI interface"]
105    SPI0_READ_DATA = 2,
106    #[doc = "3: Read and write data using the SPI interface"]
107    SPI0_RW_DATA = 3,
108}
109impl From<SPI0_RW_CMD_A> for u8 {
110    #[inline(always)]
111    fn from(variant: SPI0_RW_CMD_A) -> Self {
112        variant as _
113    }
114}
115#[doc = "Reader of field `SPI0_RW_CMD`"]
116pub type SPI0_RW_CMD_R = crate::R<u8, SPI0_RW_CMD_A>;
117impl SPI0_RW_CMD_R {
118    #[doc = r"Get enumerated values variant"]
119    #[inline(always)]
120    pub fn variant(&self) -> SPI0_RW_CMD_A {
121        match self.bits {
122            0 => SPI0_RW_CMD_A::SPI0_NOP,
123            1 => SPI0_RW_CMD_A::SPI0_WRITE_DATA,
124            2 => SPI0_RW_CMD_A::SPI0_READ_DATA,
125            3 => SPI0_RW_CMD_A::SPI0_RW_DATA,
126            _ => unreachable!(),
127        }
128    }
129    #[doc = "Checks if the value of the field is `SPI0_NOP`"]
130    #[inline(always)]
131    pub fn is_spi0_nop(&self) -> bool {
132        *self == SPI0_RW_CMD_A::SPI0_NOP
133    }
134    #[doc = "Checks if the value of the field is `SPI0_WRITE_DATA`"]
135    #[inline(always)]
136    pub fn is_spi0_write_data(&self) -> bool {
137        *self == SPI0_RW_CMD_A::SPI0_WRITE_DATA
138    }
139    #[doc = "Checks if the value of the field is `SPI0_READ_DATA`"]
140    #[inline(always)]
141    pub fn is_spi0_read_data(&self) -> bool {
142        *self == SPI0_RW_CMD_A::SPI0_READ_DATA
143    }
144    #[doc = "Checks if the value of the field is `SPI0_RW_DATA`"]
145    #[inline(always)]
146    pub fn is_spi0_rw_data(&self) -> bool {
147        *self == SPI0_RW_CMD_A::SPI0_RW_DATA
148    }
149}
150#[doc = "Write proxy for field `SPI0_RW_CMD`"]
151pub struct SPI0_RW_CMD_W<'a> {
152    w: &'a mut W,
153}
154impl<'a> SPI0_RW_CMD_W<'a> {
155    #[doc = r"Writes `variant` to the field"]
156    #[inline(always)]
157    pub fn variant(self, variant: SPI0_RW_CMD_A) -> &'a mut W {
158        {
159            self.bits(variant.into())
160        }
161    }
162    #[doc = "No operation"]
163    #[inline(always)]
164    pub fn spi0_nop(self) -> &'a mut W {
165        self.variant(SPI0_RW_CMD_A::SPI0_NOP)
166    }
167    #[doc = "Write data using the SPI interface"]
168    #[inline(always)]
169    pub fn spi0_write_data(self) -> &'a mut W {
170        self.variant(SPI0_RW_CMD_A::SPI0_WRITE_DATA)
171    }
172    #[doc = "Read data using the SPI interface"]
173    #[inline(always)]
174    pub fn spi0_read_data(self) -> &'a mut W {
175        self.variant(SPI0_RW_CMD_A::SPI0_READ_DATA)
176    }
177    #[doc = "Read and write data using the SPI interface"]
178    #[inline(always)]
179    pub fn spi0_rw_data(self) -> &'a mut W {
180        self.variant(SPI0_RW_CMD_A::SPI0_RW_DATA)
181    }
182    #[doc = r"Writes raw bits to the field"]
183    #[inline(always)]
184    pub fn bits(self, value: u8) -> &'a mut W {
185        self.w.bits = (self.w.bits & !(0x03 << 6)) | (((value as u32) & 0x03) << 6);
186        self.w
187    }
188}
189#[doc = "Set the chip-select line for SPI (master mode), read the chip-select line for SPI (slave mode)\n\nValue on reset: 1"]
190#[derive(Clone, Copy, Debug, PartialEq)]
191pub enum SPI0_CS_A {
192    #[doc = "0: Set the SPI CS signal low"]
193    SPI0_CS_0 = 0,
194    #[doc = "1: Set the SPI CS signal high"]
195    SPI0_CS_1 = 1,
196}
197impl From<SPI0_CS_A> for bool {
198    #[inline(always)]
199    fn from(variant: SPI0_CS_A) -> Self {
200        variant as u8 != 0
201    }
202}
203#[doc = "Reader of field `SPI0_CS`"]
204pub type SPI0_CS_R = crate::R<bool, SPI0_CS_A>;
205impl SPI0_CS_R {
206    #[doc = r"Get enumerated values variant"]
207    #[inline(always)]
208    pub fn variant(&self) -> SPI0_CS_A {
209        match self.bits {
210            false => SPI0_CS_A::SPI0_CS_0,
211            true => SPI0_CS_A::SPI0_CS_1,
212        }
213    }
214    #[doc = "Checks if the value of the field is `SPI0_CS_0`"]
215    #[inline(always)]
216    pub fn is_spi0_cs_0(&self) -> bool {
217        *self == SPI0_CS_A::SPI0_CS_0
218    }
219    #[doc = "Checks if the value of the field is `SPI0_CS_1`"]
220    #[inline(always)]
221    pub fn is_spi0_cs_1(&self) -> bool {
222        *self == SPI0_CS_A::SPI0_CS_1
223    }
224}
225#[doc = "Write proxy for field `SPI0_CS`"]
226pub struct SPI0_CS_W<'a> {
227    w: &'a mut W,
228}
229impl<'a> SPI0_CS_W<'a> {
230    #[doc = r"Writes `variant` to the field"]
231    #[inline(always)]
232    pub fn variant(self, variant: SPI0_CS_A) -> &'a mut W {
233        {
234            self.bit(variant.into())
235        }
236    }
237    #[doc = "Set the SPI CS signal low"]
238    #[inline(always)]
239    pub fn spi0_cs_0(self) -> &'a mut W {
240        self.variant(SPI0_CS_A::SPI0_CS_0)
241    }
242    #[doc = "Set the SPI CS signal high"]
243    #[inline(always)]
244    pub fn spi0_cs_1(self) -> &'a mut W {
245        self.variant(SPI0_CS_A::SPI0_CS_1)
246    }
247    #[doc = r"Sets the field bit"]
248    #[inline(always)]
249    pub fn set_bit(self) -> &'a mut W {
250        self.bit(true)
251    }
252    #[doc = r"Clears the field bit"]
253    #[inline(always)]
254    pub fn clear_bit(self) -> &'a mut W {
255        self.bit(false)
256    }
257    #[doc = r"Writes raw bits to the field"]
258    #[inline(always)]
259    pub fn bit(self, value: bool) -> &'a mut W {
260        self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
261        self.w
262    }
263}
264#[doc = "Select the word size used by the SPI interface (word size = SPI0_WORD_SIZE + 1)\n\nValue on reset: 0"]
265#[derive(Clone, Copy, Debug, PartialEq)]
266#[repr(u8)]
267pub enum SPI0_WORD_SIZE_A {
268    #[doc = "0: SPI transfers use 1-bit words"]
269    SPI0_WORD_SIZE_1 = 0,
270    #[doc = "7: SPI transfers use 8-bit words"]
271    SPI0_WORD_SIZE_8 = 7,
272    #[doc = "15: SPI transfers use 16-bit words"]
273    SPI0_WORD_SIZE_16 = 15,
274    #[doc = "23: SPI transfers use 24-bit words"]
275    SPI0_WORD_SIZE_24 = 23,
276    #[doc = "31: SPI transfers use 32-bit words"]
277    SPI0_WORD_SIZE_32 = 31,
278}
279impl From<SPI0_WORD_SIZE_A> for u8 {
280    #[inline(always)]
281    fn from(variant: SPI0_WORD_SIZE_A) -> Self {
282        variant as _
283    }
284}
285#[doc = "Reader of field `SPI0_WORD_SIZE`"]
286pub type SPI0_WORD_SIZE_R = crate::R<u8, SPI0_WORD_SIZE_A>;
287impl SPI0_WORD_SIZE_R {
288    #[doc = r"Get enumerated values variant"]
289    #[inline(always)]
290    pub fn variant(&self) -> crate::Variant<u8, SPI0_WORD_SIZE_A> {
291        use crate::Variant::*;
292        match self.bits {
293            0 => Val(SPI0_WORD_SIZE_A::SPI0_WORD_SIZE_1),
294            7 => Val(SPI0_WORD_SIZE_A::SPI0_WORD_SIZE_8),
295            15 => Val(SPI0_WORD_SIZE_A::SPI0_WORD_SIZE_16),
296            23 => Val(SPI0_WORD_SIZE_A::SPI0_WORD_SIZE_24),
297            31 => Val(SPI0_WORD_SIZE_A::SPI0_WORD_SIZE_32),
298            i => Res(i),
299        }
300    }
301    #[doc = "Checks if the value of the field is `SPI0_WORD_SIZE_1`"]
302    #[inline(always)]
303    pub fn is_spi0_word_size_1(&self) -> bool {
304        *self == SPI0_WORD_SIZE_A::SPI0_WORD_SIZE_1
305    }
306    #[doc = "Checks if the value of the field is `SPI0_WORD_SIZE_8`"]
307    #[inline(always)]
308    pub fn is_spi0_word_size_8(&self) -> bool {
309        *self == SPI0_WORD_SIZE_A::SPI0_WORD_SIZE_8
310    }
311    #[doc = "Checks if the value of the field is `SPI0_WORD_SIZE_16`"]
312    #[inline(always)]
313    pub fn is_spi0_word_size_16(&self) -> bool {
314        *self == SPI0_WORD_SIZE_A::SPI0_WORD_SIZE_16
315    }
316    #[doc = "Checks if the value of the field is `SPI0_WORD_SIZE_24`"]
317    #[inline(always)]
318    pub fn is_spi0_word_size_24(&self) -> bool {
319        *self == SPI0_WORD_SIZE_A::SPI0_WORD_SIZE_24
320    }
321    #[doc = "Checks if the value of the field is `SPI0_WORD_SIZE_32`"]
322    #[inline(always)]
323    pub fn is_spi0_word_size_32(&self) -> bool {
324        *self == SPI0_WORD_SIZE_A::SPI0_WORD_SIZE_32
325    }
326}
327#[doc = "Write proxy for field `SPI0_WORD_SIZE`"]
328pub struct SPI0_WORD_SIZE_W<'a> {
329    w: &'a mut W,
330}
331impl<'a> SPI0_WORD_SIZE_W<'a> {
332    #[doc = r"Writes `variant` to the field"]
333    #[inline(always)]
334    pub fn variant(self, variant: SPI0_WORD_SIZE_A) -> &'a mut W {
335        unsafe { self.bits(variant.into()) }
336    }
337    #[doc = "SPI transfers use 1-bit words"]
338    #[inline(always)]
339    pub fn spi0_word_size_1(self) -> &'a mut W {
340        self.variant(SPI0_WORD_SIZE_A::SPI0_WORD_SIZE_1)
341    }
342    #[doc = "SPI transfers use 8-bit words"]
343    #[inline(always)]
344    pub fn spi0_word_size_8(self) -> &'a mut W {
345        self.variant(SPI0_WORD_SIZE_A::SPI0_WORD_SIZE_8)
346    }
347    #[doc = "SPI transfers use 16-bit words"]
348    #[inline(always)]
349    pub fn spi0_word_size_16(self) -> &'a mut W {
350        self.variant(SPI0_WORD_SIZE_A::SPI0_WORD_SIZE_16)
351    }
352    #[doc = "SPI transfers use 24-bit words"]
353    #[inline(always)]
354    pub fn spi0_word_size_24(self) -> &'a mut W {
355        self.variant(SPI0_WORD_SIZE_A::SPI0_WORD_SIZE_24)
356    }
357    #[doc = "SPI transfers use 32-bit words"]
358    #[inline(always)]
359    pub fn spi0_word_size_32(self) -> &'a mut W {
360        self.variant(SPI0_WORD_SIZE_A::SPI0_WORD_SIZE_32)
361    }
362    #[doc = r"Writes raw bits to the field"]
363    #[inline(always)]
364    pub unsafe fn bits(self, value: u8) -> &'a mut W {
365        self.w.bits = (self.w.bits & !0x1f) | ((value as u32) & 0x1f);
366        self.w
367    }
368}
369impl R {
370    #[doc = "Bit 8 - SPI data transfer status read"]
371    #[inline(always)]
372    pub fn spi0_busy_status(&self) -> SPI0_BUSY_STATUS_R {
373        SPI0_BUSY_STATUS_R::new(((self.bits >> 8) & 0x01) != 0)
374    }
375    #[doc = "Bits 6:7 - Issue a read command or write command to the SPI interface"]
376    #[inline(always)]
377    pub fn spi0_rw_cmd(&self) -> SPI0_RW_CMD_R {
378        SPI0_RW_CMD_R::new(((self.bits >> 6) & 0x03) as u8)
379    }
380    #[doc = "Bit 5 - Set the chip-select line for SPI (master mode), read the chip-select line for SPI (slave mode)"]
381    #[inline(always)]
382    pub fn spi0_cs(&self) -> SPI0_CS_R {
383        SPI0_CS_R::new(((self.bits >> 5) & 0x01) != 0)
384    }
385    #[doc = "Bits 0:4 - Select the word size used by the SPI interface (word size = SPI0_WORD_SIZE + 1)"]
386    #[inline(always)]
387    pub fn spi0_word_size(&self) -> SPI0_WORD_SIZE_R {
388        SPI0_WORD_SIZE_R::new((self.bits & 0x1f) as u8)
389    }
390}
391impl W {
392    #[doc = "Bit 8 - Start an SPI data transfer and indicate if a transfer is in progress"]
393    #[inline(always)]
394    pub fn spi0_start_busy(&mut self) -> SPI0_START_BUSY_W {
395        SPI0_START_BUSY_W { w: self }
396    }
397    #[doc = "Bits 6:7 - Issue a read command or write command to the SPI interface"]
398    #[inline(always)]
399    pub fn spi0_rw_cmd(&mut self) -> SPI0_RW_CMD_W {
400        SPI0_RW_CMD_W { w: self }
401    }
402    #[doc = "Bit 5 - Set the chip-select line for SPI (master mode), read the chip-select line for SPI (slave mode)"]
403    #[inline(always)]
404    pub fn spi0_cs(&mut self) -> SPI0_CS_W {
405        SPI0_CS_W { w: self }
406    }
407    #[doc = "Bits 0:4 - Select the word size used by the SPI interface (word size = SPI0_WORD_SIZE + 1)"]
408    #[inline(always)]
409    pub fn spi0_word_size(&mut self) -> SPI0_WORD_SIZE_W {
410        SPI0_WORD_SIZE_W { w: self }
411    }
412}
rsl10_pac/spi0/spi0_ctrl1.rs

rsl10_pac/spi0/
spi0_ctrl1.rs
