[−][src]Type Definition rsl10_pac::sysctrl::SYSCTRL_MEM_TIMING_CFG
type SYSCTRL_MEM_TIMING_CFG = Reg<u32, _SYSCTRL_MEM_TIMING_CFG>;
Memory Timing Configuration
This register you can read
, reset
, write
, write_with_zero
, modify
. See API.
For information about available fields see sysctrl_mem_timing_cfg module
Trait Implementations
impl Readable for SYSCTRL_MEM_TIMING_CFG
[src]
read()
method returns sysctrl_mem_timing_cfg::R reader structure
impl ResetValue for SYSCTRL_MEM_TIMING_CFG
[src]
Register SYSCTRL_MEM_TIMING_CFG reset()
's with value 0x2d
impl Writable for SYSCTRL_MEM_TIMING_CFG
[src]
write(|w| ..)
method takes sysctrl_mem_timing_cfg::W writer structure