Type Definition rsl10_pac::i2c::i2c_ctrl0::W

type W = W<u32, I2C_CTRL0>;

Writer for register I2C_CTRL0

Methods

impl W

pub fn speed(&mut self) -> SPEED_W

Bits 16:23 - Prescaler used to divide SYSCLK to the correct SCL frequency when operating in I2C interface master mode. SCL is prescaled by (SPEED + 1) * 3. In slave mode controls the number of SYSCLK wait cycles in case of clock streching between the moment the data is put on the SDA line and the SCL line is released.

pub fn slave_address(&mut self) -> SLAVE_ADDRESS_W

Bits 8:14 - Set the I2C slave address for this device

pub fn controller(&mut self) -> CONTROLLER_W

Bit 4 - Select whether data transfer will be controlled by the CM3 or the DMA for I2C

pub fn stop_int_enable(&mut self) -> STOP_INT_ENABLE_W

Bit 3 - Configure whether stop interrupts will be generated by the I2C interface

pub fn auto_ack_enable(&mut self) -> AUTO_ACK_ENABLE_W

Bit 2 - Select whether acknowledgement is automatically generated or not

pub fn i2c_sample_clk_enable(&mut self) -> I2C_SAMPLE_CLK_ENABLE_W

Bit 1 - Enable/disable the I2C sample clock (mandatory to enable the I2C)

pub fn slave_enable(&mut self) -> SLAVE_ENABLE_W

Bit 0 - Select whether the I2C interface will be enabled for slave mode or not