Type Definition rsl10_pac::debug::debug_demcr::W

type W = W<u32, DEBUG_DEMCR>;

Writer for register DEBUG_DEMCR

Methods

impl W

pub fn trcena(&mut self) -> TRCENA_W

Bit 24 - Trace system enable

pub fn mon_req(&mut self) -> MON_REQ_W

Bit 19 - Indicates that the debug monitor is caused by a manual pending request rather than a hardware event

pub fn mon_step(&mut self) -> MON_STEP_W

Bit 18 - Single step the processor

pub fn mon_pend(&mut self) -> MON_PEND_W

Bit 17 - Pend the monitor exception request

pub fn mon_en(&mut self) -> MON_EN_W

Bit 16 - Enable the debug monitor exception

pub fn vc_harderr(&mut self) -> VC_HARDERR_W

Bit 10 - Debug trap on hard faults

pub fn vc_interr(&mut self) -> VC_INTERR_W

Bit 9 - Debug trap on interrupt service errors

pub fn vc_buserr(&mut self) -> VC_BUSERR_W

Bit 8 - Debug trap on bus faults

pub fn vc_staterr(&mut self) -> VC_STATERR_W

Bit 7 - Debug trap on usage fault state errors

pub fn vc_chkerr(&mut self) -> VC_CHKERR_W

Bit 6 - Debug trap on fault-enabled checking errors (e.g. unaligned access, divide by zero, etc.)

pub fn vc_nocperr(&mut self) -> VC_NOCPERR_W

Bit 5 - Debug trap on usage fault no coprocessor errors

pub fn vc_mmerr(&mut self) -> VC_MMERR_W

Bit 4 - Debug trap on memory management fault

pub fn vc_corereset(&mut self) -> VC_CORERESET_W

Bit 0 - Debug trap on core reset