[−][src]Struct rsl10_pac::clk::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub clk_sys_cfg: CLK_SYS_CFG,
    pub clk_div_cfg0: CLK_DIV_CFG0,
    pub clk_div_cfg1: CLK_DIV_CFG1,
    pub clk_div_cfg2: CLK_DIV_CFG2,
    pub clk_det_cfg: CLK_DET_CFG,
    pub clk_det_status: CLK_DET_STATUS,
}

Register block

Fields

clk_sys_cfg: CLK_SYS_CFG

0x00 - System Clock Configuration Register

clk_div_cfg0: CLK_DIV_CFG0

0x04 - Prescale register for SLOWCLK, BBCLK and USRCLK clocks

clk_div_cfg1: CLK_DIV_CFG1

0x08 - Prescale register for PWM clock, UART and DMIC clocks

clk_div_cfg2: CLK_DIV_CFG2

0x0c - Prescale register for DC-DC converter and charge pump clocks

clk_det_cfg: CLK_DET_CFG

0x10 - External clock detector configuration register (including interrupt)

clk_det_status: CLK_DET_STATUS

0x14 - External clock detector status register

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