[][src]Type Definition rsl10_pac::clk::clk_div_cfg1::W

type W = W<u32, CLK_DIV_CFG1>;

Writer for register CLK_DIV_CFG1

Methods

impl W[src]

pub fn audioslowclk_prescale(&mut self) -> AUDIOSLOWCLK_PRESCALE_W[src]

Bits 30:31 - Prescale value for the slow audio clock down from the fast audio clock (1 to 4 in steps of 1)

pub fn audioclk_prescale(&mut self) -> AUDIOCLK_PRESCALE_W[src]

Bits 24:29 - Prescale value for the fast audio clock (1 to 64 in steps of 1)

pub fn uartclk_prescale(&mut self) -> UARTCLK_PRESCALE_W[src]

Bits 16:20 - Prescale value for the UART peripheral clock (1 to 32 in steps of 1)

pub fn pwm1clk_prescale(&mut self) -> PWM1CLK_PRESCALE_W[src]

Bits 8:13 - Prescale value for the PWM1 peripheral clock (1 to 64 in steps of 1)

pub fn pwm0clk_prescale(&mut self) -> PWM0CLK_PRESCALE_W[src]

Bits 0:5 - Prescale value for the PWM0 peripheral clock (1 to 64 in steps of 1)