rsl10_pac/sysctrl/
sysctrl_mem_timing_cfg.rs

1#[doc = "Reader of register SYSCTRL_MEM_TIMING_CFG"]
2pub type R = crate::R<u32, super::SYSCTRL_MEM_TIMING_CFG>;
3#[doc = "Writer for register SYSCTRL_MEM_TIMING_CFG"]
4pub type W = crate::W<u32, super::SYSCTRL_MEM_TIMING_CFG>;
5#[doc = "Register SYSCTRL_MEM_TIMING_CFG `reset()`'s with value 0x2d"]
6impl crate::ResetValue for super::SYSCTRL_MEM_TIMING_CFG {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0x2d
11    }
12}
13#[doc = "DSP_PRAM extra write margin configuration\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15#[repr(u8)]
16pub enum DSP_PRAM_EMAW_A {
17    #[doc = "0: DSP_PRAM default/minimum extra write margin"]
18    DSP_PRAM_EMAW_DEFAULT = 0,
19    #[doc = "3: DSP_PRAM maximum extra write margin"]
20    DSP_PRAM_EMAW_MAX = 3,
21}
22impl From<DSP_PRAM_EMAW_A> for u8 {
23    #[inline(always)]
24    fn from(variant: DSP_PRAM_EMAW_A) -> Self {
25        variant as _
26    }
27}
28#[doc = "Reader of field `DSP_PRAM_EMAW`"]
29pub type DSP_PRAM_EMAW_R = crate::R<u8, DSP_PRAM_EMAW_A>;
30impl DSP_PRAM_EMAW_R {
31    #[doc = r"Get enumerated values variant"]
32    #[inline(always)]
33    pub fn variant(&self) -> crate::Variant<u8, DSP_PRAM_EMAW_A> {
34        use crate::Variant::*;
35        match self.bits {
36            0 => Val(DSP_PRAM_EMAW_A::DSP_PRAM_EMAW_DEFAULT),
37            3 => Val(DSP_PRAM_EMAW_A::DSP_PRAM_EMAW_MAX),
38            i => Res(i),
39        }
40    }
41    #[doc = "Checks if the value of the field is `DSP_PRAM_EMAW_DEFAULT`"]
42    #[inline(always)]
43    pub fn is_dsp_pram_emaw_default(&self) -> bool {
44        *self == DSP_PRAM_EMAW_A::DSP_PRAM_EMAW_DEFAULT
45    }
46    #[doc = "Checks if the value of the field is `DSP_PRAM_EMAW_MAX`"]
47    #[inline(always)]
48    pub fn is_dsp_pram_emaw_max(&self) -> bool {
49        *self == DSP_PRAM_EMAW_A::DSP_PRAM_EMAW_MAX
50    }
51}
52#[doc = "Write proxy for field `DSP_PRAM_EMAW`"]
53pub struct DSP_PRAM_EMAW_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> DSP_PRAM_EMAW_W<'a> {
57    #[doc = r"Writes `variant` to the field"]
58    #[inline(always)]
59    pub fn variant(self, variant: DSP_PRAM_EMAW_A) -> &'a mut W {
60        unsafe { self.bits(variant.into()) }
61    }
62    #[doc = "DSP_PRAM default/minimum extra write margin"]
63    #[inline(always)]
64    pub fn dsp_pram_emaw_default(self) -> &'a mut W {
65        self.variant(DSP_PRAM_EMAW_A::DSP_PRAM_EMAW_DEFAULT)
66    }
67    #[doc = "DSP_PRAM maximum extra write margin"]
68    #[inline(always)]
69    pub fn dsp_pram_emaw_max(self) -> &'a mut W {
70        self.variant(DSP_PRAM_EMAW_A::DSP_PRAM_EMAW_MAX)
71    }
72    #[doc = r"Writes raw bits to the field"]
73    #[inline(always)]
74    pub unsafe fn bits(self, value: u8) -> &'a mut W {
75        self.w.bits = (self.w.bits & !(0x03 << 8)) | (((value as u32) & 0x03) << 8);
76        self.w
77    }
78}
79#[doc = "DSP_PRAM extra margin configuration\n\nValue on reset: 2"]
80#[derive(Clone, Copy, Debug, PartialEq)]
81#[repr(u8)]
82pub enum DSP_PRAM_EMA_A {
83    #[doc = "0: DSP_PRAM minimum extra margin"]
84    DSP_PRAM_EMA_MIN = 0,
85    #[doc = "2: DSP_PRAM default extra margin"]
86    DSP_PRAM_EMA_DEFAULT = 2,
87    #[doc = "7: DSP_PRAM maximum extra margin"]
88    DSP_PRAM_EMA_MAX = 7,
89}
90impl From<DSP_PRAM_EMA_A> for u8 {
91    #[inline(always)]
92    fn from(variant: DSP_PRAM_EMA_A) -> Self {
93        variant as _
94    }
95}
96#[doc = "Reader of field `DSP_PRAM_EMA`"]
97pub type DSP_PRAM_EMA_R = crate::R<u8, DSP_PRAM_EMA_A>;
98impl DSP_PRAM_EMA_R {
99    #[doc = r"Get enumerated values variant"]
100    #[inline(always)]
101    pub fn variant(&self) -> crate::Variant<u8, DSP_PRAM_EMA_A> {
102        use crate::Variant::*;
103        match self.bits {
104            0 => Val(DSP_PRAM_EMA_A::DSP_PRAM_EMA_MIN),
105            2 => Val(DSP_PRAM_EMA_A::DSP_PRAM_EMA_DEFAULT),
106            7 => Val(DSP_PRAM_EMA_A::DSP_PRAM_EMA_MAX),
107            i => Res(i),
108        }
109    }
110    #[doc = "Checks if the value of the field is `DSP_PRAM_EMA_MIN`"]
111    #[inline(always)]
112    pub fn is_dsp_pram_ema_min(&self) -> bool {
113        *self == DSP_PRAM_EMA_A::DSP_PRAM_EMA_MIN
114    }
115    #[doc = "Checks if the value of the field is `DSP_PRAM_EMA_DEFAULT`"]
116    #[inline(always)]
117    pub fn is_dsp_pram_ema_default(&self) -> bool {
118        *self == DSP_PRAM_EMA_A::DSP_PRAM_EMA_DEFAULT
119    }
120    #[doc = "Checks if the value of the field is `DSP_PRAM_EMA_MAX`"]
121    #[inline(always)]
122    pub fn is_dsp_pram_ema_max(&self) -> bool {
123        *self == DSP_PRAM_EMA_A::DSP_PRAM_EMA_MAX
124    }
125}
126#[doc = "Write proxy for field `DSP_PRAM_EMA`"]
127pub struct DSP_PRAM_EMA_W<'a> {
128    w: &'a mut W,
129}
130impl<'a> DSP_PRAM_EMA_W<'a> {
131    #[doc = r"Writes `variant` to the field"]
132    #[inline(always)]
133    pub fn variant(self, variant: DSP_PRAM_EMA_A) -> &'a mut W {
134        unsafe { self.bits(variant.into()) }
135    }
136    #[doc = "DSP_PRAM minimum extra margin"]
137    #[inline(always)]
138    pub fn dsp_pram_ema_min(self) -> &'a mut W {
139        self.variant(DSP_PRAM_EMA_A::DSP_PRAM_EMA_MIN)
140    }
141    #[doc = "DSP_PRAM default extra margin"]
142    #[inline(always)]
143    pub fn dsp_pram_ema_default(self) -> &'a mut W {
144        self.variant(DSP_PRAM_EMA_A::DSP_PRAM_EMA_DEFAULT)
145    }
146    #[doc = "DSP_PRAM maximum extra margin"]
147    #[inline(always)]
148    pub fn dsp_pram_ema_max(self) -> &'a mut W {
149        self.variant(DSP_PRAM_EMA_A::DSP_PRAM_EMA_MAX)
150    }
151    #[doc = r"Writes raw bits to the field"]
152    #[inline(always)]
153    pub unsafe fn bits(self, value: u8) -> &'a mut W {
154        self.w.bits = (self.w.bits & !(0x07 << 4)) | (((value as u32) & 0x07) << 4);
155        self.w
156    }
157}
158#[doc = "PROM bitlines keeper configuration\n\nValue on reset: 1"]
159#[derive(Clone, Copy, Debug, PartialEq)]
160pub enum PROM_KEN_A {
161    #[doc = "0: PROM bitlines keeper enabled"]
162    PROM_KEN_ENABLED = 0,
163    #[doc = "1: PROM bitlines keeper disabled"]
164    PROM_KEN_DISABLED = 1,
165}
166impl From<PROM_KEN_A> for bool {
167    #[inline(always)]
168    fn from(variant: PROM_KEN_A) -> Self {
169        variant as u8 != 0
170    }
171}
172#[doc = "Reader of field `PROM_KEN`"]
173pub type PROM_KEN_R = crate::R<bool, PROM_KEN_A>;
174impl PROM_KEN_R {
175    #[doc = r"Get enumerated values variant"]
176    #[inline(always)]
177    pub fn variant(&self) -> PROM_KEN_A {
178        match self.bits {
179            false => PROM_KEN_A::PROM_KEN_ENABLED,
180            true => PROM_KEN_A::PROM_KEN_DISABLED,
181        }
182    }
183    #[doc = "Checks if the value of the field is `PROM_KEN_ENABLED`"]
184    #[inline(always)]
185    pub fn is_prom_ken_enabled(&self) -> bool {
186        *self == PROM_KEN_A::PROM_KEN_ENABLED
187    }
188    #[doc = "Checks if the value of the field is `PROM_KEN_DISABLED`"]
189    #[inline(always)]
190    pub fn is_prom_ken_disabled(&self) -> bool {
191        *self == PROM_KEN_A::PROM_KEN_DISABLED
192    }
193}
194#[doc = "Write proxy for field `PROM_KEN`"]
195pub struct PROM_KEN_W<'a> {
196    w: &'a mut W,
197}
198impl<'a> PROM_KEN_W<'a> {
199    #[doc = r"Writes `variant` to the field"]
200    #[inline(always)]
201    pub fn variant(self, variant: PROM_KEN_A) -> &'a mut W {
202        {
203            self.bit(variant.into())
204        }
205    }
206    #[doc = "PROM bitlines keeper enabled"]
207    #[inline(always)]
208    pub fn prom_ken_enabled(self) -> &'a mut W {
209        self.variant(PROM_KEN_A::PROM_KEN_ENABLED)
210    }
211    #[doc = "PROM bitlines keeper disabled"]
212    #[inline(always)]
213    pub fn prom_ken_disabled(self) -> &'a mut W {
214        self.variant(PROM_KEN_A::PROM_KEN_DISABLED)
215    }
216    #[doc = r"Sets the field bit"]
217    #[inline(always)]
218    pub fn set_bit(self) -> &'a mut W {
219        self.bit(true)
220    }
221    #[doc = r"Clears the field bit"]
222    #[inline(always)]
223    pub fn clear_bit(self) -> &'a mut W {
224        self.bit(false)
225    }
226    #[doc = r"Writes raw bits to the field"]
227    #[inline(always)]
228    pub fn bit(self, value: bool) -> &'a mut W {
229        self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
230        self.w
231    }
232}
233#[doc = "PROM extra margin configuration\n\nValue on reset: 5"]
234#[derive(Clone, Copy, Debug, PartialEq)]
235#[repr(u8)]
236pub enum PROM_EMA_A {
237    #[doc = "0: PROM minimum extra margin"]
238    PROM_EMA_MIN = 0,
239    #[doc = "5: PROM default extra margin"]
240    PROM_EMA_DEFAULT = 5,
241    #[doc = "7: PROM maximum extra margin"]
242    PROM_EMA_MAX = 7,
243}
244impl From<PROM_EMA_A> for u8 {
245    #[inline(always)]
246    fn from(variant: PROM_EMA_A) -> Self {
247        variant as _
248    }
249}
250#[doc = "Reader of field `PROM_EMA`"]
251pub type PROM_EMA_R = crate::R<u8, PROM_EMA_A>;
252impl PROM_EMA_R {
253    #[doc = r"Get enumerated values variant"]
254    #[inline(always)]
255    pub fn variant(&self) -> crate::Variant<u8, PROM_EMA_A> {
256        use crate::Variant::*;
257        match self.bits {
258            0 => Val(PROM_EMA_A::PROM_EMA_MIN),
259            5 => Val(PROM_EMA_A::PROM_EMA_DEFAULT),
260            7 => Val(PROM_EMA_A::PROM_EMA_MAX),
261            i => Res(i),
262        }
263    }
264    #[doc = "Checks if the value of the field is `PROM_EMA_MIN`"]
265    #[inline(always)]
266    pub fn is_prom_ema_min(&self) -> bool {
267        *self == PROM_EMA_A::PROM_EMA_MIN
268    }
269    #[doc = "Checks if the value of the field is `PROM_EMA_DEFAULT`"]
270    #[inline(always)]
271    pub fn is_prom_ema_default(&self) -> bool {
272        *self == PROM_EMA_A::PROM_EMA_DEFAULT
273    }
274    #[doc = "Checks if the value of the field is `PROM_EMA_MAX`"]
275    #[inline(always)]
276    pub fn is_prom_ema_max(&self) -> bool {
277        *self == PROM_EMA_A::PROM_EMA_MAX
278    }
279}
280#[doc = "Write proxy for field `PROM_EMA`"]
281pub struct PROM_EMA_W<'a> {
282    w: &'a mut W,
283}
284impl<'a> PROM_EMA_W<'a> {
285    #[doc = r"Writes `variant` to the field"]
286    #[inline(always)]
287    pub fn variant(self, variant: PROM_EMA_A) -> &'a mut W {
288        unsafe { self.bits(variant.into()) }
289    }
290    #[doc = "PROM minimum extra margin"]
291    #[inline(always)]
292    pub fn prom_ema_min(self) -> &'a mut W {
293        self.variant(PROM_EMA_A::PROM_EMA_MIN)
294    }
295    #[doc = "PROM default extra margin"]
296    #[inline(always)]
297    pub fn prom_ema_default(self) -> &'a mut W {
298        self.variant(PROM_EMA_A::PROM_EMA_DEFAULT)
299    }
300    #[doc = "PROM maximum extra margin"]
301    #[inline(always)]
302    pub fn prom_ema_max(self) -> &'a mut W {
303        self.variant(PROM_EMA_A::PROM_EMA_MAX)
304    }
305    #[doc = r"Writes raw bits to the field"]
306    #[inline(always)]
307    pub unsafe fn bits(self, value: u8) -> &'a mut W {
308        self.w.bits = (self.w.bits & !0x07) | ((value as u32) & 0x07);
309        self.w
310    }
311}
312impl R {
313    #[doc = "Bits 8:9 - DSP_PRAM extra write margin configuration"]
314    #[inline(always)]
315    pub fn dsp_pram_emaw(&self) -> DSP_PRAM_EMAW_R {
316        DSP_PRAM_EMAW_R::new(((self.bits >> 8) & 0x03) as u8)
317    }
318    #[doc = "Bits 4:6 - DSP_PRAM extra margin configuration"]
319    #[inline(always)]
320    pub fn dsp_pram_ema(&self) -> DSP_PRAM_EMA_R {
321        DSP_PRAM_EMA_R::new(((self.bits >> 4) & 0x07) as u8)
322    }
323    #[doc = "Bit 3 - PROM bitlines keeper configuration"]
324    #[inline(always)]
325    pub fn prom_ken(&self) -> PROM_KEN_R {
326        PROM_KEN_R::new(((self.bits >> 3) & 0x01) != 0)
327    }
328    #[doc = "Bits 0:2 - PROM extra margin configuration"]
329    #[inline(always)]
330    pub fn prom_ema(&self) -> PROM_EMA_R {
331        PROM_EMA_R::new((self.bits & 0x07) as u8)
332    }
333}
334impl W {
335    #[doc = "Bits 8:9 - DSP_PRAM extra write margin configuration"]
336    #[inline(always)]
337    pub fn dsp_pram_emaw(&mut self) -> DSP_PRAM_EMAW_W {
338        DSP_PRAM_EMAW_W { w: self }
339    }
340    #[doc = "Bits 4:6 - DSP_PRAM extra margin configuration"]
341    #[inline(always)]
342    pub fn dsp_pram_ema(&mut self) -> DSP_PRAM_EMA_W {
343        DSP_PRAM_EMA_W { w: self }
344    }
345    #[doc = "Bit 3 - PROM bitlines keeper configuration"]
346    #[inline(always)]
347    pub fn prom_ken(&mut self) -> PROM_KEN_W {
348        PROM_KEN_W { w: self }
349    }
350    #[doc = "Bits 0:2 - PROM extra margin configuration"]
351    #[inline(always)]
352    pub fn prom_ema(&mut self) -> PROM_EMA_W {
353        PROM_EMA_W { w: self }
354    }
355}
rsl10_pac/sysctrl/sysctrl_mem_timing_cfg.rs

rsl10_pac/sysctrl/
sysctrl_mem_timing_cfg.rs
