Type Alias rp2040_pac::xip_ssi::rx_sample_dly::W

pub type W = W<RX_SAMPLE_DLY_SPEC>;

Register RX_SAMPLE_DLY writer

Aliased Type

struct W { /* private fields */ }

Implementations

impl W

pub fn rsd(&mut self) -> RSD_W<'_, RX_SAMPLE_DLY_SPEC>

Bits 0:7 - RXD sample delay (in SCLK cycles)

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Safety

Passing incorrect value can cause undefined behaviour. See reference manual