Type Alias rp2040_pac::xip_ssi::ctrlr0::R

pub type R = R<CTRLR0_SPEC>;

Register CTRLR0 reader

Aliased Type

struct R { /* private fields */ }

Implementations

impl R

pub fn dfs(&self) -> DFS_R

Bits 0:3 - Data frame size

pub fn frf(&self) -> FRF_R

Bits 4:5 - Frame format

pub fn scph(&self) -> SCPH_R

Bit 6 - Serial clock phase

pub fn scpol(&self) -> SCPOL_R

Bit 7 - Serial clock polarity

pub fn tmod(&self) -> TMOD_R

Bits 8:9 - Transfer mode

pub fn slv_oe(&self) -> SLV_OE_R

Bit 10 - Slave output enable

pub fn srl(&self) -> SRL_R

Bit 11 - Shift register loop (test mode)

pub fn cfs(&self) -> CFS_R

Bits 12:15 - Control frame size
Value of n -> n+1 clocks per frame.

pub fn dfs_32(&self) -> DFS_32_R

Bits 16:20 - Data frame size in 32b transfer mode
Value of n -> n+1 clocks per frame.

pub fn spi_frf(&self) -> SPI_FRF_R

Bits 21:22 - SPI frame format

pub fn sste(&self) -> SSTE_R

Bit 24 - Slave select toggle enable