Type Alias rp2040_pac::spi0::sspcr0::W

pub type W = W<SSPCR0_SPEC>;

Register SSPCR0 writer

Aliased Type

struct W { /* private fields */ }

Implementations

impl W

pub fn dss(&mut self) -> DSS_W<'_, SSPCR0_SPEC>

Bits 0:3 - Data Size Select: 0000 Reserved, undefined operation. 0001 Reserved, undefined operation. 0010 Reserved, undefined operation. 0011 4-bit data. 0100 5-bit data. 0101 6-bit data. 0110 7-bit data. 0111 8-bit data. 1000 9-bit data. 1001 10-bit data. 1010 11-bit data. 1011 12-bit data. 1100 13-bit data. 1101 14-bit data. 1110 15-bit data. 1111 16-bit data.

pub fn frf(&mut self) -> FRF_W<'_, SSPCR0_SPEC>

Bits 4:5 - Frame format.

pub fn spo(&mut self) -> SPO_W<'_, SSPCR0_SPEC>

Bit 6 - SSPCLKOUT polarity, applicable to Motorola SPI frame format only. See Motorola SPI frame format on page 2-10.

pub fn sph(&mut self) -> SPH_W<'_, SSPCR0_SPEC>

Bit 7 - SSPCLKOUT phase, applicable to Motorola SPI frame format only. See Motorola SPI frame format on page 2-10.

pub fn scr(&mut self) -> SCR_W<'_, SSPCR0_SPEC>

Bits 8:15 - Serial clock rate. The value SCR is used to generate the transmit and receive bit rate of the PrimeCell SSP. The bit rate is: F SSPCLK CPSDVSR x (1+SCR) where CPSDVSR is an even value from 2-254, programmed through the SSPCPSR register and SCR is a value from 0-255.

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Safety

Passing incorrect value can cause undefined behaviour. See reference manual