Type Alias rp2040_pac::pll_sys::cs::REFDIV_W

pub type REFDIV_W<'a, REG> = FieldWriter<'a, REG, 6>;

Field REFDIV writer - Divides the PLL input reference clock.
Behaviour is undefined for div=0.
PLL output will be unpredictable during refdiv changes, wait for lock=1 before using it.

Aliased Type

struct REFDIV_W<'a, REG> { /* private fields */ }