Type Alias rp2040_pac::i2c0::ic_enable_status::SLV_DISABLED_WHILE_BUSY_R

pub type SLV_DISABLED_WHILE_BUSY_R = BitReader<SLV_DISABLED_WHILE_BUSY_A>;

Field SLV_DISABLED_WHILE_BUSY reader - Slave Disabled While Busy (Transmit, Receive). This bit indicates if a potential or active Slave operation has been aborted due to the setting bit 0 of the IC_ENABLE register from 1 to 0. This bit is set when the CPU writes a 0 to the IC_ENABLE register while:

(a) DW_apb_i2c is receiving the address byte of the Slave-Transmitter operation from a remote master;

OR,

(b) address and data bytes of the Slave-Receiver operation from a remote master.

When read as 1, DW_apb_i2c is deemed to have forced a NACK during any part of an I2C transfer, irrespective of whether the I2C address matches the slave address set in DW_apb_i2c (IC_SAR register) OR if the transfer is completed before IC_ENABLE is set to 0 but has not taken effect.

Note: If the remote I2C master terminates the transfer with a STOP condition before the DW_apb_i2c has a chance to NACK a transfer, and IC_ENABLE[0] has been set to 0, then this bit will also be set to 1.

When read as 0, DW_apb_i2c is deemed to have been disabled when there is master activity, or when the I2C bus is idle.

Note: The CPU can safely read this bit when IC_EN (bit 0) is read as 0.

Reset value: 0x0

Aliased Type

struct SLV_DISABLED_WHILE_BUSY_R { /* private fields */ }

Implementations

impl SLV_DISABLED_WHILE_BUSY_R

pub const fn variant(&self) -> SLV_DISABLED_WHILE_BUSY_A

Get enumerated values variant

pub fn is_inactive(&self) -> bool

Slave is disabled when it is idle

pub fn is_active(&self) -> bool

Slave is disabled when it is active