Struct rp2040_pac::clocks::fc0_delay::FC0_DELAY_SPEC

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pub struct FC0_DELAY_SPEC;
Expand description

Delays the start of frequency counting to allow the mux to settle
Delay is measured in multiples of the reference clock period

You can read this register and get fc0_delay::R. You can reset, write, write_with_zero this register using fc0_delay::W. You can also modify this register. See API.

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impl RegisterSpec for FC0_DELAY_SPEC

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type Ux = u32

Raw register type (u8, u16, u32, …).
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impl Resettable for FC0_DELAY_SPEC

reset() method sets FC0_DELAY to value 0x01

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const RESET_VALUE: u32 = 1u32

Reset value of the register.
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fn reset_value() -> Self::Ux

Reset value of the register.
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impl Writable for FC0_DELAY_SPEC

write(|w| ..) method takes fc0_delay::W writer structure

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const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0u32

Specifies the register bits that are not changed if you pass 1 and are changed if you pass 0
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const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0u32

Specifies the register bits that are not changed if you pass 0 and are changed if you pass 1
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impl Readable for FC0_DELAY_SPEC

read() method returns fc0_delay::R reader structure

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