Module rp2040_pac::xip_ctrl
source · [−]Expand description
QSPI flash execute-in-place block
Modules
Cache Access counter
A 32 bit saturating counter that increments upon each XIP access,
whether the cache is hit or not. This includes noncacheable accesses.
Write any value to clear.
Cache Hit counter
A 32 bit saturating counter that increments upon each cache hit,
i.e. when an XIP access is serviced directly from cached data.
Write any value to clear.
Cache control
Cache Flush control
Cache Status
FIFO stream address
FIFO stream control
FIFO stream data
Streamed data is buffered here, for retrieval by the system DMA.
This FIFO can also be accessed via the XIP_AUX slave, to avoid exposing
the DMA to bus stalls caused by other XIP traffic.
Structs
Register block
Type Definitions
CTRL register accessor: an alias for Reg<CTRL_SPEC>
CTR_ACC register accessor: an alias for Reg<CTR_ACC_SPEC>
CTR_HIT register accessor: an alias for Reg<CTR_HIT_SPEC>
FLUSH register accessor: an alias for Reg<FLUSH_SPEC>
STAT register accessor: an alias for Reg<STAT_SPEC>
STREAM_ADDR register accessor: an alias for Reg<STREAM_ADDR_SPEC>
STREAM_CTR register accessor: an alias for Reg<STREAM_CTR_SPEC>
STREAM_FIFO register accessor: an alias for Reg<STREAM_FIFO_SPEC>