Struct rp2040_pac::rosc::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub ctrl: CTRL,
    pub freqa: FREQA,
    pub freqb: FREQB,
    pub dormant: DORMANT,
    pub div: DIV,
    pub phase: PHASE,
    pub status: STATUS,
    pub randombit: RANDOMBIT,
    pub count: COUNT,
}

Register block

Fields

ctrl: CTRL

0x00 - Ring Oscillator control

freqa: FREQA

0x04 - The FREQA & FREQB registers control the frequency by controlling the drive strength of each stage\n The drive strength has 4 levels determined by the number of bits set\n Increasing the number of bits set increases the drive strength and increases the oscillation frequency\n 0 bits set is the default drive strength\n 1 bit set doubles the drive strength\n 2 bits set triples drive strength\n 3 bits set quadruples drive strength

freqb: FREQB

0x08 - For a detailed description see freqa register

dormant: DORMANT

0x0c - Ring Oscillator pause control\n This is used to save power by pausing the ROSC\n On power-up this field is initialised to WAKE\n An invalid write will also select WAKE\n Warning: setup the irq before selecting dormant mode

div: DIV

0x10 - Controls the output divider

phase: PHASE

0x14 - Controls the phase shifted output

status: STATUS

0x18 - Ring Oscillator Status

randombit: RANDOMBIT

0x1c - This just reads the state of the oscillator output so randomness is compromised if the ring oscillator is stopped or run at a harmonic of the bus frequency

count: COUNT

0x20 - A down counter running at the ROSC frequency which counts to zero and stops.\n To start the counter write a non-zero value.\n Can be used for short software pauses when setting up time sensitive hardware.