Type Definition rp2040_pac::ppb::aircr::R

type R = R<u32, AIRCR>;

Reader of register AIRCR

Implementations

impl R

pub fn vectkey(&self) -> VECTKEY_R

Bits 16:31 - Register key:\n Reads as Unknown\n On writes, write 0x05FA to VECTKEY, otherwise the write is ignored.

pub fn endianess(&self) -> ENDIANESS_R

Bit 15 - Data endianness implemented:\n 0 = Little-endian.

pub fn sysresetreq(&self) -> SYSRESETREQ_R

Bit 2 - Writing 1 to this bit causes the SYSRESETREQ signal to the outer system to be asserted to request a reset. The intention is to force a large system reset of all major components except for debug. The C_HALT bit in the DHCSR is cleared as a result of the system reset requested. The debugger does not lose contact with the device.

pub fn vectclractive(&self) -> VECTCLRACTIVE_R

Bit 1 - Clears all active state information for fixed and configurable exceptions. This bit: is self-clearing, can only be set by the DAP when the core is halted. When set: clears all active exception status of the processor, forces a return to Thread mode, forces an IPSR of 0. A debugger must re-initialize the stack.