#[repr(transparent)]pub struct Ctrl(pub u32);
Expand description
Watchdog control The rst_wdsel register determines which subsystems are reset when the watchdog is triggered. The watchdog can be triggered in software.
Tuple Fields§
§0: u32
Implementations§
source§impl Ctrl
impl Ctrl
sourcepub const fn time(&self) -> u32
pub const fn time(&self) -> u32
Indicates the number of ticks / 2 (see errata RP2040-E1) before a watchdog reset will be triggered
sourcepub fn set_time(&mut self, val: u32)
pub fn set_time(&mut self, val: u32)
Indicates the number of ticks / 2 (see errata RP2040-E1) before a watchdog reset will be triggered
sourcepub const fn pause_jtag(&self) -> bool
pub const fn pause_jtag(&self) -> bool
Pause the watchdog timer when JTAG is accessing the bus fabric
sourcepub fn set_pause_jtag(&mut self, val: bool)
pub fn set_pause_jtag(&mut self, val: bool)
Pause the watchdog timer when JTAG is accessing the bus fabric
sourcepub const fn pause_dbg0(&self) -> bool
pub const fn pause_dbg0(&self) -> bool
Pause the watchdog timer when processor 0 is in debug mode
sourcepub fn set_pause_dbg0(&mut self, val: bool)
pub fn set_pause_dbg0(&mut self, val: bool)
Pause the watchdog timer when processor 0 is in debug mode
sourcepub const fn pause_dbg1(&self) -> bool
pub const fn pause_dbg1(&self) -> bool
Pause the watchdog timer when processor 1 is in debug mode
sourcepub fn set_pause_dbg1(&mut self, val: bool)
pub fn set_pause_dbg1(&mut self, val: bool)
Pause the watchdog timer when processor 1 is in debug mode
sourcepub fn set_enable(&mut self, val: bool)
pub fn set_enable(&mut self, val: bool)
When not enabled the watchdog timer is paused
sourcepub fn set_trigger(&mut self, val: bool)
pub fn set_trigger(&mut self, val: bool)
Trigger a watchdog reset