Module export 

First-class hardware export (artifacts), parallel to crate::Backend (run).

Session / Backend::compile  →  ExecutableGraph::run()   (µs–ms)
ExportSession / export_graph →  SystemVerilog / …       (offline)

There is no Device::Fpga — FPGA export never goes through Session::compile. Use [ExportSession] instead.

Structs

ExportOptions

Options for export_graph.

ExportedArtifacts

Summary of written artifacts.

Enums

ExportTarget

Offline artifact targets (not runtime devices).

Functions

export_graph

Export graph to hardware artifacts for target.