Trait DeviceArena 

pub trait DeviceArena {
    // Required methods
    fn byte_offset(&self, id: NodeId) -> usize;
    fn has_buffer(&self, id: NodeId) -> bool;
    fn size_bytes(&self) -> usize;
    fn write_input_f32(&mut self, id: NodeId, dtype: DType, data: &[f32]);
    fn read_output_f32(
        &self,
        id: NodeId,
        dtype: DType,
        n_elements: usize,
    ) -> Vec<f32>;
}

Per-backend arena interface.

All concrete arenas — rlx-cpu::Arena, rlx-metal::Arena, future rlx-cuda::Arena, rlx-wgpu::Arena — implement this trait so the runtime can drive them uniformly. The actual byte layout is owned by the backend; we only require offset-based access.

Required Methods

fn byte_offset(&self, id: NodeId) -> usize

Byte offset of id’s buffer slot in the arena. usize::MAX for nodes that don’t have an arena slot (e.g. fused-away intermediates).

fn has_buffer(&self, id: NodeId) -> bool

True if id has a real arena slot.

fn size_bytes(&self) -> usize

Total arena size in bytes.

fn write_input_f32(&mut self, id: NodeId, dtype: DType, data: &[f32])

Write a host-side f32 slice into id’s slot, casting to dtype if necessary. Truncates to the buffer’s capacity (no panic on overflow).

For discrete-memory backends this involves a host→device copy; for unified-memory backends (Apple Silicon, integrated GPUs) it’s a direct write.

fn read_output_f32( &self, id: NodeId, dtype: DType, n_elements: usize, ) -> Vec<f32>

Read id’s slot as a host-side Vec<f32>, casting from dtype if necessary. The number of elements is determined by the backend based on the memory plan (typically shape.num_elements()).

Dyn Compatibility

This trait is dyn compatible.

In older versions of Rust, dyn compatibility was called "object safety".

Implementors