1#[doc = "Register `CTRL` reader"]
2pub type R = crate::R<CtrlSpec>;
3#[doc = "Register `CTRL` writer"]
4pub type W = crate::W<CtrlSpec>;
5#[doc = "Field `ISP_ENABLE` reader - 1: ISP data output enabled 0: ISP data output\n\ndisabled\n\nControls output formatter frame synchronously, if isp_gen_cfg_upd is used to activate this bit. For\n\nimmediate update isp_cfg_upd must be used."]
6pub type IspEnableR = crate::BitReader;
7#[doc = "Field `ISP_ENABLE` writer - 1: ISP data output enabled 0: ISP data output\n\ndisabled\n\nControls output formatter frame synchronously, if isp_gen_cfg_upd is used to activate this bit. For\n\nimmediate update isp_cfg_upd must be used."]
8pub type IspEnableW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `ISP_MODE` reader - 000 - RAW picture with BT.601 sync (ISP bypass) 001\n\n- ITU-R BT.656 (YUV with embedded sync) 010 - ITU-R BT.601 (YUV input with H and Vsync\n\nsignals) 011 - Bayer RGB processing with H and Vsync\n\nsignals\n\n- data mode (ISP bypass, sync signals interpreted as\n\ndata enable)\n\n- Bayer RGB processing with BT.656 synchronization 110 - RAW picture with ITU-R BT.656 synchronization\n\n(ISP bypass) 111 - reserved\n\nSide effect:\n\nIf RAW, BT.601, BT.656, or data mode is selected,\n\nthe clock of the ISP SRAMs (ISP line buffer, Lens Shading,\n\nBad Pixel) is switched off. Only in Bayer RGB mode the\n\nclock to the SRAMs is enabled. This further reduces power\n\nconsumption."]
10pub type IspModeR = crate::FieldReader;
11#[doc = "Field `ISP_MODE` writer - 000 - RAW picture with BT.601 sync (ISP bypass) 001\n\n- ITU-R BT.656 (YUV with embedded sync) 010 - ITU-R BT.601 (YUV input with H and Vsync\n\nsignals) 011 - Bayer RGB processing with H and Vsync\n\nsignals\n\n- data mode (ISP bypass, sync signals interpreted as\n\ndata enable)\n\n- Bayer RGB processing with BT.656 synchronization 110 - RAW picture with ITU-R BT.656 synchronization\n\n(ISP bypass) 111 - reserved\n\nSide effect:\n\nIf RAW, BT.601, BT.656, or data mode is selected,\n\nthe clock of the ISP SRAMs (ISP line buffer, Lens Shading,\n\nBad Pixel) is switched off. Only in Bayer RGB mode the\n\nclock to the SRAMs is enabled. This further reduces power\n\nconsumption."]
12pub type IspModeW<'a, REG> = crate::FieldWriter<'a, REG, 3>;
13#[doc = "Field `ISP_INFORM_ENABLE` reader - 1: input formatter enabled 0: input formatter disabled\n\nThe ISP input formatter is enabled or disabled by this bit\n\nimmediately, but always starts or stops acquisition frame\n\nsynchronously.\n\n"]
14pub type IspInformEnableR = crate::BitReader;
15#[doc = "Field `ISP_INFORM_ENABLE` writer - 1: input formatter enabled 0: input formatter disabled\n\nThe ISP input formatter is enabled or disabled by this bit\n\nimmediately, but always starts or stops acquisition frame\n\nsynchronously.\n\n"]
16pub type IspInformEnableW<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `ISP_GAMMA_IN_ENABLE` reader - Sensor De-gamma ON/OFF"]
18pub type IspGammaInEnableR = crate::BitReader;
19#[doc = "Field `ISP_GAMMA_IN_ENABLE` writer - Sensor De-gamma ON/OFF"]
20pub type IspGammaInEnableW<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `ISP_AWB_ENABLE` reader - auto white balance ON/OFF"]
22pub type IspAwbEnableR = crate::BitReader;
23#[doc = "Field `ISP_AWB_ENABLE` writer - auto white balance ON/OFF"]
24pub type IspAwbEnableW<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `ISP_CFG_UPD` reader - 1: immediately configure (update) shadow registers,\n\nwrite only"]
26pub type IspCfgUpdR = crate::BitReader;
27#[doc = "Field `ISP_CFG_UPD` writer - 1: immediately configure (update) shadow registers,\n\nwrite only"]
28pub type IspCfgUpdW<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `ISP_GEN_CFG_UPD` reader - 1: generate frame synchronous configuration signal at\n\nthe output of ISP for shadow registers of the following\n\nprocessing modules, write only"]
30pub type IspGenCfgUpdR = crate::BitReader;
31#[doc = "Field `ISP_GEN_CFG_UPD` writer - 1: generate frame synchronous configuration signal at\n\nthe output of ISP for shadow registers of the following\n\nprocessing modules, write only"]
32pub type IspGenCfgUpdW<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "\n\nValue on reset: 0"]
34#[cfg_attr(feature = "defmt", derive(defmt::Format))]
35#[derive(Clone, Copy, Debug, PartialEq, Eq)]
36pub enum IspFlashMode {
37 #[doc = "0: sensor interface works independently from flash control unit"]
38 B0 = 0,
39 #[doc = "1: one frame is captured when signaled by flash control unit"]
40 B1 = 1,
41}
42impl From<IspFlashMode> for bool {
43 #[inline(always)]
44 fn from(variant: IspFlashMode) -> Self {
45 variant as u8 != 0
46 }
47}
48#[doc = "Field `ISP_FLASH_MODE` reader - "]
49pub type IspFlashModeR = crate::BitReader<IspFlashMode>;
50impl IspFlashModeR {
51 #[doc = "Get enumerated values variant"]
52 #[inline(always)]
53 pub const fn variant(&self) -> IspFlashMode {
54 match self.bits {
55 false => IspFlashMode::B0,
56 true => IspFlashMode::B1,
57 }
58 }
59 #[doc = "sensor interface works independently from flash control unit"]
60 #[inline(always)]
61 pub fn is_b0(&self) -> bool {
62 *self == IspFlashMode::B0
63 }
64 #[doc = "one frame is captured when signaled by flash control unit"]
65 #[inline(always)]
66 pub fn is_b1(&self) -> bool {
67 *self == IspFlashMode::B1
68 }
69}
70#[doc = "Field `ISP_FLASH_MODE` writer - "]
71pub type IspFlashModeW<'a, REG> = crate::BitWriter<'a, REG, IspFlashMode>;
72impl<'a, REG> IspFlashModeW<'a, REG>
73where
74 REG: crate::Writable + crate::RegisterSpec,
75{
76 #[doc = "sensor interface works independently from flash control unit"]
77 #[inline(always)]
78 pub fn b0(self) -> &'a mut crate::W<REG> {
79 self.variant(IspFlashMode::B0)
80 }
81 #[doc = "one frame is captured when signaled by flash control unit"]
82 #[inline(always)]
83 pub fn b1(self) -> &'a mut crate::W<REG> {
84 self.variant(IspFlashMode::B1)
85 }
86}
87#[doc = "Color Space Matrix luminance clipping range for ISP\n\noutput\n\nValue on reset: 0"]
88#[cfg_attr(feature = "defmt", derive(defmt::Format))]
89#[derive(Clone, Copy, Debug, PartialEq, Eq)]
90pub enum IspCsmYRange {
91 #[doc = "0: Y range 64..940 (16..235) according to ITU-R BT.601 standard"]
92 B0 = 0,
93 #[doc = "1: full Y range 0..1023 ( 0..255) Numbers in brackets are for 8 bit resolution. This bit also configures the YCbCr sequence align block accordingly."]
94 B1 = 1,
95}
96impl From<IspCsmYRange> for bool {
97 #[inline(always)]
98 fn from(variant: IspCsmYRange) -> Self {
99 variant as u8 != 0
100 }
101}
102#[doc = "Field `ISP_CSM_Y_RANGE` reader - Color Space Matrix luminance clipping range for ISP\n\noutput"]
103pub type IspCsmYRangeR = crate::BitReader<IspCsmYRange>;
104impl IspCsmYRangeR {
105 #[doc = "Get enumerated values variant"]
106 #[inline(always)]
107 pub const fn variant(&self) -> IspCsmYRange {
108 match self.bits {
109 false => IspCsmYRange::B0,
110 true => IspCsmYRange::B1,
111 }
112 }
113 #[doc = "Y range 64..940 (16..235) according to ITU-R BT.601 standard"]
114 #[inline(always)]
115 pub fn is_b0(&self) -> bool {
116 *self == IspCsmYRange::B0
117 }
118 #[doc = "full Y range 0..1023 ( 0..255) Numbers in brackets are for 8 bit resolution. This bit also configures the YCbCr sequence align block accordingly."]
119 #[inline(always)]
120 pub fn is_b1(&self) -> bool {
121 *self == IspCsmYRange::B1
122 }
123}
124#[doc = "Field `ISP_CSM_Y_RANGE` writer - Color Space Matrix luminance clipping range for ISP\n\noutput"]
125pub type IspCsmYRangeW<'a, REG> = crate::BitWriter<'a, REG, IspCsmYRange>;
126impl<'a, REG> IspCsmYRangeW<'a, REG>
127where
128 REG: crate::Writable + crate::RegisterSpec,
129{
130 #[doc = "Y range 64..940 (16..235) according to ITU-R BT.601 standard"]
131 #[inline(always)]
132 pub fn b0(self) -> &'a mut crate::W<REG> {
133 self.variant(IspCsmYRange::B0)
134 }
135 #[doc = "full Y range 0..1023 ( 0..255) Numbers in brackets are for 8 bit resolution. This bit also configures the YCbCr sequence align block accordingly."]
136 #[inline(always)]
137 pub fn b1(self) -> &'a mut crate::W<REG> {
138 self.variant(IspCsmYRange::B1)
139 }
140}
141#[doc = "Color Space Matrix chrominance clipping range for ISP\n\noutput\n\nValue on reset: 0"]
142#[cfg_attr(feature = "defmt", derive(defmt::Format))]
143#[derive(Clone, Copy, Debug, PartialEq, Eq)]
144pub enum IspCsmCRange {
145 #[doc = "0: CbCr range 64..960 (16..240) according to ITU-R BT.601 standard"]
146 B0 = 0,
147 #[doc = "1: full UV range 0..1023 ( 0..255) Numbers in brackets are for 8 bit resolution. This bit also configures the YCbCr sequence align block accordingly."]
148 B1 = 1,
149}
150impl From<IspCsmCRange> for bool {
151 #[inline(always)]
152 fn from(variant: IspCsmCRange) -> Self {
153 variant as u8 != 0
154 }
155}
156#[doc = "Field `ISP_CSM_C_RANGE` reader - Color Space Matrix chrominance clipping range for ISP\n\noutput"]
157pub type IspCsmCRangeR = crate::BitReader<IspCsmCRange>;
158impl IspCsmCRangeR {
159 #[doc = "Get enumerated values variant"]
160 #[inline(always)]
161 pub const fn variant(&self) -> IspCsmCRange {
162 match self.bits {
163 false => IspCsmCRange::B0,
164 true => IspCsmCRange::B1,
165 }
166 }
167 #[doc = "CbCr range 64..960 (16..240) according to ITU-R BT.601 standard"]
168 #[inline(always)]
169 pub fn is_b0(&self) -> bool {
170 *self == IspCsmCRange::B0
171 }
172 #[doc = "full UV range 0..1023 ( 0..255) Numbers in brackets are for 8 bit resolution. This bit also configures the YCbCr sequence align block accordingly."]
173 #[inline(always)]
174 pub fn is_b1(&self) -> bool {
175 *self == IspCsmCRange::B1
176 }
177}
178#[doc = "Field `ISP_CSM_C_RANGE` writer - Color Space Matrix chrominance clipping range for ISP\n\noutput"]
179pub type IspCsmCRangeW<'a, REG> = crate::BitWriter<'a, REG, IspCsmCRange>;
180impl<'a, REG> IspCsmCRangeW<'a, REG>
181where
182 REG: crate::Writable + crate::RegisterSpec,
183{
184 #[doc = "CbCr range 64..960 (16..240) according to ITU-R BT.601 standard"]
185 #[inline(always)]
186 pub fn b0(self) -> &'a mut crate::W<REG> {
187 self.variant(IspCsmCRange::B0)
188 }
189 #[doc = "full UV range 0..1023 ( 0..255) Numbers in brackets are for 8 bit resolution. This bit also configures the YCbCr sequence align block accordingly."]
190 #[inline(always)]
191 pub fn b1(self) -> &'a mut crate::W<REG> {
192 self.variant(IspCsmCRange::B1)
193 }
194}
195impl R {
196 #[doc = "Bit 0 - 1: ISP data output enabled 0: ISP data output\n\ndisabled\n\nControls output formatter frame synchronously, if isp_gen_cfg_upd is used to activate this bit. For\n\nimmediate update isp_cfg_upd must be used."]
197 #[inline(always)]
198 pub fn isp_enable(&self) -> IspEnableR {
199 IspEnableR::new((self.bits & 1) != 0)
200 }
201 #[doc = "Bits 1:3 - 000 - RAW picture with BT.601 sync (ISP bypass) 001\n\n- ITU-R BT.656 (YUV with embedded sync) 010 - ITU-R BT.601 (YUV input with H and Vsync\n\nsignals) 011 - Bayer RGB processing with H and Vsync\n\nsignals\n\n- data mode (ISP bypass, sync signals interpreted as\n\ndata enable)\n\n- Bayer RGB processing with BT.656 synchronization 110 - RAW picture with ITU-R BT.656 synchronization\n\n(ISP bypass) 111 - reserved\n\nSide effect:\n\nIf RAW, BT.601, BT.656, or data mode is selected,\n\nthe clock of the ISP SRAMs (ISP line buffer, Lens Shading,\n\nBad Pixel) is switched off. Only in Bayer RGB mode the\n\nclock to the SRAMs is enabled. This further reduces power\n\nconsumption."]
202 #[inline(always)]
203 pub fn isp_mode(&self) -> IspModeR {
204 IspModeR::new(((self.bits >> 1) & 7) as u8)
205 }
206 #[doc = "Bit 4 - 1: input formatter enabled 0: input formatter disabled\n\nThe ISP input formatter is enabled or disabled by this bit\n\nimmediately, but always starts or stops acquisition frame\n\nsynchronously.\n\n"]
207 #[inline(always)]
208 pub fn isp_inform_enable(&self) -> IspInformEnableR {
209 IspInformEnableR::new(((self.bits >> 4) & 1) != 0)
210 }
211 #[doc = "Bit 6 - Sensor De-gamma ON/OFF"]
212 #[inline(always)]
213 pub fn isp_gamma_in_enable(&self) -> IspGammaInEnableR {
214 IspGammaInEnableR::new(((self.bits >> 6) & 1) != 0)
215 }
216 #[doc = "Bit 7 - auto white balance ON/OFF"]
217 #[inline(always)]
218 pub fn isp_awb_enable(&self) -> IspAwbEnableR {
219 IspAwbEnableR::new(((self.bits >> 7) & 1) != 0)
220 }
221 #[doc = "Bit 9 - 1: immediately configure (update) shadow registers,\n\nwrite only"]
222 #[inline(always)]
223 pub fn isp_cfg_upd(&self) -> IspCfgUpdR {
224 IspCfgUpdR::new(((self.bits >> 9) & 1) != 0)
225 }
226 #[doc = "Bit 10 - 1: generate frame synchronous configuration signal at\n\nthe output of ISP for shadow registers of the following\n\nprocessing modules, write only"]
227 #[inline(always)]
228 pub fn isp_gen_cfg_upd(&self) -> IspGenCfgUpdR {
229 IspGenCfgUpdR::new(((self.bits >> 10) & 1) != 0)
230 }
231 #[doc = "Bit 12"]
232 #[inline(always)]
233 pub fn isp_flash_mode(&self) -> IspFlashModeR {
234 IspFlashModeR::new(((self.bits >> 12) & 1) != 0)
235 }
236 #[doc = "Bit 13 - Color Space Matrix luminance clipping range for ISP\n\noutput"]
237 #[inline(always)]
238 pub fn isp_csm_y_range(&self) -> IspCsmYRangeR {
239 IspCsmYRangeR::new(((self.bits >> 13) & 1) != 0)
240 }
241 #[doc = "Bit 14 - Color Space Matrix chrominance clipping range for ISP\n\noutput"]
242 #[inline(always)]
243 pub fn isp_csm_c_range(&self) -> IspCsmCRangeR {
244 IspCsmCRangeR::new(((self.bits >> 14) & 1) != 0)
245 }
246}
247impl W {
248 #[doc = "Bit 0 - 1: ISP data output enabled 0: ISP data output\n\ndisabled\n\nControls output formatter frame synchronously, if isp_gen_cfg_upd is used to activate this bit. For\n\nimmediate update isp_cfg_upd must be used."]
249 #[inline(always)]
250 #[must_use]
251 pub fn isp_enable(&mut self) -> IspEnableW<CtrlSpec> {
252 IspEnableW::new(self, 0)
253 }
254 #[doc = "Bits 1:3 - 000 - RAW picture with BT.601 sync (ISP bypass) 001\n\n- ITU-R BT.656 (YUV with embedded sync) 010 - ITU-R BT.601 (YUV input with H and Vsync\n\nsignals) 011 - Bayer RGB processing with H and Vsync\n\nsignals\n\n- data mode (ISP bypass, sync signals interpreted as\n\ndata enable)\n\n- Bayer RGB processing with BT.656 synchronization 110 - RAW picture with ITU-R BT.656 synchronization\n\n(ISP bypass) 111 - reserved\n\nSide effect:\n\nIf RAW, BT.601, BT.656, or data mode is selected,\n\nthe clock of the ISP SRAMs (ISP line buffer, Lens Shading,\n\nBad Pixel) is switched off. Only in Bayer RGB mode the\n\nclock to the SRAMs is enabled. This further reduces power\n\nconsumption."]
255 #[inline(always)]
256 #[must_use]
257 pub fn isp_mode(&mut self) -> IspModeW<CtrlSpec> {
258 IspModeW::new(self, 1)
259 }
260 #[doc = "Bit 4 - 1: input formatter enabled 0: input formatter disabled\n\nThe ISP input formatter is enabled or disabled by this bit\n\nimmediately, but always starts or stops acquisition frame\n\nsynchronously.\n\n"]
261 #[inline(always)]
262 #[must_use]
263 pub fn isp_inform_enable(&mut self) -> IspInformEnableW<CtrlSpec> {
264 IspInformEnableW::new(self, 4)
265 }
266 #[doc = "Bit 6 - Sensor De-gamma ON/OFF"]
267 #[inline(always)]
268 #[must_use]
269 pub fn isp_gamma_in_enable(&mut self) -> IspGammaInEnableW<CtrlSpec> {
270 IspGammaInEnableW::new(self, 6)
271 }
272 #[doc = "Bit 7 - auto white balance ON/OFF"]
273 #[inline(always)]
274 #[must_use]
275 pub fn isp_awb_enable(&mut self) -> IspAwbEnableW<CtrlSpec> {
276 IspAwbEnableW::new(self, 7)
277 }
278 #[doc = "Bit 9 - 1: immediately configure (update) shadow registers,\n\nwrite only"]
279 #[inline(always)]
280 #[must_use]
281 pub fn isp_cfg_upd(&mut self) -> IspCfgUpdW<CtrlSpec> {
282 IspCfgUpdW::new(self, 9)
283 }
284 #[doc = "Bit 10 - 1: generate frame synchronous configuration signal at\n\nthe output of ISP for shadow registers of the following\n\nprocessing modules, write only"]
285 #[inline(always)]
286 #[must_use]
287 pub fn isp_gen_cfg_upd(&mut self) -> IspGenCfgUpdW<CtrlSpec> {
288 IspGenCfgUpdW::new(self, 10)
289 }
290 #[doc = "Bit 12"]
291 #[inline(always)]
292 #[must_use]
293 pub fn isp_flash_mode(&mut self) -> IspFlashModeW<CtrlSpec> {
294 IspFlashModeW::new(self, 12)
295 }
296 #[doc = "Bit 13 - Color Space Matrix luminance clipping range for ISP\n\noutput"]
297 #[inline(always)]
298 #[must_use]
299 pub fn isp_csm_y_range(&mut self) -> IspCsmYRangeW<CtrlSpec> {
300 IspCsmYRangeW::new(self, 13)
301 }
302 #[doc = "Bit 14 - Color Space Matrix chrominance clipping range for ISP\n\noutput"]
303 #[inline(always)]
304 #[must_use]
305 pub fn isp_csm_c_range(&mut self) -> IspCsmCRangeW<CtrlSpec> {
306 IspCsmCRangeW::new(self, 14)
307 }
308}
309#[doc = "global control register\n\nNote: partly write-only \n\n\n\n \n\n\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
310pub struct CtrlSpec;
311impl crate::RegisterSpec for CtrlSpec {
312 type Ux = u32;
313}
314#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"]
315impl crate::Readable for CtrlSpec {}
316#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"]
317impl crate::Writable for CtrlSpec {
318 type Safety = crate::Unsafe;
319 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
320 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
321}
322#[doc = "`reset()` method sets CTRL to value 0"]
323impl crate::Resettable for CtrlSpec {
324 const RESET_VALUE: u32 = 0;
325}