Module crypto

Crypto Registers

Modules

aes_cnt_0

AES Input Counter 0 Register

aes_cnt_1

AES Input Counter 1 Register

aes_cnt_2

AES Input Counter 2 Register

aes_cnt_3

AES Input Counter 3 Register

aes_ctrl

AES Control Register

aes_din_0

AES Input Data 0 Register

aes_din_1

AES Input Data 1 Register

aes_din_2

AES Input Data 2 Register

aes_din_3

AES Input Data 3 Register

aes_dout_0

AES Output Data 0 Register

aes_dout_1

AES Output Data 1 Register

aes_dout_2

AES Output Data 2 Register

aes_dout_3

AES Output Data 3 Register

aes_iv_0

AES IV data 0 Register

aes_iv_1

AES IV data 1 Register

aes_iv_2

AES IV data 2 Register

aes_iv_3

AES IV data 3 Register

aes_key_0

AES Key data 0 Register

aes_key_1

AES Key data 1 Register

aes_key_2

AES Key data 2 Register

aes_key_3

AES Key data 3 Register

aes_key_4

AES Key data 4 Register

aes_key_5

AES Key data 5 Register

aes_key_6

AES Key data 6 Register

aes_key_7

AES Key data 7 Register

aes_sts

Status Register

aes_tkey_0

AES Tweak Key data 0 Register

aes_tkey_1

AES Tweak Key data 1 Register

aes_tkey_2

AES Tweak Key data 2 Register

aes_tkey_3

AES Tweak Key data 3 Register

aes_tkey_4

AES Tweak Key data 4 Register

aes_tkey_5

AES Tweak Key data 5 Register

aes_tkey_6

AES Tweak Key data 6 Register

aes_tkey_7

AES Tweak Key data 7 Register

aes_twk_0

AES Tweak data 0 Register

aes_twk_1

AES Tweak data 1 Register

aes_twk_2

AES Tweak data 2 Register

aes_twk_3

AES Tweak data 3 Register

brdmal

Block Receiving DMA Length Register

brdmas

Block Receiving DMA Start Address Register

btdmas

Block Transmiting DMA Start Address Register

clk_gate

Clock Gate Control Register

conf

Configure Register

crypto_ver

Crypto Version register

ctrl

Control Register

hash_ctrl

Hash Control Register

hash_dout_0

Hash Result Register 0

hash_dout_1

Hash Result Register 1

hash_dout_2

Hash Result Register 2

hash_dout_3

Hash Result Register 3

hash_dout_4

Hash Result Register 4

hash_dout_5

Hash Result Register 5

hash_dout_6

Hash Result Register 6

hash_dout_7

Hash Result Register 7

hash_msg_len

Hash Message Len

hash_seed_0

PRNG Seed/HMAC Key Register 0

hash_seed_1

PRNG Seed/HMAC Key Register 1

hash_seed_2

PRNG Seed/HMAC Key Register 2

hash_seed_3

PRNG Seed/HMAC Key Register 3

hash_seed_4

PRNG Seed/HMAC Key Register 4

hash_sts

Hash Status Register

hrdmal

Hash Receiving DMA Length Register

hrdmas

Hash Receiving DMA Start Address Register

intena

Interrupt Set Register

intsts

Interrupt Status Register

key_secure

Key Secure Control Register

pka_c

PKA C value

pka_ctrl

PKA Control Register

pka_e

PKA exponent

pka_m

PKA input/output data

pka_n

PKA modular

tdes_ctrl

TDES Control Register

tdes_din_0

TDES Input Data 0 Register

tdes_din_1

TDES Input Data 1 Register

tdes_dout_0

TDES Output Data 0 Register

tdes_dout_1

TDES Output Data 1 Register

tdes_iv_0

TDES IV data 0 Register

tdes_iv_1

TDES IV data 1 Register

tdes_key1_0

TDES Key1 data 1 Register

tdes_key1_1

TDES Key1 data 1 Register

tdes_key2_0

TDES Key2 data 0 Register

tdes_key2_1

TDES Key2 data 1 Register

tdes_key3_0

TDES Key3 data 0 Register

tdes_key3_1

TDES Key3 data 1 Register

tdes_sts

Status Register

trng_ctrl

TRNG Control register

trng_dout_0

TRNG output register 0

trng_dout_1

TRNG output register 1

trng_dout_2

TRNG output register 2

trng_dout_3

TRNG output register 3

trng_dout_4

TRNG output register 4

trng_dout_5

TRNG output register 5

trng_dout_6

TRNG output register 6

trng_dout_7

TRNG output register 7

Structs

RegisterBlock

Register block

Type Aliases

AesCnt0

AES_CNT_0 (rw) register accessor: AES Input Counter 0 Register

AesCnt1

AES_CNT_1 (rw) register accessor: AES Input Counter 1 Register

AesCnt2

AES_CNT_2 (rw) register accessor: AES Input Counter 2 Register

AesCnt3

AES_CNT_3 (rw) register accessor: AES Input Counter 3 Register

AesCtrl

AES_CTRL (rw) register accessor: AES Control Register

AesDin0

AES_DIN_0 (rw) register accessor: AES Input Data 0 Register

AesDin1

AES_DIN_1 (rw) register accessor: AES Input Data 1 Register

AesDin2

AES_DIN_2 (rw) register accessor: AES Input Data 2 Register

AesDin3

AES_DIN_3 (rw) register accessor: AES Input Data 3 Register

AesDout0

AES_DOUT_0 (r) register accessor: AES Output Data 0 Register

AesDout1

AES_DOUT_1 (r) register accessor: AES Output Data 1 Register

AesDout2

AES_DOUT_2 (r) register accessor: AES Output Data 2 Register

AesDout3

AES_DOUT_3 (r) register accessor: AES Output Data 3 Register

AesIv0

AES_IV_0 (rw) register accessor: AES IV data 0 Register

AesIv1

AES_IV_1 (rw) register accessor: AES IV data 1 Register

AesIv2

AES_IV_2 (rw) register accessor: AES IV data 2 Register

AesIv3

AES_IV_3 (rw) register accessor: AES IV data 3 Register

AesKey0

AES_KEY_0 (rw) register accessor: AES Key data 0 Register

AesKey1

AES_KEY_1 (rw) register accessor: AES Key data 1 Register

AesKey2

AES_KEY_2 (rw) register accessor: AES Key data 2 Register

AesKey3

AES_KEY_3 (rw) register accessor: AES Key data 3 Register

AesKey4

AES_KEY_4 (rw) register accessor: AES Key data 4 Register

AesKey5

AES_KEY_5 (rw) register accessor: AES Key data 5 Register

AesKey6

AES_KEY_6 (rw) register accessor: AES Key data 6 Register

AesKey7

AES_KEY_7 (rw) register accessor: AES Key data 7 Register

AesSts

AES_STS (rw) register accessor: Status Register

AesTkey0

AES_TKEY_0 (rw) register accessor: AES Tweak Key data 0 Register

AesTkey1

AES_TKEY_1 (rw) register accessor: AES Tweak Key data 1 Register

AesTkey2

AES_TKEY_2 (rw) register accessor: AES Tweak Key data 2 Register

AesTkey3

AES_TKEY_3 (rw) register accessor: AES Tweak Key data 3 Register

AesTkey4

AES_TKEY_4 (rw) register accessor: AES Tweak Key data 4 Register

AesTkey5

AES_TKEY_5 (rw) register accessor: AES Tweak Key data 5 Register

AesTkey6

AES_TKEY_6 (rw) register accessor: AES Tweak Key data 6 Register

AesTkey7

AES_TKEY_7 (rw) register accessor: AES Tweak Key data 7 Register

AesTwk0

AES_TWK_0 (rw) register accessor: AES Tweak data 0 Register

AesTwk1

AES_TWK_1 (rw) register accessor: AES Tweak data 1 Register

AesTwk2

AES_TWK_2 (rw) register accessor: AES Tweak data 2 Register

AesTwk3

AES_TWK_3 (rw) register accessor: AES Tweak data 3 Register

Brdmal

BRDMAL (rw) register accessor: Block Receiving DMA Length Register

Brdmas

BRDMAS (rw) register accessor: Block Receiving DMA Start Address Register

Btdmas

BTDMAS (rw) register accessor: Block Transmiting DMA Start Address Register

ClkGate

CLK_GATE (rw) register accessor: Clock Gate Control Register

Conf

CONF (rw) register accessor: Configure Register

CryptoVer

CRYPTO_VER (rw) register accessor: Crypto Version register

Ctrl

CTRL (rw) register accessor: Control Register

HashCtrl

HASH_CTRL (rw) register accessor: Hash Control Register

HashDout0

HASH_DOUT_0 (r) register accessor: Hash Result Register 0

HashDout1

HASH_DOUT_1 (r) register accessor: Hash Result Register 1

HashDout2

HASH_DOUT_2 (r) register accessor: Hash Result Register 2

HashDout3

HASH_DOUT_3 (r) register accessor: Hash Result Register 3

HashDout4

HASH_DOUT_4 (r) register accessor: Hash Result Register 4

HashDout5

HASH_DOUT_5 (r) register accessor: Hash Result Register 5

HashDout6

HASH_DOUT_6 (r) register accessor: Hash Result Register 6

HashDout7

HASH_DOUT_7 (r) register accessor: Hash Result Register 7

HashMsgLen

HASH_MSG_LEN (rw) register accessor: Hash Message Len

HashSeed0

HASH_SEED_0 (rw) register accessor: PRNG Seed/HMAC Key Register 0

HashSeed1

HASH_SEED_1 (rw) register accessor: PRNG Seed/HMAC Key Register 1

HashSeed2

HASH_SEED_2 (rw) register accessor: PRNG Seed/HMAC Key Register 2

HashSeed3

HASH_SEED_3 (rw) register accessor: PRNG Seed/HMAC Key Register 3

HashSeed4

HASH_SEED_4 (rw) register accessor: PRNG Seed/HMAC Key Register 4

HashSts

HASH_STS (rw) register accessor: Hash Status Register

Hrdmal

HRDMAL (rw) register accessor: Hash Receiving DMA Length Register

Hrdmas

HRDMAS (rw) register accessor: Hash Receiving DMA Start Address Register

Intena

INTENA (rw) register accessor: Interrupt Set Register

Intsts

INTSTS (rw) register accessor: Interrupt Status Register

KeySecure

KEY_SECURE (rw) register accessor: Key Secure Control Register

PkaC

PKA_C (rw) register accessor: PKA C value

PkaCtrl

PKA_CTRL (rw) register accessor: PKA Control Register

PkaE

PKA_E (rw) register accessor: PKA exponent

PkaM

PKA_M (rw) register accessor: PKA input/output data

PkaN

PKA_N (rw) register accessor: PKA modular

TdesCtrl

TDES_CTRL (rw) register accessor: TDES Control Register

TdesDin0

TDES_DIN_0 (rw) register accessor: TDES Input Data 0 Register

TdesDin1

TDES_DIN_1 (rw) register accessor: TDES Input Data 1 Register

TdesDout0

TDES_DOUT_0 (r) register accessor: TDES Output Data 0 Register

TdesDout1

TDES_DOUT_1 (r) register accessor: TDES Output Data 1 Register

TdesIv0

TDES_IV_0 (rw) register accessor: TDES IV data 0 Register

TdesIv1

TDES_IV_1 (rw) register accessor: TDES IV data 1 Register

TdesKey1_0

TDES_KEY1_0 (rw) register accessor: TDES Key1 data 1 Register

TdesKey1_1

TDES_KEY1_1 (rw) register accessor: TDES Key1 data 1 Register

TdesKey2_0

TDES_KEY2_0 (rw) register accessor: TDES Key2 data 0 Register

TdesKey2_1

TDES_KEY2_1 (rw) register accessor: TDES Key2 data 1 Register

TdesKey3_0

TDES_KEY3_0 (rw) register accessor: TDES Key3 data 0 Register

TdesKey3_1

TDES_KEY3_1 (rw) register accessor: TDES Key3 data 1 Register

TdesSts

TDES_STS (rw) register accessor: Status Register

TrngCtrl

TRNG_CTRL (rw) register accessor: TRNG Control register

TrngDout0

TRNG_DOUT_0 (rw) register accessor: TRNG output register 0

TrngDout1

TRNG_DOUT_1 (rw) register accessor: TRNG output register 1

TrngDout2

TRNG_DOUT_2 (rw) register accessor: TRNG output register 2

TrngDout3

TRNG_DOUT_3 (rw) register accessor: TRNG output register 3

TrngDout4

TRNG_DOUT_4 (rw) register accessor: TRNG output register 4

TrngDout5

TRNG_DOUT_5 (rw) register accessor: TRNG output register 5

TrngDout6

TRNG_DOUT_6 (rw) register accessor: TRNG output register 6

TrngDout7

TRNG_DOUT_7 (rw) register accessor: TRNG output register 7