Crate rivet_bsp_support 

Shared helpers for rivet-bsp-* crates.

Small, board-shape-agnostic pieces that would otherwise be reimplemented per board: a software watchdog fallback for boards without real watchdog hardware, and an NS16550-compatible UART driver (the most common “some UART is mapped somewhere” case on RV32 platforms). Nothing here is wired to the port contract directly — each BSP’s own #[no_mangle] functions call into these.

Modules

delay

embedded-hal-async::delay::DelayNs on top of the preemptive tier’s blocking sleep (plan.md Phase 15).

ns16550

Minimal NS16550-compatible UART driver: blind byte writes to the transmit-holding register, no THRE (transmit-ready) check. This matches the original QEMU-virt port’s behavior exactly (QEMU’s model never actually backpressures), but is a known simplification — a real NS16550 can drop bytes under load without checking LSR.THRE first. Tracked as future BSP driver work, not fixed here.

serial

embedded-hal-nb::serial::{Read, Write} over rivet::console (plan.md Phase 15).

sw_watchdog

Software watchdog fallback: for boards with no real watchdog hardware, arm a deadline and check it on every tick. Not independent of the CPU: unlike a real hardware watchdog, this cannot catch a hang that stops the tick itself (e.g. a spin loop with interrupts disabled) — document that limitation prominently in any BSP that uses this.