Crate riscv_vcpu

Crate riscv_vcpu 

Source
Expand description

§riscv_vcpu

riscv64 virtual CPU (vCPU) implementation for hypervisors. This crate provides the core vCPU structure and virtualization-related interface support specifically designed for the riscv64 architecture.

CI [License]

§Overview

riscv_vcpu implements a minimal RISC-V Virtual CPU (VCPU) abstraction layer compliant with the RISC-V Hypervisor Extension (RVH). Designed for embedded hypervisors and educational use, it can operates in no_std environments.

§Features

  • Complete vCPU Implementation: Full virtual CPU structure for riscv64 guests
  • Exception Handling: Comprehensive trap and exception handling for virtualized environments
  • EPT (Extended Page Tables): Memory virtualization support
  • VMCS Management: Virtual Machine Control Structure operations
  • Per-CPU Support: Efficient per-CPU data structures and management
  • No-std Compatible: Works in bare-metal and embedded environments

§Usage

Add this to your Cargo.toml:

[dependencies]
riscv_vcpu = "0.1"

§Basic Usage

ⓘ
use riscv_vcpu::{RISCVVCpu, RISCVVCpuCreateConfig, has_hardware_support};

// Check if hardware virtualization is supported
if has_hardware_support() {
    // Create vCPU configuration
    let config = RISCVVCpuCreateConfig::default();
    
    // Create and configure the virtual CPU
    let vcpu = RISCVVCpu::new(config)?;
    
    // Run the virtual CPU
    vcpu.run()?;
}
  • ArceOS - An experimental modular OS (or Unikernel)
  • AxVisor - Hypervisor implementation

§License

This project is dual-licensed under either:

at your option.

Structs§

RISCVPerCpu
Risc-V per-CPU state.
RISCVVCpu
A virtual CPU within a guest
RISCVVCpuCreateConfig
Configuration for creating a new RISCVVCpu

Constants§

EID_HVC
Extension ID for hypercall, defined by ourselves. 0x48, 0x56, 0x43 is “HVC” in ASCII.

Functions§

has_hardware_support
Detect if hypervisor extension exists on current hart environment