Crate riscv_peripheral

Source
Expand description

Standard RISC-V peripherals for embedded systems written in Rust.

§Features

  • aclint-hal-async: enables the hal_async::delay::DelayNs implementation for the ACLINT peripheral. This feature relies on external functions that must be provided by the user. See hal_async::aclint for more information.

Re-exports§

pub use riscv;

Modules§

aclint
Devices for the Core Local Interruptor (CLINT) and Advanced CLINT (ACLINT) peripherals.
common
Common definitions for all the peripheral registers.
hal
trait implementations for embedded-hal
hal_async
async trait implementations for embedded-hal
macros
Utility macros for generating standard peripherals-related code in RISC-V PACs.
plic
Platform-Level Interrupt Controller (PLIC) peripheral.
result

Macros§

clint_codegen
Macro to create interfaces to CLINT peripherals in PACs. The resulting struct will be named CLINT, and will provide safe access to the CLINT registers.
plic_codegen
Macro to create interfaces to PLIC peripherals in PACs. The resulting struct will be named PLIC, and will provide safe access to the PLIC registers.