Expand description
Low level access to RISC-V processors
§Minimum Supported Rust Version (MSRV)
This crate is guaranteed to compile on stable Rust 1.60 and up. It might compile with older versions but that may change in any new patch release.
§Features
This crate provides:
- Access to core registers like
mstatusormcause. - Interrupt manipulation mechanisms.
- Wrappers around assembly instructions like
WFI.
§Optional features
§s-mode
This feature re-exports in interrupt S-mode interrupt functions defined in interrupt::supervisor.
By default, the crate assumes that the target is running in M-mode.
Thus, interrupt re-exports the M-mode functions defined in interrupt::machine.
§critical-section-single-hart
This feature enables a critical-section
implementation suitable for single-hart targets, based on disabling interrupts globally.
This feature uses S-mode interrupt handling if the s-mode feature is enabled, and M-mode otherwise.
It is unsound to enable it on multi-hart targets, and may cause functional problems in systems where some interrupts must NOT be disabled or critical sections are managed as part of an RTOS. In these cases, you should use a target-specific implementation instead, typically provided by a HAL or RTOS crate.
Modules§
- asm
- Assembly instructions
- bits
- delay
- Delay devices and providers
- interrupt
- Interrupts
- register
- RISC-V CSR’s
- result
Macros§
- clear
- Convenience macro around the
csrrcassembly instruction to clear the CSR register. - clear_
csr - Convenience macro to define field clear functions for a CSR type.
- clear_
rv32 RV32: Convenience macro around thecsrrcassembly instruction to clear the CSR register.- csr
- Helper macro to define a CSR type.
- csr_
field_ enum - paste
- read_
composite_ csr - Convenience macro to read a composite value from a CSR register.
- read_
csr - Convenience macro to wrap the
csrrsassembly instruction for reading a CSR register. - read_
csr_ as - Convenience macro to read a CSR register value as a
registertype. - read_
csr_ as_ rv32 RV32: Convenience macro to read a CSR register value as aregistertype.- read_
csr_ as_ usize - Convenience macro to read a CSR register value as a
usize. - read_
csr_ as_ usize_ rv32 RV32: Convenience macro to read a CSR register value as ausize.- read_
csr_ rv32 RV32: Convenience macro to wrap thecsrrsassembly instruction for reading a CSR register.- read_
only_ csr - Helper macro to create a read-only CSR type.
- read_
only_ csr_ field - Defines field accesor functions for a read-only CSR type.
- read_
write_ csr - Helper macro to create a read-write CSR type.
- read_
write_ csr_ field - Defines field accesor functions for a read-write CSR type.
- set
- Convenience macro around the
csrrsassembly instruction to set the CSR register. - set_
clear_ csr - Convenience macro to define field setter and clear functions for a CSR type.
- set_csr
- Convenience macro to define field setter functions for a CSR type.
- set_
rv32 RV32: Convenience macro around thecsrrsassembly instruction to set the CSR register.- singleton
- Macro to create a mutable reference to a statically allocated value
- write_
csr - Convenience macro to wrap the
csrrwassembly instruction for writing to CSR registers. - write_
csr_ as - Convenience macro to write a value with
bitsto a CSR - write_
csr_ as_ rv32 - Convenience macro to write a value to a CSR register.
- write_
csr_ as_ usize - Convenience macro to write a
usizevalue to a CSR register. - write_
csr_ as_ usize_ rv32 RV32: Convenience macro to write ausizevalue to a CSR register.- write_
csr_ rv32 RV32: Convenience macro to wrap thecsrrwassembly instruction for writing to CSR registers.- write_
only_ csr - Helper macro to create a read-only CSR type.
- write_
only_ csr_ field - Defines field accesor functions for a write-only CSR type.
Traits§
- Core
Interrupt Number - Marker trait for enums of target-specific core interrupt numbers.
- Exception
Number - Trait for enums of target-specific exception numbers.
- External
Interrupt Number - Marker trait for enums of target-specific external interrupt numbers.
- Hart
IdNumber - Trait for enums of HART identifiers.
- Interrupt
Number - Trait for enums of target-specific interrupt numbers.
- Priority
Number - Trait for enums of priority levels.
Attribute Macros§
- pac_
enum - Attribute-like macro that implements the traits of the
riscv-paccrate for a given enum.