risc0_zkos_common/
lib.rs

1// Copyright 2026 RISC Zero, Inc.
2//
3// Licensed under the Apache License, Version 2.0, <LICENSE-APACHE or
4// http://apache.org/licenses/LICENSE-2.0> or the MIT license <LICENSE-MIT or
5// http://opensource.org/licenses/MIT>, at your option. This file may not be
6// copied, modified, or distributed except according to those terms.
7//
8// Unless required by applicable law or agreed to in writing, software
9// distributed under the License is distributed on an "AS IS" BASIS,
10// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
11// See the License for the specific language governing permissions and
12// limitations under the License.
13//
14// SPDX-License-Identifier: Apache-2.0 OR MIT
15
16#![cfg_attr(target_os = "zkvm", no_std)]
17
18use crate::constants::USER_REGS_PTR;
19
20pub mod atomics;
21pub mod constants;
22pub mod emul;
23
24pub fn get_ureg(idx: usize) -> u32 {
25    // x0 (register 0) should always return 0
26    if idx == 0 {
27        return 0;
28    }
29    unsafe { USER_REGS_PTR.add(idx).read() }
30}
31
32pub fn set_ureg(idx: usize, word: u32) {
33    // Guard against writing to x0 (register 0) - it should always remain 0
34    if idx == 0 {
35        return;
36    }
37    unsafe { USER_REGS_PTR.add(idx).write_volatile(word) };
38}
39
40pub fn mret() -> ! {
41    #[cfg(target_arch = "riscv32")]
42    unsafe {
43        core::arch::asm!("mret", options(noreturn))
44    }
45    #[cfg(not(target_arch = "riscv32"))]
46    unimplemented!()
47}
risc0_zkos_common/lib.rs

risc0_zkos_common/
lib.rs
