risc0_circuit_rv32im_sys/
lib.rs

1// Copyright 2025 RISC Zero, Inc.
2//
3// Licensed under the Apache License, Version 2.0 (the "License");
4// you may not use this file except in compliance with the License.
5// You may obtain a copy of the License at
6//
7//     http://www.apache.org/licenses/LICENSE-2.0
8//
9// Unless required by applicable law or agreed to in writing, software
10// distributed under the License is distributed on an "AS IS" BASIS,
11// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12// See the License for the specific language governing permissions and
13// limitations under the License.
14
15#[cfg(feature = "cuda")]
16use cust::memory::DevicePointer;
17use derive_more::Debug;
18use risc0_core::field::baby_bear::{BabyBearElem, BabyBearExtElem};
19
20#[derive(Clone, Debug, PartialEq)]
21#[repr(C)]
22pub struct RawMemoryTransaction {
23    #[debug("{addr:#010x}")]
24    pub addr: u32,
25    pub cycle: u32,
26    #[debug("{word:#010x}")]
27    pub word: u32,
28    pub prev_cycle: u32,
29    #[debug("{word:#010x}")]
30    pub prev_word: u32,
31}
32
33#[derive(Clone, Debug, PartialEq)]
34#[repr(C)]
35pub struct RawPreflightCycle {
36    pub state: u32,
37    #[debug("{pc:#010x}")]
38    pub pc: u32,
39    pub major: u8,
40    pub minor: u8,
41    pub machine_mode: u8,
42    #[debug(skip)]
43    pub padding: u8,
44    pub user_cycle: u32,
45    pub txn_idx: u32,
46    pub paging_idx: u32,
47    pub bigint_idx: u32,
48    pub diff_count: [u32; 2],
49}
50
51#[repr(C)]
52pub struct RawPreflightTrace {
53    pub cycles: *const RawPreflightCycle,
54    pub txns: *const RawMemoryTransaction,
55    pub bigint_bytes: *const u8,
56    pub txns_len: u32,
57    pub bigint_bytes_len: u32,
58    pub table_split_cycle: u32,
59}
60
61#[repr(C)]
62pub struct RawBuffer {
63    pub buf: *const BabyBearElem,
64    pub rows: usize,
65    pub cols: usize,
66    pub checked: bool,
67}
68
69#[repr(C)]
70pub struct RawExecBuffers {
71    pub global: RawBuffer,
72    pub data: RawBuffer,
73}
74
75#[repr(C)]
76pub struct RawAccumBuffers {
77    pub data: RawBuffer,
78    pub accum: RawBuffer,
79    pub global: RawBuffer,
80    pub mix: RawBuffer,
81}
82
83extern "C" {
84    pub fn risc0_circuit_rv32im_cpu_witgen(
85        mode: u32,
86        buffers: *const RawExecBuffers,
87        preflight: *const RawPreflightTrace,
88        cycles: u32,
89    ) -> *const std::os::raw::c_char;
90
91    pub fn risc0_circuit_rv32im_cpu_accum(
92        buffers: *const RawAccumBuffers,
93        preflight: *const RawPreflightTrace,
94        cycles: u32,
95    ) -> *const std::os::raw::c_char;
96
97    pub fn risc0_circuit_rv32im_cpu_poly_fp(
98        cycle: usize,
99        steps: usize,
100        poly_mixs: *const BabyBearExtElem,
101        args_ptr: *const *const BabyBearElem,
102        result: *mut BabyBearExtElem,
103    ) -> *const std::os::raw::c_char;
104}
105
106#[cfg(feature = "cuda")]
107extern "C" {
108    pub fn risc0_circuit_rv32im_cuda_witgen(
109        mode: u32,
110        buffers: *const RawExecBuffers,
111        preflight: *const RawPreflightTrace,
112        cycles: u32,
113    ) -> *const std::os::raw::c_char;
114
115    pub fn risc0_circuit_rv32im_cuda_accum(
116        buffers: *const RawAccumBuffers,
117        preflight: *const RawPreflightTrace,
118        cycles: u32,
119    ) -> *const std::os::raw::c_char;
120
121    pub fn risc0_circuit_rv32im_cuda_eval_check(
122        check: DevicePointer<u8>,
123        ctrl: DevicePointer<u8>,
124        data: DevicePointer<u8>,
125        accum: DevicePointer<u8>,
126        mix: DevicePointer<u8>,
127        out: DevicePointer<u8>,
128        rou: *const BabyBearElem,
129        po2: u32,
130        domain: u32,
131        poly_mix_pows: *const u32,
132    ) -> *const std::os::raw::c_char;
133}
risc0_circuit_rv32im_sys/lib.rs

risc0_circuit_rv32im_sys/
lib.rs
