1use dma_api::DmaDomainId;
2
3use crate::request::RequestFlags;
4
5#[derive(Debug, Clone, Copy)]
6pub struct DeviceInfo {
7 pub num_blocks: u64,
8 pub logical_block_size: usize,
9 pub read_only: bool,
10 pub name: Option<&'static str>,
11 pub vendor: Option<&'static str>,
12 pub model: Option<&'static str>,
13}
14
15impl DeviceInfo {
16 pub const fn new(num_blocks: u64, logical_block_size: usize) -> Self {
17 Self {
18 num_blocks,
19 logical_block_size,
20 read_only: false,
21 name: None,
22 vendor: None,
23 model: None,
24 }
25 }
26}
27
28#[derive(Debug, Clone, Copy)]
29pub struct QueueLimits {
30 pub dma_mask: u64,
31 pub dma_domain: DmaDomainId,
32 pub dma_alignment: usize,
33 pub max_inflight: usize,
34 pub max_blocks_per_request: u32,
35 pub max_segments: usize,
36 pub max_segment_size: usize,
37 pub supported_flags: RequestFlags,
38 pub supports_flush: bool,
39 pub supports_discard: bool,
40 pub supports_write_zeroes: bool,
41}
42
43impl QueueLimits {
44 pub const fn simple(logical_block_size: usize, dma_mask: u64) -> Self {
45 Self {
46 dma_mask,
47 dma_domain: DmaDomainId::legacy_global(),
48 dma_alignment: logical_block_size,
49 max_inflight: 1,
50 max_blocks_per_request: 1,
51 max_segments: 1,
52 max_segment_size: logical_block_size,
53 supported_flags: RequestFlags::NONE,
54 supports_flush: false,
55 supports_discard: false,
56 supports_write_zeroes: false,
57 }
58 }
59}
60
61#[derive(Debug, Clone, Copy)]
62pub struct QueueInfo {
63 pub id: usize,
64 pub device: DeviceInfo,
65 pub limits: QueueLimits,
66}