Struct raw_cpuid::ProcessorTraceInfo [−][src]
pub struct ProcessorTraceInfo { /* fields omitted */ }
Methods
impl ProcessorTraceInfo
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impl ProcessorTraceInfo
pub fn has_rtit_cr3_match(&self) -> bool
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pub fn has_rtit_cr3_match(&self) -> bool
If true, Indicates that IA32_RTIT_CTL.CR3Filter can be set to 1, and that IA32_RTIT_CR3_MATCH MSR can be accessed.
pub fn has_configurable_psb_and_cycle_accurate_mode(&self) -> bool
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pub fn has_configurable_psb_and_cycle_accurate_mode(&self) -> bool
If true, Indicates support of Configurable PSB and Cycle-Accurate Mode.
pub fn has_ip_tracestop_filtering(&self) -> bool
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pub fn has_ip_tracestop_filtering(&self) -> bool
If true, Indicates support of IP Filtering, TraceStop filtering, and preservation of Intel PT MSRs across warm reset.
pub fn has_mtc_timing_packet_coefi_suppression(&self) -> bool
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pub fn has_mtc_timing_packet_coefi_suppression(&self) -> bool
If true, Indicates support of MTC timing packet and suppression of COFI-based packets.
pub fn has_ptwrite(&self) -> bool
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pub fn has_ptwrite(&self) -> bool
Indicates support of PTWRITE. Writes can set IA32_RTIT_CTL[12] (PTWEn and IA32_RTIT_CTL[5] (FUPonPTW), and PTWRITE can generate packets
pub fn has_power_event_trace(&self) -> bool
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pub fn has_power_event_trace(&self) -> bool
Support of Power Event Trace. Writes can set IA32_RTIT_CTL[4] (PwrEvtEn) enabling Power Event Trace packet generation.
pub fn has_topa(&self) -> bool
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pub fn has_topa(&self) -> bool
If true, Tracing can be enabled with IA32_RTIT_CTL.ToPA = 1, hence utilizing the ToPA output scheme; IA32_RTIT_OUTPUT_BASE and IA32_RTIT_OUTPUT_MASK_PTRS MSRs can be accessed.
pub fn has_topa_maximum_entries(&self) -> bool
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pub fn has_topa_maximum_entries(&self) -> bool
If true, ToPA tables can hold any number of output entries, up to the maximum allowed by the MaskOrTableOffset field of IA32_RTIT_OUTPUT_MASK_PTRS.
pub fn has_single_range_output_scheme(&self) -> bool
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pub fn has_single_range_output_scheme(&self) -> bool
If true, Indicates support of Single-Range Output scheme.
pub fn has_trace_transport_subsystem(&self) -> bool
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pub fn has_trace_transport_subsystem(&self) -> bool
If true, Indicates support of output to Trace Transport subsystem.
pub fn has_lip_with_cs_base(&self) -> bool
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pub fn has_lip_with_cs_base(&self) -> bool
If true, Generated packets which contain IP payloads have LIP values, which include the CS base component.
ⓘImportant traits for ProcessorTraceIterpub fn iter(&self) -> ProcessorTraceIter
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pub fn iter(&self) -> ProcessorTraceIter
Iterator over processor trace info sub-leafs.
Trait Implementations
impl Debug for ProcessorTraceInfo
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impl Debug for ProcessorTraceInfo
fn fmt(&self, f: &mut Formatter) -> Result
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fn fmt(&self, f: &mut Formatter) -> Result
Formats the value using the given formatter. Read more
impl Default for ProcessorTraceInfo
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impl Default for ProcessorTraceInfo
fn default() -> ProcessorTraceInfo
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fn default() -> ProcessorTraceInfo
Returns the "default value" for a type. Read more
Auto Trait Implementations
impl Send for ProcessorTraceInfo
impl Send for ProcessorTraceInfo
impl Sync for ProcessorTraceInfo
impl Sync for ProcessorTraceInfo