raw_acpi/srat/affinity/
mod.rs

1pub mod generic_initiator;
2pub mod generic_port;
3pub mod gic_interrupt_translation_service;
4pub mod gicc;
5pub mod memory;
6pub mod proc_local_apic;
7pub mod proc_local_x2apic;
8
9#[derive(Copy, Clone)]
10/// ## Flags - Processor Local APIC/SAPIC Affinity Structure
11pub struct ProcessorLocalAPICAffinityFlags(u32);
12impl ProcessorLocalAPICAffinityFlags {
13    /// If clear, the OSPM ignores the contents of the Processor Local APIC/SAPIC Affinity Structure.
14    /// This allows system firmware to populate the SRAT with a static number of structures but only enable them as necessary.
15    pub const fn enabled(&self) -> bool {
16        self.0 & 0b1 != 0
17    }
18    // JJ here, the rest of the bits are reserved; no need to implement.
19}
20
21#[derive(Copy, Clone)]
22/// ## Flags - Generic Initiator/Port Affinity Structure
23pub struct GenericInitiatorPortAffinityFlags(u32);
24impl GenericInitiatorPortAffinityFlags {
25    /// If clear, the OSPM ignores the contents of the Generic Initiator/Port Affinity Structure.
26    /// This allows system firmware to populate the SRAT with a static number of structures, but only enable them as necessary.
27    pub const fn enabled(&self) -> bool {
28        self.0 & 0b01 != 0
29    }
30    /// If set, indicates that the Generic Initiator/Port can initiate all transactions at the same architectural level as the host (e.g. full atomicOps, cache coherency, virtual memory, etc.)
31    pub const fn architectural_transactions(&self) -> bool {
32        self.0 & 0b10 != 0
33    }
34    // JJ here, the rest of the bits are reserved; no need to implement.
35}
raw_acpi/srat/affinity/mod.rs

raw_acpi/srat/affinity/
mod.rs
