raw_acpi/madt/extend_io_pic.rs
1#[derive(Copy, Clone)]
2#[repr(C, packed)]
3/// ## Extend I/O Programmable Interrupt Controller (EIO PIC) Structure
4///
5/// In newer generation Loongson CPUs, Extend I/O Programmable Interrupt Controller (EIO PIC) replaces the combination of HT PIC and part of LIO PIC,
6/// and routes interrupts from BIO PIC and MSI PIC to CORE PIC directly.
7pub struct ExtendIOProgrammableInterruptController {
8 /// 20 - Extend I/O Programmable Interrupt Controller Structure
9 pub r#type: u8,
10 /// Length of the Extend I/O Programmable Interrupt Controller Structure in bytes.
11 ///
12 /// **JJ's Note: There doesn't seem to be any variable-sized fields in this struct. The size is 13 bytes...**
13 pub length: u8,
14 /// - **0x00** - Invalid
15 /// - **0x01** - EIO PIC v1
16 ///
17 /// Other values are reserved.
18 pub version: u8,
19 /// This field describes routed vector on CORE PIC from EIO PIC vectors.
20 pub cascade_vector: u8,
21 /// The node ID of the node connected to bridge.
22 pub node: u8,
23 /// Each bit indicates one node that can receive interrupt routing from the EIO PIC.
24 pub node_map: u64,
25}