ra8e2_pac/
sysc.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.00.01, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:54:26 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"System Control"]
28unsafe impl ::core::marker::Send for super::Sysc {}
29unsafe impl ::core::marker::Sync for super::Sysc {}
30impl super::Sysc {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Standby Control Register"]
38    #[inline(always)]
39    pub const fn sbycr(&self) -> &'static crate::common::Reg<self::Sbycr_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Sbycr_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(12usize),
43            )
44        }
45    }
46
47    #[doc = "System Clock Division Control Register"]
48    #[inline(always)]
49    pub const fn sckdivcr(
50        &self,
51    ) -> &'static crate::common::Reg<self::Sckdivcr_SPEC, crate::common::RW> {
52        unsafe {
53            crate::common::Reg::<self::Sckdivcr_SPEC, crate::common::RW>::from_ptr(
54                self._svd2pac_as_ptr().add(32usize),
55            )
56        }
57    }
58
59    #[doc = "System Clock Division Control Register 2"]
60    #[inline(always)]
61    pub const fn sckdivcr2(
62        &self,
63    ) -> &'static crate::common::Reg<self::Sckdivcr2_SPEC, crate::common::RW> {
64        unsafe {
65            crate::common::Reg::<self::Sckdivcr2_SPEC, crate::common::RW>::from_ptr(
66                self._svd2pac_as_ptr().add(36usize),
67            )
68        }
69    }
70
71    #[doc = "System Clock Source Control Register"]
72    #[inline(always)]
73    pub const fn sckscr(
74        &self,
75    ) -> &'static crate::common::Reg<self::Sckscr_SPEC, crate::common::RW> {
76        unsafe {
77            crate::common::Reg::<self::Sckscr_SPEC, crate::common::RW>::from_ptr(
78                self._svd2pac_as_ptr().add(38usize),
79            )
80        }
81    }
82
83    #[doc = "PLL Clock Control Register"]
84    #[inline(always)]
85    pub const fn pllccr(
86        &self,
87    ) -> &'static crate::common::Reg<self::Pllccr_SPEC, crate::common::RW> {
88        unsafe {
89            crate::common::Reg::<self::Pllccr_SPEC, crate::common::RW>::from_ptr(
90                self._svd2pac_as_ptr().add(40usize),
91            )
92        }
93    }
94
95    #[doc = "PLL Control Register"]
96    #[inline(always)]
97    pub const fn pllcr(&self) -> &'static crate::common::Reg<self::Pllcr_SPEC, crate::common::RW> {
98        unsafe {
99            crate::common::Reg::<self::Pllcr_SPEC, crate::common::RW>::from_ptr(
100                self._svd2pac_as_ptr().add(42usize),
101            )
102        }
103    }
104
105    #[doc = "External Bus Clock Control Register"]
106    #[inline(always)]
107    pub const fn bckcr(&self) -> &'static crate::common::Reg<self::Bckcr_SPEC, crate::common::RW> {
108        unsafe {
109            crate::common::Reg::<self::Bckcr_SPEC, crate::common::RW>::from_ptr(
110                self._svd2pac_as_ptr().add(48usize),
111            )
112        }
113    }
114
115    #[doc = "Main Clock Oscillator Control Register"]
116    #[inline(always)]
117    pub const fn mosccr(
118        &self,
119    ) -> &'static crate::common::Reg<self::Mosccr_SPEC, crate::common::RW> {
120        unsafe {
121            crate::common::Reg::<self::Mosccr_SPEC, crate::common::RW>::from_ptr(
122                self._svd2pac_as_ptr().add(50usize),
123            )
124        }
125    }
126
127    #[doc = "High-Speed On-Chip Oscillator Control Register"]
128    #[inline(always)]
129    pub const fn hococr(
130        &self,
131    ) -> &'static crate::common::Reg<self::Hococr_SPEC, crate::common::RW> {
132        unsafe {
133            crate::common::Reg::<self::Hococr_SPEC, crate::common::RW>::from_ptr(
134                self._svd2pac_as_ptr().add(54usize),
135            )
136        }
137    }
138
139    #[doc = "High-Speed On-Chip Oscillator Control Register2"]
140    #[inline(always)]
141    pub const fn hococr2(
142        &self,
143    ) -> &'static crate::common::Reg<self::Hococr2_SPEC, crate::common::RW> {
144        unsafe {
145            crate::common::Reg::<self::Hococr2_SPEC, crate::common::RW>::from_ptr(
146                self._svd2pac_as_ptr().add(55usize),
147            )
148        }
149    }
150
151    #[doc = "Middle-Speed On-Chip Oscillator Control Register"]
152    #[inline(always)]
153    pub const fn mococr(
154        &self,
155    ) -> &'static crate::common::Reg<self::Mococr_SPEC, crate::common::RW> {
156        unsafe {
157            crate::common::Reg::<self::Mococr_SPEC, crate::common::RW>::from_ptr(
158                self._svd2pac_as_ptr().add(56usize),
159            )
160        }
161    }
162
163    #[doc = "FLL Control Register1"]
164    #[inline(always)]
165    pub const fn fllcr1(
166        &self,
167    ) -> &'static crate::common::Reg<self::Fllcr1_SPEC, crate::common::RW> {
168        unsafe {
169            crate::common::Reg::<self::Fllcr1_SPEC, crate::common::RW>::from_ptr(
170                self._svd2pac_as_ptr().add(57usize),
171            )
172        }
173    }
174
175    #[doc = "FLL Control Register2"]
176    #[inline(always)]
177    pub const fn fllcr2(
178        &self,
179    ) -> &'static crate::common::Reg<self::Fllcr2_SPEC, crate::common::RW> {
180        unsafe {
181            crate::common::Reg::<self::Fllcr2_SPEC, crate::common::RW>::from_ptr(
182                self._svd2pac_as_ptr().add(58usize),
183            )
184        }
185    }
186
187    #[doc = "Oscillation Stabilization Flag Register"]
188    #[inline(always)]
189    pub const fn oscsf(&self) -> &'static crate::common::Reg<self::Oscsf_SPEC, crate::common::R> {
190        unsafe {
191            crate::common::Reg::<self::Oscsf_SPEC, crate::common::R>::from_ptr(
192                self._svd2pac_as_ptr().add(60usize),
193            )
194        }
195    }
196
197    #[doc = "Clock Out Control Register"]
198    #[inline(always)]
199    pub const fn ckocr(&self) -> &'static crate::common::Reg<self::Ckocr_SPEC, crate::common::RW> {
200        unsafe {
201            crate::common::Reg::<self::Ckocr_SPEC, crate::common::RW>::from_ptr(
202                self._svd2pac_as_ptr().add(62usize),
203            )
204        }
205    }
206
207    #[doc = "Trace Clock Control Register"]
208    #[inline(always)]
209    pub const fn trckcr(
210        &self,
211    ) -> &'static crate::common::Reg<self::Trckcr_SPEC, crate::common::RW> {
212        unsafe {
213            crate::common::Reg::<self::Trckcr_SPEC, crate::common::RW>::from_ptr(
214                self._svd2pac_as_ptr().add(63usize),
215            )
216        }
217    }
218
219    #[doc = "Oscillation Stop Detection Control Register"]
220    #[inline(always)]
221    pub const fn ostdcr(
222        &self,
223    ) -> &'static crate::common::Reg<self::Ostdcr_SPEC, crate::common::RW> {
224        unsafe {
225            crate::common::Reg::<self::Ostdcr_SPEC, crate::common::RW>::from_ptr(
226                self._svd2pac_as_ptr().add(64usize),
227            )
228        }
229    }
230
231    #[doc = "Oscillation Stop Detection Status Register"]
232    #[inline(always)]
233    pub const fn ostdsr(
234        &self,
235    ) -> &'static crate::common::Reg<self::Ostdsr_SPEC, crate::common::RW> {
236        unsafe {
237            crate::common::Reg::<self::Ostdsr_SPEC, crate::common::RW>::from_ptr(
238                self._svd2pac_as_ptr().add(65usize),
239            )
240        }
241    }
242
243    #[doc = "Oscillator Monitor Register"]
244    #[inline(always)]
245    pub const fn oscmonr(
246        &self,
247    ) -> &'static crate::common::Reg<self::Oscmonr_SPEC, crate::common::RW> {
248        unsafe {
249            crate::common::Reg::<self::Oscmonr_SPEC, crate::common::RW>::from_ptr(
250                self._svd2pac_as_ptr().add(67usize),
251            )
252        }
253    }
254
255    #[doc = "PLL2 Clock Control Register"]
256    #[inline(always)]
257    pub const fn pll2ccr(
258        &self,
259    ) -> &'static crate::common::Reg<self::Pll2Ccr_SPEC, crate::common::RW> {
260        unsafe {
261            crate::common::Reg::<self::Pll2Ccr_SPEC, crate::common::RW>::from_ptr(
262                self._svd2pac_as_ptr().add(72usize),
263            )
264        }
265    }
266
267    #[doc = "PLL2 Control Register"]
268    #[inline(always)]
269    pub const fn pll2cr(
270        &self,
271    ) -> &'static crate::common::Reg<self::Pll2Cr_SPEC, crate::common::RW> {
272        unsafe {
273            crate::common::Reg::<self::Pll2Cr_SPEC, crate::common::RW>::from_ptr(
274                self._svd2pac_as_ptr().add(74usize),
275            )
276        }
277    }
278
279    #[doc = "PLL Clock Control Register 2"]
280    #[inline(always)]
281    pub const fn pllccr2(
282        &self,
283    ) -> &'static crate::common::Reg<self::Pllccr2_SPEC, crate::common::RW> {
284        unsafe {
285            crate::common::Reg::<self::Pllccr2_SPEC, crate::common::RW>::from_ptr(
286                self._svd2pac_as_ptr().add(76usize),
287            )
288        }
289    }
290
291    #[doc = "PLL2 Clock Control Register 2"]
292    #[inline(always)]
293    pub const fn pll2ccr2(
294        &self,
295    ) -> &'static crate::common::Reg<self::Pll2Ccr2_SPEC, crate::common::RW> {
296        unsafe {
297            crate::common::Reg::<self::Pll2Ccr2_SPEC, crate::common::RW>::from_ptr(
298                self._svd2pac_as_ptr().add(78usize),
299            )
300        }
301    }
302
303    #[doc = "External Bus Clock Output Control Register"]
304    #[inline(always)]
305    pub const fn ebckocr(
306        &self,
307    ) -> &'static crate::common::Reg<self::Ebckocr_SPEC, crate::common::RW> {
308        unsafe {
309            crate::common::Reg::<self::Ebckocr_SPEC, crate::common::RW>::from_ptr(
310                self._svd2pac_as_ptr().add(82usize),
311            )
312        }
313    }
314
315    #[doc = "SDRAM Clock Output Control Register"]
316    #[inline(always)]
317    pub const fn sdckocr(
318        &self,
319    ) -> &'static crate::common::Reg<self::Sdckocr_SPEC, crate::common::RW> {
320        unsafe {
321            crate::common::Reg::<self::Sdckocr_SPEC, crate::common::RW>::from_ptr(
322                self._svd2pac_as_ptr().add(83usize),
323            )
324        }
325    }
326
327    #[doc = "SCI clock Division control register"]
328    #[inline(always)]
329    pub const fn scickdivcr(
330        &self,
331    ) -> &'static crate::common::Reg<self::Scickdivcr_SPEC, crate::common::RW> {
332        unsafe {
333            crate::common::Reg::<self::Scickdivcr_SPEC, crate::common::RW>::from_ptr(
334                self._svd2pac_as_ptr().add(84usize),
335            )
336        }
337    }
338
339    #[doc = "SCI clock control register"]
340    #[inline(always)]
341    pub const fn scickcr(
342        &self,
343    ) -> &'static crate::common::Reg<self::Scickcr_SPEC, crate::common::RW> {
344        unsafe {
345            crate::common::Reg::<self::Scickcr_SPEC, crate::common::RW>::from_ptr(
346                self._svd2pac_as_ptr().add(85usize),
347            )
348        }
349    }
350
351    #[doc = "SPI clock Division control register"]
352    #[inline(always)]
353    pub const fn spickdivcr(
354        &self,
355    ) -> &'static crate::common::Reg<self::Spickdivcr_SPEC, crate::common::RW> {
356        unsafe {
357            crate::common::Reg::<self::Spickdivcr_SPEC, crate::common::RW>::from_ptr(
358                self._svd2pac_as_ptr().add(86usize),
359            )
360        }
361    }
362
363    #[doc = "SPI clock control register"]
364    #[inline(always)]
365    pub const fn spickcr(
366        &self,
367    ) -> &'static crate::common::Reg<self::Spickcr_SPEC, crate::common::RW> {
368        unsafe {
369            crate::common::Reg::<self::Spickcr_SPEC, crate::common::RW>::from_ptr(
370                self._svd2pac_as_ptr().add(87usize),
371            )
372        }
373    }
374
375    #[doc = "LCD clock Division control register"]
376    #[inline(always)]
377    pub const fn lcdckdivcr(
378        &self,
379    ) -> &'static crate::common::Reg<self::Lcdckdivcr_SPEC, crate::common::RW> {
380        unsafe {
381            crate::common::Reg::<self::Lcdckdivcr_SPEC, crate::common::RW>::from_ptr(
382                self._svd2pac_as_ptr().add(94usize),
383            )
384        }
385    }
386
387    #[doc = "LCD clock control register"]
388    #[inline(always)]
389    pub const fn lcdckcr(
390        &self,
391    ) -> &'static crate::common::Reg<self::Lcdckcr_SPEC, crate::common::RW> {
392        unsafe {
393            crate::common::Reg::<self::Lcdckcr_SPEC, crate::common::RW>::from_ptr(
394                self._svd2pac_as_ptr().add(95usize),
395            )
396        }
397    }
398
399    #[doc = "MOCO User Trimming Control Register"]
400    #[inline(always)]
401    pub const fn mocoutcr(
402        &self,
403    ) -> &'static crate::common::Reg<self::Mocoutcr_SPEC, crate::common::RW> {
404        unsafe {
405            crate::common::Reg::<self::Mocoutcr_SPEC, crate::common::RW>::from_ptr(
406                self._svd2pac_as_ptr().add(97usize),
407            )
408        }
409    }
410
411    #[doc = "HOCO User Trimming Control Register"]
412    #[inline(always)]
413    pub const fn hocoutcr(
414        &self,
415    ) -> &'static crate::common::Reg<self::Hocoutcr_SPEC, crate::common::RW> {
416        unsafe {
417            crate::common::Reg::<self::Hocoutcr_SPEC, crate::common::RW>::from_ptr(
418                self._svd2pac_as_ptr().add(98usize),
419            )
420        }
421    }
422
423    #[doc = "USB Clock Division Control Register"]
424    #[inline(always)]
425    pub const fn usbckdivcr(
426        &self,
427    ) -> &'static crate::common::Reg<self::Usbckdivcr_SPEC, crate::common::RW> {
428        unsafe {
429            crate::common::Reg::<self::Usbckdivcr_SPEC, crate::common::RW>::from_ptr(
430                self._svd2pac_as_ptr().add(108usize),
431            )
432        }
433    }
434
435    #[doc = "Octal-SPI Clock Division Control Register"]
436    #[inline(always)]
437    pub const fn octackdivcr(
438        &self,
439    ) -> &'static crate::common::Reg<self::Octackdivcr_SPEC, crate::common::RW> {
440        unsafe {
441            crate::common::Reg::<self::Octackdivcr_SPEC, crate::common::RW>::from_ptr(
442                self._svd2pac_as_ptr().add(109usize),
443            )
444        }
445    }
446
447    #[doc = "CANFD Core Clock Division Control Register"]
448    #[inline(always)]
449    pub const fn canfdckdivcr(
450        &self,
451    ) -> &'static crate::common::Reg<self::Canfdckdivcr_SPEC, crate::common::RW> {
452        unsafe {
453            crate::common::Reg::<self::Canfdckdivcr_SPEC, crate::common::RW>::from_ptr(
454                self._svd2pac_as_ptr().add(110usize),
455            )
456        }
457    }
458
459    #[doc = "USB Clock Control Register"]
460    #[inline(always)]
461    pub const fn usbckcr(
462        &self,
463    ) -> &'static crate::common::Reg<self::Usbckcr_SPEC, crate::common::RW> {
464        unsafe {
465            crate::common::Reg::<self::Usbckcr_SPEC, crate::common::RW>::from_ptr(
466                self._svd2pac_as_ptr().add(116usize),
467            )
468        }
469    }
470
471    #[doc = "Octal-SPI Clock Control Register"]
472    #[inline(always)]
473    pub const fn octackcr(
474        &self,
475    ) -> &'static crate::common::Reg<self::Octackcr_SPEC, crate::common::RW> {
476        unsafe {
477            crate::common::Reg::<self::Octackcr_SPEC, crate::common::RW>::from_ptr(
478                self._svd2pac_as_ptr().add(117usize),
479            )
480        }
481    }
482
483    #[doc = "CANFD Core Clock Control Register"]
484    #[inline(always)]
485    pub const fn canfdckcr(
486        &self,
487    ) -> &'static crate::common::Reg<self::Canfdckcr_SPEC, crate::common::RW> {
488        unsafe {
489            crate::common::Reg::<self::Canfdckcr_SPEC, crate::common::RW>::from_ptr(
490                self._svd2pac_as_ptr().add(118usize),
491            )
492        }
493    }
494
495    #[doc = "Main Clock Oscillator Standby Control Register"]
496    #[inline(always)]
497    pub const fn moscscr(
498        &self,
499    ) -> &'static crate::common::Reg<self::Moscscr_SPEC, crate::common::RW> {
500        unsafe {
501            crate::common::Reg::<self::Moscscr_SPEC, crate::common::RW>::from_ptr(
502                self._svd2pac_as_ptr().add(124usize),
503            )
504        }
505    }
506
507    #[doc = "High-Speed On-Chip Oscillator Standby Control Register"]
508    #[inline(always)]
509    pub const fn hocoscr(
510        &self,
511    ) -> &'static crate::common::Reg<self::Hocoscr_SPEC, crate::common::RW> {
512        unsafe {
513            crate::common::Reg::<self::Hocoscr_SPEC, crate::common::RW>::from_ptr(
514                self._svd2pac_as_ptr().add(125usize),
515            )
516        }
517    }
518
519    #[doc = "Operating Power Control Register"]
520    #[inline(always)]
521    pub const fn opccr(&self) -> &'static crate::common::Reg<self::Opccr_SPEC, crate::common::RW> {
522        unsafe {
523            crate::common::Reg::<self::Opccr_SPEC, crate::common::RW>::from_ptr(
524                self._svd2pac_as_ptr().add(160usize),
525            )
526        }
527    }
528
529    #[doc = "Main Clock Oscillator Wait Control Register"]
530    #[inline(always)]
531    pub const fn moscwtcr(
532        &self,
533    ) -> &'static crate::common::Reg<self::Moscwtcr_SPEC, crate::common::RW> {
534        unsafe {
535            crate::common::Reg::<self::Moscwtcr_SPEC, crate::common::RW>::from_ptr(
536                self._svd2pac_as_ptr().add(162usize),
537            )
538        }
539    }
540
541    #[doc = "Reset Status Register 1"]
542    #[inline(always)]
543    pub const fn rstsr1(
544        &self,
545    ) -> &'static crate::common::Reg<self::Rstsr1_SPEC, crate::common::RW> {
546        unsafe {
547            crate::common::Reg::<self::Rstsr1_SPEC, crate::common::RW>::from_ptr(
548                self._svd2pac_as_ptr().add(192usize),
549            )
550        }
551    }
552
553    #[doc = "System Register Access Control Register"]
554    #[inline(always)]
555    pub const fn syraccr(
556        &self,
557    ) -> &'static crate::common::Reg<self::Syraccr_SPEC, crate::common::R> {
558        unsafe {
559            crate::common::Reg::<self::Syraccr_SPEC, crate::common::R>::from_ptr(
560                self._svd2pac_as_ptr().add(204usize),
561            )
562        }
563    }
564
565    #[doc = "Voltage Monitor %s Circuit Control Register 1"]
566    #[inline(always)]
567    pub const fn pvdcr1(
568        &self,
569    ) -> &'static crate::common::ClusterRegisterArray<
570        crate::common::Reg<self::Pvdcr1_SPEC, crate::common::RW>,
571        2,
572        0x2,
573    > {
574        unsafe {
575            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xe0usize))
576        }
577    }
578    #[inline(always)]
579    pub const fn pvd1cr1(
580        &self,
581    ) -> &'static crate::common::Reg<self::Pvdcr1_SPEC, crate::common::RW> {
582        unsafe {
583            crate::common::Reg::<self::Pvdcr1_SPEC, crate::common::RW>::from_ptr(
584                self._svd2pac_as_ptr().add(0xe0usize),
585            )
586        }
587    }
588    #[inline(always)]
589    pub const fn pvd2cr1(
590        &self,
591    ) -> &'static crate::common::Reg<self::Pvdcr1_SPEC, crate::common::RW> {
592        unsafe {
593            crate::common::Reg::<self::Pvdcr1_SPEC, crate::common::RW>::from_ptr(
594                self._svd2pac_as_ptr().add(0xe2usize),
595            )
596        }
597    }
598
599    #[doc = "Voltage Monitor %s Circuit Status Register"]
600    #[inline(always)]
601    pub const fn pvdsr(
602        &self,
603    ) -> &'static crate::common::ClusterRegisterArray<
604        crate::common::Reg<self::Pvdsr_SPEC, crate::common::RW>,
605        2,
606        0x2,
607    > {
608        unsafe {
609            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xe1usize))
610        }
611    }
612    #[inline(always)]
613    pub const fn pvd1sr(&self) -> &'static crate::common::Reg<self::Pvdsr_SPEC, crate::common::RW> {
614        unsafe {
615            crate::common::Reg::<self::Pvdsr_SPEC, crate::common::RW>::from_ptr(
616                self._svd2pac_as_ptr().add(0xe1usize),
617            )
618        }
619    }
620    #[inline(always)]
621    pub const fn pvd2sr(&self) -> &'static crate::common::Reg<self::Pvdsr_SPEC, crate::common::RW> {
622        unsafe {
623            crate::common::Reg::<self::Pvdsr_SPEC, crate::common::RW>::from_ptr(
624                self._svd2pac_as_ptr().add(0xe3usize),
625            )
626        }
627    }
628
629    #[doc = "Graphics Power Domain Control Register"]
630    #[inline(always)]
631    pub const fn pdctrgd(
632        &self,
633    ) -> &'static crate::common::Reg<self::Pdctrgd_SPEC, crate::common::RW> {
634        unsafe {
635            crate::common::Reg::<self::Pdctrgd_SPEC, crate::common::RW>::from_ptr(
636                self._svd2pac_as_ptr().add(272usize),
637            )
638        }
639    }
640
641    #[doc = "SRAM Power Domain Standby Control Register 0"]
642    #[inline(always)]
643    pub const fn pdramscr0(
644        &self,
645    ) -> &'static crate::common::Reg<self::Pdramscr0_SPEC, crate::common::RW> {
646        unsafe {
647            crate::common::Reg::<self::Pdramscr0_SPEC, crate::common::RW>::from_ptr(
648                self._svd2pac_as_ptr().add(320usize),
649            )
650        }
651    }
652
653    #[doc = "SRAM Power Domain Standby Control Register 1"]
654    #[inline(always)]
655    pub const fn pdramscr1(
656        &self,
657    ) -> &'static crate::common::Reg<self::Pdramscr1_SPEC, crate::common::RW> {
658        unsafe {
659            crate::common::Reg::<self::Pdramscr1_SPEC, crate::common::RW>::from_ptr(
660                self._svd2pac_as_ptr().add(322usize),
661            )
662        }
663    }
664
665    #[doc = "VBATT Backup Register Security Attribute Boundary Address Register"]
666    #[inline(always)]
667    pub const fn vbrsabar(
668        &self,
669    ) -> &'static crate::common::Reg<self::Vbrsabar_SPEC, crate::common::RW> {
670        unsafe {
671            crate::common::Reg::<self::Vbrsabar_SPEC, crate::common::RW>::from_ptr(
672                self._svd2pac_as_ptr().add(944usize),
673            )
674        }
675    }
676
677    #[doc = "VBATT Backup Register Privilege Attribute Boundary Address Register for Secure Region"]
678    #[inline(always)]
679    pub const fn vbrpabars(
680        &self,
681    ) -> &'static crate::common::Reg<self::Vbrpabars_SPEC, crate::common::RW> {
682        unsafe {
683            crate::common::Reg::<self::Vbrpabars_SPEC, crate::common::RW>::from_ptr(
684                self._svd2pac_as_ptr().add(948usize),
685            )
686        }
687    }
688
689    #[doc = "Clock Generation Function Security Attribute Register"]
690    #[inline(always)]
691    pub const fn cgfsar(
692        &self,
693    ) -> &'static crate::common::Reg<self::Cgfsar_SPEC, crate::common::RW> {
694        unsafe {
695            crate::common::Reg::<self::Cgfsar_SPEC, crate::common::RW>::from_ptr(
696                self._svd2pac_as_ptr().add(960usize),
697            )
698        }
699    }
700
701    #[doc = "Reset Security Attribution Register"]
702    #[inline(always)]
703    pub const fn rstsar(
704        &self,
705    ) -> &'static crate::common::Reg<self::Rstsar_SPEC, crate::common::RW> {
706        unsafe {
707            crate::common::Reg::<self::Rstsar_SPEC, crate::common::RW>::from_ptr(
708                self._svd2pac_as_ptr().add(964usize),
709            )
710        }
711    }
712
713    #[doc = "Low Power Mode Security Attribution Register"]
714    #[inline(always)]
715    pub const fn lpmsar(
716        &self,
717    ) -> &'static crate::common::Reg<self::Lpmsar_SPEC, crate::common::RW> {
718        unsafe {
719            crate::common::Reg::<self::Lpmsar_SPEC, crate::common::RW>::from_ptr(
720                self._svd2pac_as_ptr().add(968usize),
721            )
722        }
723    }
724
725    #[doc = "Programable Voltage Detection Security Attribution Register"]
726    #[inline(always)]
727    pub const fn pvdsar(
728        &self,
729    ) -> &'static crate::common::Reg<self::Pvdsar_SPEC, crate::common::RW> {
730        unsafe {
731            crate::common::Reg::<self::Pvdsar_SPEC, crate::common::RW>::from_ptr(
732                self._svd2pac_as_ptr().add(972usize),
733            )
734        }
735    }
736
737    #[doc = "Battery Backup Function Security Attribute Register"]
738    #[inline(always)]
739    pub const fn bbfsar(
740        &self,
741    ) -> &'static crate::common::Reg<self::Bbfsar_SPEC, crate::common::RW> {
742        unsafe {
743            crate::common::Reg::<self::Bbfsar_SPEC, crate::common::RW>::from_ptr(
744                self._svd2pac_as_ptr().add(976usize),
745            )
746        }
747    }
748
749    #[doc = "Power Gating Control Security Attribution Register"]
750    #[inline(always)]
751    pub const fn pgcsar(
752        &self,
753    ) -> &'static crate::common::Reg<self::Pgcsar_SPEC, crate::common::RW> {
754        unsafe {
755            crate::common::Reg::<self::Pgcsar_SPEC, crate::common::RW>::from_ptr(
756                self._svd2pac_as_ptr().add(984usize),
757            )
758        }
759    }
760
761    #[doc = "Deep Software Standby Interrupt Factor Security Attribution Register"]
762    #[inline(always)]
763    pub const fn dpfsar(
764        &self,
765    ) -> &'static crate::common::Reg<self::Dpfsar_SPEC, crate::common::RW> {
766        unsafe {
767            crate::common::Reg::<self::Dpfsar_SPEC, crate::common::RW>::from_ptr(
768                self._svd2pac_as_ptr().add(992usize),
769            )
770        }
771    }
772
773    #[doc = "RAM Standby Control Security Attribution Register"]
774    #[inline(always)]
775    pub const fn rscsar(
776        &self,
777    ) -> &'static crate::common::Reg<self::Rscsar_SPEC, crate::common::RW> {
778        unsafe {
779            crate::common::Reg::<self::Rscsar_SPEC, crate::common::RW>::from_ptr(
780                self._svd2pac_as_ptr().add(996usize),
781            )
782        }
783    }
784
785    #[doc = "Protect Register for Secure (PRCR_S)"]
786    #[inline(always)]
787    pub const fn prcr_s(&self) -> &'static crate::common::Reg<self::PrcrS_SPEC, crate::common::RW> {
788        unsafe {
789            crate::common::Reg::<self::PrcrS_SPEC, crate::common::RW>::from_ptr(
790                self._svd2pac_as_ptr().add(1018usize),
791            )
792        }
793    }
794
795    #[doc = "Low-Speed On-Chip Oscillator Control Register"]
796    #[inline(always)]
797    pub const fn lococr(
798        &self,
799    ) -> &'static crate::common::Reg<self::Lococr_SPEC, crate::common::RW> {
800        unsafe {
801            crate::common::Reg::<self::Lococr_SPEC, crate::common::RW>::from_ptr(
802                self._svd2pac_as_ptr().add(1024usize),
803            )
804        }
805    }
806
807    #[doc = "LOCO User Trimming Control Register"]
808    #[inline(always)]
809    pub const fn locoutcr(
810        &self,
811    ) -> &'static crate::common::Reg<self::Locoutcr_SPEC, crate::common::RW> {
812        unsafe {
813            crate::common::Reg::<self::Locoutcr_SPEC, crate::common::RW>::from_ptr(
814                self._svd2pac_as_ptr().add(1026usize),
815            )
816        }
817    }
818
819    #[doc = "Deep Software Standby Control Register"]
820    #[inline(always)]
821    pub const fn dpsbycr(
822        &self,
823    ) -> &'static crate::common::Reg<self::Dpsbycr_SPEC, crate::common::RW> {
824        unsafe {
825            crate::common::Reg::<self::Dpsbycr_SPEC, crate::common::RW>::from_ptr(
826                self._svd2pac_as_ptr().add(2560usize),
827            )
828        }
829    }
830
831    #[doc = "Deep Software Standby Wait Control Register"]
832    #[inline(always)]
833    pub const fn dpswcr(
834        &self,
835    ) -> &'static crate::common::Reg<self::Dpswcr_SPEC, crate::common::RW> {
836        unsafe {
837            crate::common::Reg::<self::Dpswcr_SPEC, crate::common::RW>::from_ptr(
838                self._svd2pac_as_ptr().add(2564usize),
839            )
840        }
841    }
842
843    #[doc = "Deep Software Standby Interrupt Enable Register 0"]
844    #[inline(always)]
845    pub const fn dpsier0(
846        &self,
847    ) -> &'static crate::common::Reg<self::Dpsier0_SPEC, crate::common::RW> {
848        unsafe {
849            crate::common::Reg::<self::Dpsier0_SPEC, crate::common::RW>::from_ptr(
850                self._svd2pac_as_ptr().add(2568usize),
851            )
852        }
853    }
854
855    #[doc = "Deep Software Standby Interrupt Enable Register 1"]
856    #[inline(always)]
857    pub const fn dpsier1(
858        &self,
859    ) -> &'static crate::common::Reg<self::Dpsier1_SPEC, crate::common::RW> {
860        unsafe {
861            crate::common::Reg::<self::Dpsier1_SPEC, crate::common::RW>::from_ptr(
862                self._svd2pac_as_ptr().add(2572usize),
863            )
864        }
865    }
866
867    #[doc = "Deep Software Standby Interrupt Enable Register 2"]
868    #[inline(always)]
869    pub const fn dpsier2(
870        &self,
871    ) -> &'static crate::common::Reg<self::Dpsier2_SPEC, crate::common::RW> {
872        unsafe {
873            crate::common::Reg::<self::Dpsier2_SPEC, crate::common::RW>::from_ptr(
874                self._svd2pac_as_ptr().add(2576usize),
875            )
876        }
877    }
878
879    #[doc = "Deep Software Standby Interrupt Enable Register 3"]
880    #[inline(always)]
881    pub const fn dpsier3(
882        &self,
883    ) -> &'static crate::common::Reg<self::Dpsier3_SPEC, crate::common::RW> {
884        unsafe {
885            crate::common::Reg::<self::Dpsier3_SPEC, crate::common::RW>::from_ptr(
886                self._svd2pac_as_ptr().add(2580usize),
887            )
888        }
889    }
890
891    #[doc = "Deep Software Standby Interrupt Flag Register 0"]
892    #[inline(always)]
893    pub const fn dpsifr0(
894        &self,
895    ) -> &'static crate::common::Reg<self::Dpsifr0_SPEC, crate::common::RW> {
896        unsafe {
897            crate::common::Reg::<self::Dpsifr0_SPEC, crate::common::RW>::from_ptr(
898                self._svd2pac_as_ptr().add(2584usize),
899            )
900        }
901    }
902
903    #[doc = "Deep Software Standby Interrupt Flag Register 1"]
904    #[inline(always)]
905    pub const fn dpsifr1(
906        &self,
907    ) -> &'static crate::common::Reg<self::Dpsifr1_SPEC, crate::common::RW> {
908        unsafe {
909            crate::common::Reg::<self::Dpsifr1_SPEC, crate::common::RW>::from_ptr(
910                self._svd2pac_as_ptr().add(2588usize),
911            )
912        }
913    }
914
915    #[doc = "Deep Software Standby Interrupt Flag Register 2"]
916    #[inline(always)]
917    pub const fn dpsifr2(
918        &self,
919    ) -> &'static crate::common::Reg<self::Dpsifr2_SPEC, crate::common::RW> {
920        unsafe {
921            crate::common::Reg::<self::Dpsifr2_SPEC, crate::common::RW>::from_ptr(
922                self._svd2pac_as_ptr().add(2592usize),
923            )
924        }
925    }
926
927    #[doc = "Deep Software Standby Interrupt Flag Register 3"]
928    #[inline(always)]
929    pub const fn dpsifr3(
930        &self,
931    ) -> &'static crate::common::Reg<self::Dpsifr3_SPEC, crate::common::RW> {
932        unsafe {
933            crate::common::Reg::<self::Dpsifr3_SPEC, crate::common::RW>::from_ptr(
934                self._svd2pac_as_ptr().add(2596usize),
935            )
936        }
937    }
938
939    #[doc = "Deep Software Standby Interrupt Edge Register 0"]
940    #[inline(always)]
941    pub const fn dpsiegr0(
942        &self,
943    ) -> &'static crate::common::Reg<self::Dpsiegr0_SPEC, crate::common::RW> {
944        unsafe {
945            crate::common::Reg::<self::Dpsiegr0_SPEC, crate::common::RW>::from_ptr(
946                self._svd2pac_as_ptr().add(2600usize),
947            )
948        }
949    }
950
951    #[doc = "Deep Software Standby Interrupt Edge Register 1"]
952    #[inline(always)]
953    pub const fn dpsiegr1(
954        &self,
955    ) -> &'static crate::common::Reg<self::Dpsiegr1_SPEC, crate::common::RW> {
956        unsafe {
957            crate::common::Reg::<self::Dpsiegr1_SPEC, crate::common::RW>::from_ptr(
958                self._svd2pac_as_ptr().add(2604usize),
959            )
960        }
961    }
962
963    #[doc = "Deep Software Standby Interrupt Edge Register 2"]
964    #[inline(always)]
965    pub const fn dpsiegr2(
966        &self,
967    ) -> &'static crate::common::Reg<self::Dpsiegr2_SPEC, crate::common::RW> {
968        unsafe {
969            crate::common::Reg::<self::Dpsiegr2_SPEC, crate::common::RW>::from_ptr(
970                self._svd2pac_as_ptr().add(2608usize),
971            )
972        }
973    }
974
975    #[doc = "System Control OCD Control Register"]
976    #[inline(always)]
977    pub const fn syocdcr(
978        &self,
979    ) -> &'static crate::common::Reg<self::Syocdcr_SPEC, crate::common::RW> {
980        unsafe {
981            crate::common::Reg::<self::Syocdcr_SPEC, crate::common::RW>::from_ptr(
982                self._svd2pac_as_ptr().add(2616usize),
983            )
984        }
985    }
986
987    #[doc = "Reset Status Register 0"]
988    #[inline(always)]
989    pub const fn rstsr0(
990        &self,
991    ) -> &'static crate::common::Reg<self::Rstsr0_SPEC, crate::common::RW> {
992        unsafe {
993            crate::common::Reg::<self::Rstsr0_SPEC, crate::common::RW>::from_ptr(
994                self._svd2pac_as_ptr().add(2624usize),
995            )
996        }
997    }
998
999    #[doc = "Reset Status Register 2"]
1000    #[inline(always)]
1001    pub const fn rstsr2(
1002        &self,
1003    ) -> &'static crate::common::Reg<self::Rstsr2_SPEC, crate::common::RW> {
1004        unsafe {
1005            crate::common::Reg::<self::Rstsr2_SPEC, crate::common::RW>::from_ptr(
1006                self._svd2pac_as_ptr().add(2628usize),
1007            )
1008        }
1009    }
1010
1011    #[doc = "Main Clock Oscillator Mode Oscillation Control Register"]
1012    #[inline(always)]
1013    pub const fn momcr(&self) -> &'static crate::common::Reg<self::Momcr_SPEC, crate::common::RW> {
1014        unsafe {
1015            crate::common::Reg::<self::Momcr_SPEC, crate::common::RW>::from_ptr(
1016                self._svd2pac_as_ptr().add(2640usize),
1017            )
1018        }
1019    }
1020
1021    #[doc = "Flash P/E Protect Register"]
1022    #[inline(always)]
1023    pub const fn fwepror(
1024        &self,
1025    ) -> &'static crate::common::Reg<self::Fwepror_SPEC, crate::common::RW> {
1026        unsafe {
1027            crate::common::Reg::<self::Fwepror_SPEC, crate::common::RW>::from_ptr(
1028                self._svd2pac_as_ptr().add(2644usize),
1029            )
1030        }
1031    }
1032
1033    #[doc = "Voltage Monitor %s Comparator Control Register"]
1034    #[inline(always)]
1035    pub const fn pvdcmpcr(
1036        &self,
1037    ) -> &'static crate::common::ClusterRegisterArray<
1038        crate::common::Reg<self::Pvdcmpcr_SPEC, crate::common::RW>,
1039        2,
1040        0x4,
1041    > {
1042        unsafe {
1043            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xa58usize))
1044        }
1045    }
1046    #[inline(always)]
1047    pub const fn pvd1cmpcr(
1048        &self,
1049    ) -> &'static crate::common::Reg<self::Pvdcmpcr_SPEC, crate::common::RW> {
1050        unsafe {
1051            crate::common::Reg::<self::Pvdcmpcr_SPEC, crate::common::RW>::from_ptr(
1052                self._svd2pac_as_ptr().add(0xa58usize),
1053            )
1054        }
1055    }
1056    #[inline(always)]
1057    pub const fn pvd2cmpcr(
1058        &self,
1059    ) -> &'static crate::common::Reg<self::Pvdcmpcr_SPEC, crate::common::RW> {
1060        unsafe {
1061            crate::common::Reg::<self::Pvdcmpcr_SPEC, crate::common::RW>::from_ptr(
1062                self._svd2pac_as_ptr().add(0xa5cusize),
1063            )
1064        }
1065    }
1066
1067    #[doc = "Voltage Monitor %s Circuit Control Register 0"]
1068    #[inline(always)]
1069    pub const fn pvdcr0(
1070        &self,
1071    ) -> &'static crate::common::ClusterRegisterArray<
1072        crate::common::Reg<self::Pvdcr0_SPEC, crate::common::RW>,
1073        2,
1074        0x4,
1075    > {
1076        unsafe {
1077            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xa70usize))
1078        }
1079    }
1080    #[inline(always)]
1081    pub const fn pvd1cr0(
1082        &self,
1083    ) -> &'static crate::common::Reg<self::Pvdcr0_SPEC, crate::common::RW> {
1084        unsafe {
1085            crate::common::Reg::<self::Pvdcr0_SPEC, crate::common::RW>::from_ptr(
1086                self._svd2pac_as_ptr().add(0xa70usize),
1087            )
1088        }
1089    }
1090    #[inline(always)]
1091    pub const fn pvd2cr0(
1092        &self,
1093    ) -> &'static crate::common::Reg<self::Pvdcr0_SPEC, crate::common::RW> {
1094        unsafe {
1095            crate::common::Reg::<self::Pvdcr0_SPEC, crate::common::RW>::from_ptr(
1096                self._svd2pac_as_ptr().add(0xa74usize),
1097            )
1098        }
1099    }
1100
1101    #[doc = "Battery Backup Voltage Monitor Function Select Register"]
1102    #[inline(always)]
1103    pub const fn vbattmnselr(
1104        &self,
1105    ) -> &'static crate::common::Reg<self::Vbattmnselr_SPEC, crate::common::RW> {
1106        unsafe {
1107            crate::common::Reg::<self::Vbattmnselr_SPEC, crate::common::RW>::from_ptr(
1108                self._svd2pac_as_ptr().add(2692usize),
1109            )
1110        }
1111    }
1112
1113    #[doc = "VBATT Battery Power Supply Control Register 1"]
1114    #[inline(always)]
1115    pub const fn vbtbpcr1(
1116        &self,
1117    ) -> &'static crate::common::Reg<self::Vbtbpcr1_SPEC, crate::common::RW> {
1118        unsafe {
1119            crate::common::Reg::<self::Vbtbpcr1_SPEC, crate::common::RW>::from_ptr(
1120                self._svd2pac_as_ptr().add(2696usize),
1121            )
1122        }
1123    }
1124
1125    #[doc = "Low Power State Control Register"]
1126    #[inline(always)]
1127    pub const fn lpscr(&self) -> &'static crate::common::Reg<self::Lpscr_SPEC, crate::common::RW> {
1128        unsafe {
1129            crate::common::Reg::<self::Lpscr_SPEC, crate::common::RW>::from_ptr(
1130                self._svd2pac_as_ptr().add(2704usize),
1131            )
1132        }
1133    }
1134
1135    #[doc = "Software Standby Control Register 1"]
1136    #[inline(always)]
1137    pub const fn sscr1(&self) -> &'static crate::common::Reg<self::Sscr1_SPEC, crate::common::RW> {
1138        unsafe {
1139            crate::common::Reg::<self::Sscr1_SPEC, crate::common::RW>::from_ptr(
1140                self._svd2pac_as_ptr().add(2712usize),
1141            )
1142        }
1143    }
1144
1145    #[doc = "Low Voltage Operation Control register"]
1146    #[inline(always)]
1147    pub const fn lvocr(&self) -> &'static crate::common::Reg<self::Lvocr_SPEC, crate::common::RW> {
1148        unsafe {
1149            crate::common::Reg::<self::Lvocr_SPEC, crate::common::RW>::from_ptr(
1150                self._svd2pac_as_ptr().add(2736usize),
1151            )
1152        }
1153    }
1154
1155    #[doc = "System Reset Mask Control Register 0"]
1156    #[inline(always)]
1157    pub const fn syrstmsk0(
1158        &self,
1159    ) -> &'static crate::common::Reg<self::Syrstmsk0_SPEC, crate::common::RW> {
1160        unsafe {
1161            crate::common::Reg::<self::Syrstmsk0_SPEC, crate::common::RW>::from_ptr(
1162                self._svd2pac_as_ptr().add(2768usize),
1163            )
1164        }
1165    }
1166
1167    #[doc = "System Reset Mask Control Register 2"]
1168    #[inline(always)]
1169    pub const fn syrstmsk2(
1170        &self,
1171    ) -> &'static crate::common::Reg<self::Syrstmsk2_SPEC, crate::common::RW> {
1172        unsafe {
1173            crate::common::Reg::<self::Syrstmsk2_SPEC, crate::common::RW>::from_ptr(
1174                self._svd2pac_as_ptr().add(2776usize),
1175            )
1176        }
1177    }
1178
1179    #[doc = "PLL1-LDO Control Register"]
1180    #[inline(always)]
1181    pub const fn pll1ldocr(
1182        &self,
1183    ) -> &'static crate::common::Reg<self::Pll1Ldocr_SPEC, crate::common::RW> {
1184        unsafe {
1185            crate::common::Reg::<self::Pll1Ldocr_SPEC, crate::common::RW>::from_ptr(
1186                self._svd2pac_as_ptr().add(2820usize),
1187            )
1188        }
1189    }
1190
1191    #[doc = "PLL2-LDO Control Register"]
1192    #[inline(always)]
1193    pub const fn pll2ldocr(
1194        &self,
1195    ) -> &'static crate::common::Reg<self::Pll2Ldocr_SPEC, crate::common::RW> {
1196        unsafe {
1197            crate::common::Reg::<self::Pll2Ldocr_SPEC, crate::common::RW>::from_ptr(
1198                self._svd2pac_as_ptr().add(2824usize),
1199            )
1200        }
1201    }
1202
1203    #[doc = "HOCO-LDO Control Register"]
1204    #[inline(always)]
1205    pub const fn hocoldocr(
1206        &self,
1207    ) -> &'static crate::common::Reg<self::Hocoldocr_SPEC, crate::common::RW> {
1208        unsafe {
1209            crate::common::Reg::<self::Hocoldocr_SPEC, crate::common::RW>::from_ptr(
1210                self._svd2pac_as_ptr().add(2828usize),
1211            )
1212        }
1213    }
1214
1215    #[doc = "Voltage Monitor %s Function Control Register"]
1216    #[inline(always)]
1217    pub const fn pvdfcr(
1218        &self,
1219    ) -> &'static crate::common::ClusterRegisterArray<
1220        crate::common::Reg<self::Pvdfcr_SPEC, crate::common::RW>,
1221        2,
1222        0x4,
1223    > {
1224        unsafe {
1225            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xb20usize))
1226        }
1227    }
1228    #[inline(always)]
1229    pub const fn pvd1fcr(
1230        &self,
1231    ) -> &'static crate::common::Reg<self::Pvdfcr_SPEC, crate::common::RW> {
1232        unsafe {
1233            crate::common::Reg::<self::Pvdfcr_SPEC, crate::common::RW>::from_ptr(
1234                self._svd2pac_as_ptr().add(0xb20usize),
1235            )
1236        }
1237    }
1238    #[inline(always)]
1239    pub const fn pvd2fcr(
1240        &self,
1241    ) -> &'static crate::common::Reg<self::Pvdfcr_SPEC, crate::common::RW> {
1242        unsafe {
1243            crate::common::Reg::<self::Pvdfcr_SPEC, crate::common::RW>::from_ptr(
1244                self._svd2pac_as_ptr().add(0xb24usize),
1245            )
1246        }
1247    }
1248
1249    #[doc = "Sub-Clock Oscillator Control Register"]
1250    #[inline(always)]
1251    pub const fn sosccr(
1252        &self,
1253    ) -> &'static crate::common::Reg<self::Sosccr_SPEC, crate::common::RW> {
1254        unsafe {
1255            crate::common::Reg::<self::Sosccr_SPEC, crate::common::RW>::from_ptr(
1256                self._svd2pac_as_ptr().add(3072usize),
1257            )
1258        }
1259    }
1260
1261    #[doc = "Sub-Clock Oscillator Mode Control Register"]
1262    #[inline(always)]
1263    pub const fn somcr(&self) -> &'static crate::common::Reg<self::Somcr_SPEC, crate::common::RW> {
1264        unsafe {
1265            crate::common::Reg::<self::Somcr_SPEC, crate::common::RW>::from_ptr(
1266                self._svd2pac_as_ptr().add(3073usize),
1267            )
1268        }
1269    }
1270
1271    #[doc = "VBATT Backup Enable Register"]
1272    #[inline(always)]
1273    pub const fn vbtber(
1274        &self,
1275    ) -> &'static crate::common::Reg<self::Vbtber_SPEC, crate::common::RW> {
1276        unsafe {
1277            crate::common::Reg::<self::Vbtber_SPEC, crate::common::RW>::from_ptr(
1278                self._svd2pac_as_ptr().add(3136usize),
1279            )
1280        }
1281    }
1282
1283    #[doc = "VBATT Battery Power Supply Control Register 2"]
1284    #[inline(always)]
1285    pub const fn vbtbpcr2(
1286        &self,
1287    ) -> &'static crate::common::Reg<self::Vbtbpcr2_SPEC, crate::common::RW> {
1288        unsafe {
1289            crate::common::Reg::<self::Vbtbpcr2_SPEC, crate::common::RW>::from_ptr(
1290                self._svd2pac_as_ptr().add(3141usize),
1291            )
1292        }
1293    }
1294
1295    #[doc = "VBATT Battery Power Supply Status Register"]
1296    #[inline(always)]
1297    pub const fn vbtbpsr(
1298        &self,
1299    ) -> &'static crate::common::Reg<self::Vbtbpsr_SPEC, crate::common::RW> {
1300        unsafe {
1301            crate::common::Reg::<self::Vbtbpsr_SPEC, crate::common::RW>::from_ptr(
1302                self._svd2pac_as_ptr().add(3142usize),
1303            )
1304        }
1305    }
1306
1307    #[doc = "VBATT Tamper detection Status Register"]
1308    #[inline(always)]
1309    pub const fn vbtadsr(
1310        &self,
1311    ) -> &'static crate::common::Reg<self::Vbtadsr_SPEC, crate::common::RW> {
1312        unsafe {
1313            crate::common::Reg::<self::Vbtadsr_SPEC, crate::common::RW>::from_ptr(
1314                self._svd2pac_as_ptr().add(3144usize),
1315            )
1316        }
1317    }
1318
1319    #[doc = "VBATT Tamper detection Control Register 1"]
1320    #[inline(always)]
1321    pub const fn vbtadcr1(
1322        &self,
1323    ) -> &'static crate::common::Reg<self::Vbtadcr1_SPEC, crate::common::RW> {
1324        unsafe {
1325            crate::common::Reg::<self::Vbtadcr1_SPEC, crate::common::RW>::from_ptr(
1326                self._svd2pac_as_ptr().add(3145usize),
1327            )
1328        }
1329    }
1330
1331    #[doc = "VBATT Tamper detection Control Register 2"]
1332    #[inline(always)]
1333    pub const fn vbtadcr2(
1334        &self,
1335    ) -> &'static crate::common::Reg<self::Vbtadcr2_SPEC, crate::common::RW> {
1336        unsafe {
1337            crate::common::Reg::<self::Vbtadcr2_SPEC, crate::common::RW>::from_ptr(
1338                self._svd2pac_as_ptr().add(3146usize),
1339            )
1340        }
1341    }
1342
1343    #[doc = "VBATT Input Control Register"]
1344    #[inline(always)]
1345    pub const fn vbtictlr(
1346        &self,
1347    ) -> &'static crate::common::Reg<self::Vbtictlr_SPEC, crate::common::RW> {
1348        unsafe {
1349            crate::common::Reg::<self::Vbtictlr_SPEC, crate::common::RW>::from_ptr(
1350                self._svd2pac_as_ptr().add(3148usize),
1351            )
1352        }
1353    }
1354
1355    #[doc = "VBATT Input Control Register 2"]
1356    #[inline(always)]
1357    pub const fn vbtictlr2(
1358        &self,
1359    ) -> &'static crate::common::Reg<self::Vbtictlr2_SPEC, crate::common::RW> {
1360        unsafe {
1361            crate::common::Reg::<self::Vbtictlr2_SPEC, crate::common::RW>::from_ptr(
1362                self._svd2pac_as_ptr().add(3149usize),
1363            )
1364        }
1365    }
1366
1367    #[doc = "VBATT Input Monitor Register"]
1368    #[inline(always)]
1369    pub const fn vbtimonr(
1370        &self,
1371    ) -> &'static crate::common::Reg<self::Vbtimonr_SPEC, crate::common::R> {
1372        unsafe {
1373            crate::common::Reg::<self::Vbtimonr_SPEC, crate::common::R>::from_ptr(
1374                self._svd2pac_as_ptr().add(3150usize),
1375            )
1376        }
1377    }
1378
1379    #[doc = "VBATT Backup Register"]
1380    #[inline(always)]
1381    pub const fn vbtbkr(
1382        &self,
1383    ) -> &'static crate::common::ClusterRegisterArray<
1384        crate::common::Reg<self::Vbtbkr_SPEC, crate::common::RW>,
1385        128,
1386        0x1,
1387    > {
1388        unsafe {
1389            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0xd00usize))
1390        }
1391    }
1392}
1393#[doc(hidden)]
1394#[derive(Copy, Clone, Eq, PartialEq)]
1395pub struct Sbycr_SPEC;
1396impl crate::sealed::RegSpec for Sbycr_SPEC {
1397    type DataType = u8;
1398}
1399
1400#[doc = "Standby Control Register"]
1401pub type Sbycr = crate::RegValueT<Sbycr_SPEC>;
1402
1403impl Sbycr {
1404    #[doc = "Output Port Enable"]
1405    #[inline(always)]
1406    pub fn ope(
1407        self,
1408    ) -> crate::common::RegisterField<
1409        6,
1410        0x1,
1411        1,
1412        0,
1413        sbycr::Ope,
1414        sbycr::Ope,
1415        Sbycr_SPEC,
1416        crate::common::RW,
1417    > {
1418        crate::common::RegisterField::<
1419            6,
1420            0x1,
1421            1,
1422            0,
1423            sbycr::Ope,
1424            sbycr::Ope,
1425            Sbycr_SPEC,
1426            crate::common::RW,
1427        >::from_register(self, 0)
1428    }
1429}
1430impl ::core::default::Default for Sbycr {
1431    #[inline(always)]
1432    fn default() -> Sbycr {
1433        <crate::RegValueT<Sbycr_SPEC> as RegisterValue<_>>::new(64)
1434    }
1435}
1436pub mod sbycr {
1437
1438    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1439    pub struct Ope_SPEC;
1440    pub type Ope = crate::EnumBitfieldStruct<u8, Ope_SPEC>;
1441    impl Ope {
1442        #[doc = "In Software Standby mode or Deep Software Standby mode, set the address bus and other bus control signal to the high-impedance state."]
1443        pub const _0: Self = Self::new(0);
1444
1445        #[doc = "In Software Standby mode or Deep Software Standby mode, address bus and other bus control signal retain the output state."]
1446        pub const _1: Self = Self::new(1);
1447    }
1448}
1449#[doc(hidden)]
1450#[derive(Copy, Clone, Eq, PartialEq)]
1451pub struct Sckdivcr_SPEC;
1452impl crate::sealed::RegSpec for Sckdivcr_SPEC {
1453    type DataType = u32;
1454}
1455
1456#[doc = "System Clock Division Control Register"]
1457pub type Sckdivcr = crate::RegValueT<Sckdivcr_SPEC>;
1458
1459impl Sckdivcr {
1460    #[doc = "Peripheral Module Clock D (PCLKD) Select"]
1461    #[inline(always)]
1462    pub fn pckd(
1463        self,
1464    ) -> crate::common::RegisterField<
1465        0,
1466        0xf,
1467        1,
1468        0,
1469        sckdivcr::Pckd,
1470        sckdivcr::Pckd,
1471        Sckdivcr_SPEC,
1472        crate::common::RW,
1473    > {
1474        crate::common::RegisterField::<
1475            0,
1476            0xf,
1477            1,
1478            0,
1479            sckdivcr::Pckd,
1480            sckdivcr::Pckd,
1481            Sckdivcr_SPEC,
1482            crate::common::RW,
1483        >::from_register(self, 0)
1484    }
1485
1486    #[doc = "Peripheral Module Clock C (PCLKC) Select"]
1487    #[inline(always)]
1488    pub fn pckc(
1489        self,
1490    ) -> crate::common::RegisterField<
1491        4,
1492        0xf,
1493        1,
1494        0,
1495        sckdivcr::Pckc,
1496        sckdivcr::Pckc,
1497        Sckdivcr_SPEC,
1498        crate::common::RW,
1499    > {
1500        crate::common::RegisterField::<
1501            4,
1502            0xf,
1503            1,
1504            0,
1505            sckdivcr::Pckc,
1506            sckdivcr::Pckc,
1507            Sckdivcr_SPEC,
1508            crate::common::RW,
1509        >::from_register(self, 0)
1510    }
1511
1512    #[doc = "Peripheral Module Clock B (PCLKB) Select"]
1513    #[inline(always)]
1514    pub fn pckb(
1515        self,
1516    ) -> crate::common::RegisterField<
1517        8,
1518        0xf,
1519        1,
1520        0,
1521        sckdivcr::Pckb,
1522        sckdivcr::Pckb,
1523        Sckdivcr_SPEC,
1524        crate::common::RW,
1525    > {
1526        crate::common::RegisterField::<
1527            8,
1528            0xf,
1529            1,
1530            0,
1531            sckdivcr::Pckb,
1532            sckdivcr::Pckb,
1533            Sckdivcr_SPEC,
1534            crate::common::RW,
1535        >::from_register(self, 0)
1536    }
1537
1538    #[doc = "Peripheral Module Clock A (PCLKA) Select"]
1539    #[inline(always)]
1540    pub fn pcka(
1541        self,
1542    ) -> crate::common::RegisterField<
1543        12,
1544        0xf,
1545        1,
1546        0,
1547        sckdivcr::Pcka,
1548        sckdivcr::Pcka,
1549        Sckdivcr_SPEC,
1550        crate::common::RW,
1551    > {
1552        crate::common::RegisterField::<
1553            12,
1554            0xf,
1555            1,
1556            0,
1557            sckdivcr::Pcka,
1558            sckdivcr::Pcka,
1559            Sckdivcr_SPEC,
1560            crate::common::RW,
1561        >::from_register(self, 0)
1562    }
1563
1564    #[doc = "External Bus Clock (BCLK) Select"]
1565    #[inline(always)]
1566    pub fn bck(
1567        self,
1568    ) -> crate::common::RegisterField<
1569        16,
1570        0xf,
1571        1,
1572        0,
1573        sckdivcr::Bck,
1574        sckdivcr::Bck,
1575        Sckdivcr_SPEC,
1576        crate::common::RW,
1577    > {
1578        crate::common::RegisterField::<
1579            16,
1580            0xf,
1581            1,
1582            0,
1583            sckdivcr::Bck,
1584            sckdivcr::Bck,
1585            Sckdivcr_SPEC,
1586            crate::common::RW,
1587        >::from_register(self, 0)
1588    }
1589
1590    #[doc = "System Clock (ICLK) Select"]
1591    #[inline(always)]
1592    pub fn ick(
1593        self,
1594    ) -> crate::common::RegisterField<
1595        24,
1596        0xf,
1597        1,
1598        0,
1599        sckdivcr::Ick,
1600        sckdivcr::Ick,
1601        Sckdivcr_SPEC,
1602        crate::common::RW,
1603    > {
1604        crate::common::RegisterField::<
1605            24,
1606            0xf,
1607            1,
1608            0,
1609            sckdivcr::Ick,
1610            sckdivcr::Ick,
1611            Sckdivcr_SPEC,
1612            crate::common::RW,
1613        >::from_register(self, 0)
1614    }
1615
1616    #[doc = "FlashIF Clock (FCLK) Select"]
1617    #[inline(always)]
1618    pub fn fck(
1619        self,
1620    ) -> crate::common::RegisterField<
1621        28,
1622        0xf,
1623        1,
1624        0,
1625        sckdivcr::Fck,
1626        sckdivcr::Fck,
1627        Sckdivcr_SPEC,
1628        crate::common::RW,
1629    > {
1630        crate::common::RegisterField::<
1631            28,
1632            0xf,
1633            1,
1634            0,
1635            sckdivcr::Fck,
1636            sckdivcr::Fck,
1637            Sckdivcr_SPEC,
1638            crate::common::RW,
1639        >::from_register(self, 0)
1640    }
1641}
1642impl ::core::default::Default for Sckdivcr {
1643    #[inline(always)]
1644    fn default() -> Sckdivcr {
1645        <crate::RegValueT<Sckdivcr_SPEC> as RegisterValue<_>>::new(0)
1646    }
1647}
1648pub mod sckdivcr {
1649
1650    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1651    pub struct Pckd_SPEC;
1652    pub type Pckd = crate::EnumBitfieldStruct<u8, Pckd_SPEC>;
1653    impl Pckd {
1654        #[doc = "x 1/1"]
1655        pub const _0000: Self = Self::new(0);
1656
1657        #[doc = "x 1/2"]
1658        pub const _0001: Self = Self::new(1);
1659
1660        #[doc = "x 1/4"]
1661        pub const _0010: Self = Self::new(2);
1662
1663        #[doc = "x 1/8"]
1664        pub const _0011: Self = Self::new(3);
1665
1666        #[doc = "x 1/16"]
1667        pub const _0100: Self = Self::new(4);
1668
1669        #[doc = "x 1/32"]
1670        pub const _0101: Self = Self::new(5);
1671
1672        #[doc = "x 1/64"]
1673        pub const _0110: Self = Self::new(6);
1674
1675        #[doc = "x 1/3"]
1676        pub const _1000: Self = Self::new(8);
1677
1678        #[doc = "x 1/6"]
1679        pub const _1001: Self = Self::new(9);
1680
1681        #[doc = "x 1/12"]
1682        pub const _1010: Self = Self::new(10);
1683
1684        #[doc = "Setting prohibited."]
1685        pub const OTHERS: Self = Self::new(0);
1686    }
1687    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1688    pub struct Pckc_SPEC;
1689    pub type Pckc = crate::EnumBitfieldStruct<u8, Pckc_SPEC>;
1690    impl Pckc {
1691        #[doc = "x 1/1"]
1692        pub const _0000: Self = Self::new(0);
1693
1694        #[doc = "x 1/2"]
1695        pub const _0001: Self = Self::new(1);
1696
1697        #[doc = "x 1/4"]
1698        pub const _0010: Self = Self::new(2);
1699
1700        #[doc = "x 1/8"]
1701        pub const _0011: Self = Self::new(3);
1702
1703        #[doc = "x 1/16"]
1704        pub const _0100: Self = Self::new(4);
1705
1706        #[doc = "x 1/32"]
1707        pub const _0101: Self = Self::new(5);
1708
1709        #[doc = "x 1/64"]
1710        pub const _0110: Self = Self::new(6);
1711
1712        #[doc = "x 1/3"]
1713        pub const _1000: Self = Self::new(8);
1714
1715        #[doc = "x 1/6"]
1716        pub const _1001: Self = Self::new(9);
1717
1718        #[doc = "x 1/12"]
1719        pub const _1010: Self = Self::new(10);
1720
1721        #[doc = "Setting prohibited."]
1722        pub const OTHERS: Self = Self::new(0);
1723    }
1724    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1725    pub struct Pckb_SPEC;
1726    pub type Pckb = crate::EnumBitfieldStruct<u8, Pckb_SPEC>;
1727    impl Pckb {
1728        #[doc = "x 1/1"]
1729        pub const _0000: Self = Self::new(0);
1730
1731        #[doc = "x 1/2"]
1732        pub const _0001: Self = Self::new(1);
1733
1734        #[doc = "x 1/4"]
1735        pub const _0010: Self = Self::new(2);
1736
1737        #[doc = "x 1/8"]
1738        pub const _0011: Self = Self::new(3);
1739
1740        #[doc = "x 1/16"]
1741        pub const _0100: Self = Self::new(4);
1742
1743        #[doc = "x 1/32"]
1744        pub const _0101: Self = Self::new(5);
1745
1746        #[doc = "x 1/64"]
1747        pub const _0110: Self = Self::new(6);
1748
1749        #[doc = "x 1/3"]
1750        pub const _1000: Self = Self::new(8);
1751
1752        #[doc = "x 1/6"]
1753        pub const _1001: Self = Self::new(9);
1754
1755        #[doc = "x 1/12"]
1756        pub const _1010: Self = Self::new(10);
1757
1758        #[doc = "Setting prohibited."]
1759        pub const OTHERS: Self = Self::new(0);
1760    }
1761    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1762    pub struct Pcka_SPEC;
1763    pub type Pcka = crate::EnumBitfieldStruct<u8, Pcka_SPEC>;
1764    impl Pcka {
1765        #[doc = "x 1/1"]
1766        pub const _0000: Self = Self::new(0);
1767
1768        #[doc = "x 1/2"]
1769        pub const _0001: Self = Self::new(1);
1770
1771        #[doc = "x 1/4"]
1772        pub const _0010: Self = Self::new(2);
1773
1774        #[doc = "x 1/8"]
1775        pub const _0011: Self = Self::new(3);
1776
1777        #[doc = "x 1/16"]
1778        pub const _0100: Self = Self::new(4);
1779
1780        #[doc = "x 1/32"]
1781        pub const _0101: Self = Self::new(5);
1782
1783        #[doc = "x 1/64"]
1784        pub const _0110: Self = Self::new(6);
1785
1786        #[doc = "x 1/3"]
1787        pub const _1000: Self = Self::new(8);
1788
1789        #[doc = "x 1/6"]
1790        pub const _1001: Self = Self::new(9);
1791
1792        #[doc = "x 1/12"]
1793        pub const _1010: Self = Self::new(10);
1794
1795        #[doc = "Setting prohibited."]
1796        pub const OTHERS: Self = Self::new(0);
1797    }
1798    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1799    pub struct Bck_SPEC;
1800    pub type Bck = crate::EnumBitfieldStruct<u8, Bck_SPEC>;
1801    impl Bck {
1802        #[doc = "x 1/1"]
1803        pub const _0000: Self = Self::new(0);
1804
1805        #[doc = "x 1/2"]
1806        pub const _0001: Self = Self::new(1);
1807
1808        #[doc = "x 1/4"]
1809        pub const _0010: Self = Self::new(2);
1810
1811        #[doc = "x 1/8"]
1812        pub const _0011: Self = Self::new(3);
1813
1814        #[doc = "x 1/16"]
1815        pub const _0100: Self = Self::new(4);
1816
1817        #[doc = "x 1/32"]
1818        pub const _0101: Self = Self::new(5);
1819
1820        #[doc = "x 1/64"]
1821        pub const _0110: Self = Self::new(6);
1822
1823        #[doc = "x 1/3"]
1824        pub const _1000: Self = Self::new(8);
1825
1826        #[doc = "x 1/6"]
1827        pub const _1001: Self = Self::new(9);
1828
1829        #[doc = "x 1/12"]
1830        pub const _1010: Self = Self::new(10);
1831
1832        #[doc = "Settings prohibited"]
1833        pub const OTHERS: Self = Self::new(0);
1834    }
1835    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1836    pub struct Ick_SPEC;
1837    pub type Ick = crate::EnumBitfieldStruct<u8, Ick_SPEC>;
1838    impl Ick {
1839        #[doc = "x 1/1"]
1840        pub const _0000: Self = Self::new(0);
1841
1842        #[doc = "x 1/2"]
1843        pub const _0001: Self = Self::new(1);
1844
1845        #[doc = "x 1/4"]
1846        pub const _0010: Self = Self::new(2);
1847
1848        #[doc = "x 1/8"]
1849        pub const _0011: Self = Self::new(3);
1850
1851        #[doc = "x 1/16"]
1852        pub const _0100: Self = Self::new(4);
1853
1854        #[doc = "x 1/32"]
1855        pub const _0101: Self = Self::new(5);
1856
1857        #[doc = "x 1/64"]
1858        pub const _0110: Self = Self::new(6);
1859
1860        #[doc = "x 1/3"]
1861        pub const _1000: Self = Self::new(8);
1862
1863        #[doc = "x 1/6"]
1864        pub const _1001: Self = Self::new(9);
1865
1866        #[doc = "x 1/12"]
1867        pub const _1010: Self = Self::new(10);
1868
1869        #[doc = "Setting prohibited."]
1870        pub const OTHERS: Self = Self::new(0);
1871    }
1872    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1873    pub struct Fck_SPEC;
1874    pub type Fck = crate::EnumBitfieldStruct<u8, Fck_SPEC>;
1875    impl Fck {
1876        #[doc = "x 1/1"]
1877        pub const _0000: Self = Self::new(0);
1878
1879        #[doc = "x 1/2"]
1880        pub const _0001: Self = Self::new(1);
1881
1882        #[doc = "x 1/4"]
1883        pub const _0010: Self = Self::new(2);
1884
1885        #[doc = "x 1/8"]
1886        pub const _0011: Self = Self::new(3);
1887
1888        #[doc = "x 1/16"]
1889        pub const _0100: Self = Self::new(4);
1890
1891        #[doc = "x 1/32"]
1892        pub const _0101: Self = Self::new(5);
1893
1894        #[doc = "x 1/64"]
1895        pub const _0110: Self = Self::new(6);
1896
1897        #[doc = "x 1/3"]
1898        pub const _1000: Self = Self::new(8);
1899
1900        #[doc = "x 1/6"]
1901        pub const _1001: Self = Self::new(9);
1902
1903        #[doc = "x 1/12"]
1904        pub const _1010: Self = Self::new(10);
1905
1906        #[doc = "Setting prohibited."]
1907        pub const OTHERS: Self = Self::new(0);
1908    }
1909}
1910#[doc(hidden)]
1911#[derive(Copy, Clone, Eq, PartialEq)]
1912pub struct Sckdivcr2_SPEC;
1913impl crate::sealed::RegSpec for Sckdivcr2_SPEC {
1914    type DataType = u8;
1915}
1916
1917#[doc = "System Clock Division Control Register 2"]
1918pub type Sckdivcr2 = crate::RegValueT<Sckdivcr2_SPEC>;
1919
1920impl Sckdivcr2 {
1921    #[doc = "CPU Clock (CPUCLK) Select"]
1922    #[inline(always)]
1923    pub fn cpuck(
1924        self,
1925    ) -> crate::common::RegisterField<
1926        0,
1927        0xf,
1928        1,
1929        0,
1930        sckdivcr2::Cpuck,
1931        sckdivcr2::Cpuck,
1932        Sckdivcr2_SPEC,
1933        crate::common::RW,
1934    > {
1935        crate::common::RegisterField::<
1936            0,
1937            0xf,
1938            1,
1939            0,
1940            sckdivcr2::Cpuck,
1941            sckdivcr2::Cpuck,
1942            Sckdivcr2_SPEC,
1943            crate::common::RW,
1944        >::from_register(self, 0)
1945    }
1946}
1947impl ::core::default::Default for Sckdivcr2 {
1948    #[inline(always)]
1949    fn default() -> Sckdivcr2 {
1950        <crate::RegValueT<Sckdivcr2_SPEC> as RegisterValue<_>>::new(0)
1951    }
1952}
1953pub mod sckdivcr2 {
1954
1955    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1956    pub struct Cpuck_SPEC;
1957    pub type Cpuck = crate::EnumBitfieldStruct<u8, Cpuck_SPEC>;
1958    impl Cpuck {
1959        #[doc = "x 1/1"]
1960        pub const _0000: Self = Self::new(0);
1961
1962        #[doc = "x 1/2"]
1963        pub const _0001: Self = Self::new(1);
1964
1965        #[doc = "x 1/4"]
1966        pub const _0010: Self = Self::new(2);
1967
1968        #[doc = "x 1/8"]
1969        pub const _0011: Self = Self::new(3);
1970
1971        #[doc = "x 1/16"]
1972        pub const _0100: Self = Self::new(4);
1973
1974        #[doc = "x 1/32"]
1975        pub const _0101: Self = Self::new(5);
1976
1977        #[doc = "x 1/64"]
1978        pub const _0110: Self = Self::new(6);
1979
1980        #[doc = "x 1/3"]
1981        pub const _1000: Self = Self::new(8);
1982
1983        #[doc = "x 1/6"]
1984        pub const _1001: Self = Self::new(9);
1985
1986        #[doc = "x 1/12"]
1987        pub const _1010: Self = Self::new(10);
1988
1989        #[doc = "Setting prohibited."]
1990        pub const OTHERS: Self = Self::new(0);
1991    }
1992}
1993#[doc(hidden)]
1994#[derive(Copy, Clone, Eq, PartialEq)]
1995pub struct Sckscr_SPEC;
1996impl crate::sealed::RegSpec for Sckscr_SPEC {
1997    type DataType = u8;
1998}
1999
2000#[doc = "System Clock Source Control Register"]
2001pub type Sckscr = crate::RegValueT<Sckscr_SPEC>;
2002
2003impl Sckscr {
2004    #[doc = "Clock Source Select"]
2005    #[inline(always)]
2006    pub fn cksel(
2007        self,
2008    ) -> crate::common::RegisterField<
2009        0,
2010        0x7,
2011        1,
2012        0,
2013        sckscr::Cksel,
2014        sckscr::Cksel,
2015        Sckscr_SPEC,
2016        crate::common::RW,
2017    > {
2018        crate::common::RegisterField::<
2019            0,
2020            0x7,
2021            1,
2022            0,
2023            sckscr::Cksel,
2024            sckscr::Cksel,
2025            Sckscr_SPEC,
2026            crate::common::RW,
2027        >::from_register(self, 0)
2028    }
2029}
2030impl ::core::default::Default for Sckscr {
2031    #[inline(always)]
2032    fn default() -> Sckscr {
2033        <crate::RegValueT<Sckscr_SPEC> as RegisterValue<_>>::new(1)
2034    }
2035}
2036pub mod sckscr {
2037
2038    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2039    pub struct Cksel_SPEC;
2040    pub type Cksel = crate::EnumBitfieldStruct<u8, Cksel_SPEC>;
2041    impl Cksel {
2042        #[doc = "HOCO"]
2043        pub const _000: Self = Self::new(0);
2044
2045        #[doc = "MOCO (Value after reset)"]
2046        pub const _001: Self = Self::new(1);
2047
2048        #[doc = "Setting prohibited"]
2049        pub const _010: Self = Self::new(2);
2050
2051        #[doc = "Main clock oscillator (MOSC)"]
2052        pub const _011: Self = Self::new(3);
2053
2054        #[doc = "Sub-clock oscillator (SOSC)"]
2055        pub const _100: Self = Self::new(4);
2056
2057        #[doc = "PLL1 output clock P (PLL1P)"]
2058        pub const _101: Self = Self::new(5);
2059
2060        #[doc = "Setting prohibited"]
2061        pub const _110: Self = Self::new(6);
2062
2063        #[doc = "Setting prohibited"]
2064        pub const _111: Self = Self::new(7);
2065    }
2066}
2067#[doc(hidden)]
2068#[derive(Copy, Clone, Eq, PartialEq)]
2069pub struct Pllccr_SPEC;
2070impl crate::sealed::RegSpec for Pllccr_SPEC {
2071    type DataType = u16;
2072}
2073
2074#[doc = "PLL Clock Control Register"]
2075pub type Pllccr = crate::RegValueT<Pllccr_SPEC>;
2076
2077impl Pllccr {
2078    #[doc = "PLL1 Input Frequency Division Ratio Select"]
2079    #[inline(always)]
2080    pub fn plidiv(
2081        self,
2082    ) -> crate::common::RegisterField<
2083        0,
2084        0x3,
2085        1,
2086        0,
2087        pllccr::Plidiv,
2088        pllccr::Plidiv,
2089        Pllccr_SPEC,
2090        crate::common::RW,
2091    > {
2092        crate::common::RegisterField::<
2093            0,
2094            0x3,
2095            1,
2096            0,
2097            pllccr::Plidiv,
2098            pllccr::Plidiv,
2099            Pllccr_SPEC,
2100            crate::common::RW,
2101        >::from_register(self, 0)
2102    }
2103
2104    #[doc = "PLL1 Clock Source Select"]
2105    #[inline(always)]
2106    pub fn plsrcsel(
2107        self,
2108    ) -> crate::common::RegisterField<
2109        4,
2110        0x1,
2111        1,
2112        0,
2113        pllccr::Plsrcsel,
2114        pllccr::Plsrcsel,
2115        Pllccr_SPEC,
2116        crate::common::RW,
2117    > {
2118        crate::common::RegisterField::<
2119            4,
2120            0x1,
2121            1,
2122            0,
2123            pllccr::Plsrcsel,
2124            pllccr::Plsrcsel,
2125            Pllccr_SPEC,
2126            crate::common::RW,
2127        >::from_register(self, 0)
2128    }
2129
2130    #[doc = "PLL1 Frequency Multiplication Fractional Factor Select"]
2131    #[inline(always)]
2132    pub fn pllmulnf(
2133        self,
2134    ) -> crate::common::RegisterField<
2135        6,
2136        0x3,
2137        1,
2138        0,
2139        pllccr::Pllmulnf,
2140        pllccr::Pllmulnf,
2141        Pllccr_SPEC,
2142        crate::common::RW,
2143    > {
2144        crate::common::RegisterField::<
2145            6,
2146            0x3,
2147            1,
2148            0,
2149            pllccr::Pllmulnf,
2150            pllccr::Pllmulnf,
2151            Pllccr_SPEC,
2152            crate::common::RW,
2153        >::from_register(self, 0)
2154    }
2155
2156    #[doc = "PLL1 Frequency Multiplication Factor Select"]
2157    #[inline(always)]
2158    pub fn pllmul(
2159        self,
2160    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Pllccr_SPEC, crate::common::RW> {
2161        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Pllccr_SPEC,crate::common::RW>::from_register(self,0)
2162    }
2163}
2164impl ::core::default::Default for Pllccr {
2165    #[inline(always)]
2166    fn default() -> Pllccr {
2167        <crate::RegValueT<Pllccr_SPEC> as RegisterValue<_>>::new(6400)
2168    }
2169}
2170pub mod pllccr {
2171
2172    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2173    pub struct Plidiv_SPEC;
2174    pub type Plidiv = crate::EnumBitfieldStruct<u8, Plidiv_SPEC>;
2175    impl Plidiv {
2176        #[doc = "1/1"]
2177        pub const _00: Self = Self::new(0);
2178
2179        #[doc = "1/2"]
2180        pub const _01: Self = Self::new(1);
2181
2182        #[doc = "1/3"]
2183        pub const _10: Self = Self::new(2);
2184
2185        #[doc = "1/4"]
2186        pub const _11: Self = Self::new(3);
2187    }
2188    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2189    pub struct Plsrcsel_SPEC;
2190    pub type Plsrcsel = crate::EnumBitfieldStruct<u8, Plsrcsel_SPEC>;
2191    impl Plsrcsel {
2192        #[doc = "Main clock oscillator"]
2193        pub const _0: Self = Self::new(0);
2194
2195        #[doc = "HOCO"]
2196        pub const _1: Self = Self::new(1);
2197    }
2198    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2199    pub struct Pllmulnf_SPEC;
2200    pub type Pllmulnf = crate::EnumBitfieldStruct<u8, Pllmulnf_SPEC>;
2201    impl Pllmulnf {
2202        #[doc = "0.00 (Value after reset)"]
2203        pub const _00: Self = Self::new(0);
2204
2205        #[doc = "0.33 (1/3)"]
2206        pub const _01: Self = Self::new(1);
2207
2208        #[doc = "0.66 (2/3)"]
2209        pub const _10: Self = Self::new(2);
2210
2211        #[doc = "0.50 (1/2)"]
2212        pub const _11: Self = Self::new(3);
2213    }
2214}
2215#[doc(hidden)]
2216#[derive(Copy, Clone, Eq, PartialEq)]
2217pub struct Pllcr_SPEC;
2218impl crate::sealed::RegSpec for Pllcr_SPEC {
2219    type DataType = u8;
2220}
2221
2222#[doc = "PLL Control Register"]
2223pub type Pllcr = crate::RegValueT<Pllcr_SPEC>;
2224
2225impl Pllcr {
2226    #[doc = "PLL1 Stop Control"]
2227    #[inline(always)]
2228    pub fn pllstp(
2229        self,
2230    ) -> crate::common::RegisterField<
2231        0,
2232        0x1,
2233        1,
2234        0,
2235        pllcr::Pllstp,
2236        pllcr::Pllstp,
2237        Pllcr_SPEC,
2238        crate::common::RW,
2239    > {
2240        crate::common::RegisterField::<
2241            0,
2242            0x1,
2243            1,
2244            0,
2245            pllcr::Pllstp,
2246            pllcr::Pllstp,
2247            Pllcr_SPEC,
2248            crate::common::RW,
2249        >::from_register(self, 0)
2250    }
2251}
2252impl ::core::default::Default for Pllcr {
2253    #[inline(always)]
2254    fn default() -> Pllcr {
2255        <crate::RegValueT<Pllcr_SPEC> as RegisterValue<_>>::new(1)
2256    }
2257}
2258pub mod pllcr {
2259
2260    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2261    pub struct Pllstp_SPEC;
2262    pub type Pllstp = crate::EnumBitfieldStruct<u8, Pllstp_SPEC>;
2263    impl Pllstp {
2264        #[doc = "PLL1 is operating"]
2265        pub const _0: Self = Self::new(0);
2266
2267        #[doc = "PLL1 is stopped"]
2268        pub const _1: Self = Self::new(1);
2269    }
2270}
2271#[doc(hidden)]
2272#[derive(Copy, Clone, Eq, PartialEq)]
2273pub struct Bckcr_SPEC;
2274impl crate::sealed::RegSpec for Bckcr_SPEC {
2275    type DataType = u8;
2276}
2277
2278#[doc = "External Bus Clock Control Register"]
2279pub type Bckcr = crate::RegValueT<Bckcr_SPEC>;
2280
2281impl Bckcr {
2282    #[doc = "BCLK Pin Output Select"]
2283    #[inline(always)]
2284    pub fn bclkdiv(
2285        self,
2286    ) -> crate::common::RegisterField<
2287        0,
2288        0x1,
2289        1,
2290        0,
2291        bckcr::Bclkdiv,
2292        bckcr::Bclkdiv,
2293        Bckcr_SPEC,
2294        crate::common::RW,
2295    > {
2296        crate::common::RegisterField::<
2297            0,
2298            0x1,
2299            1,
2300            0,
2301            bckcr::Bclkdiv,
2302            bckcr::Bclkdiv,
2303            Bckcr_SPEC,
2304            crate::common::RW,
2305        >::from_register(self, 0)
2306    }
2307}
2308impl ::core::default::Default for Bckcr {
2309    #[inline(always)]
2310    fn default() -> Bckcr {
2311        <crate::RegValueT<Bckcr_SPEC> as RegisterValue<_>>::new(0)
2312    }
2313}
2314pub mod bckcr {
2315
2316    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2317    pub struct Bclkdiv_SPEC;
2318    pub type Bclkdiv = crate::EnumBitfieldStruct<u8, Bclkdiv_SPEC>;
2319    impl Bclkdiv {
2320        #[doc = "BCLK"]
2321        pub const _0: Self = Self::new(0);
2322
2323        #[doc = "BCLK/2"]
2324        pub const _1: Self = Self::new(1);
2325    }
2326}
2327#[doc(hidden)]
2328#[derive(Copy, Clone, Eq, PartialEq)]
2329pub struct Mosccr_SPEC;
2330impl crate::sealed::RegSpec for Mosccr_SPEC {
2331    type DataType = u8;
2332}
2333
2334#[doc = "Main Clock Oscillator Control Register"]
2335pub type Mosccr = crate::RegValueT<Mosccr_SPEC>;
2336
2337impl Mosccr {
2338    #[doc = "Main Clock Oscillator Stop"]
2339    #[inline(always)]
2340    pub fn mostp(
2341        self,
2342    ) -> crate::common::RegisterField<
2343        0,
2344        0x1,
2345        1,
2346        0,
2347        mosccr::Mostp,
2348        mosccr::Mostp,
2349        Mosccr_SPEC,
2350        crate::common::RW,
2351    > {
2352        crate::common::RegisterField::<
2353            0,
2354            0x1,
2355            1,
2356            0,
2357            mosccr::Mostp,
2358            mosccr::Mostp,
2359            Mosccr_SPEC,
2360            crate::common::RW,
2361        >::from_register(self, 0)
2362    }
2363}
2364impl ::core::default::Default for Mosccr {
2365    #[inline(always)]
2366    fn default() -> Mosccr {
2367        <crate::RegValueT<Mosccr_SPEC> as RegisterValue<_>>::new(1)
2368    }
2369}
2370pub mod mosccr {
2371
2372    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2373    pub struct Mostp_SPEC;
2374    pub type Mostp = crate::EnumBitfieldStruct<u8, Mostp_SPEC>;
2375    impl Mostp {
2376        #[doc = "Operate the main clock oscillator"]
2377        pub const _0: Self = Self::new(0);
2378
2379        #[doc = "Stop the main clock oscillator"]
2380        pub const _1: Self = Self::new(1);
2381    }
2382}
2383#[doc(hidden)]
2384#[derive(Copy, Clone, Eq, PartialEq)]
2385pub struct Hococr_SPEC;
2386impl crate::sealed::RegSpec for Hococr_SPEC {
2387    type DataType = u8;
2388}
2389
2390#[doc = "High-Speed On-Chip Oscillator Control Register"]
2391pub type Hococr = crate::RegValueT<Hococr_SPEC>;
2392
2393impl Hococr {
2394    #[doc = "HOCO Stop"]
2395    #[inline(always)]
2396    pub fn hcstp(
2397        self,
2398    ) -> crate::common::RegisterField<
2399        0,
2400        0x1,
2401        1,
2402        0,
2403        hococr::Hcstp,
2404        hococr::Hcstp,
2405        Hococr_SPEC,
2406        crate::common::RW,
2407    > {
2408        crate::common::RegisterField::<
2409            0,
2410            0x1,
2411            1,
2412            0,
2413            hococr::Hcstp,
2414            hococr::Hcstp,
2415            Hococr_SPEC,
2416            crate::common::RW,
2417        >::from_register(self, 0)
2418    }
2419}
2420impl ::core::default::Default for Hococr {
2421    #[inline(always)]
2422    fn default() -> Hococr {
2423        <crate::RegValueT<Hococr_SPEC> as RegisterValue<_>>::new(0)
2424    }
2425}
2426pub mod hococr {
2427
2428    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2429    pub struct Hcstp_SPEC;
2430    pub type Hcstp = crate::EnumBitfieldStruct<u8, Hcstp_SPEC>;
2431    impl Hcstp {
2432        #[doc = "Operate the HOCO clock"]
2433        pub const _0: Self = Self::new(0);
2434
2435        #[doc = "Stop the HOCO clock"]
2436        pub const _1: Self = Self::new(1);
2437    }
2438}
2439#[doc(hidden)]
2440#[derive(Copy, Clone, Eq, PartialEq)]
2441pub struct Hococr2_SPEC;
2442impl crate::sealed::RegSpec for Hococr2_SPEC {
2443    type DataType = u8;
2444}
2445
2446#[doc = "High-Speed On-Chip Oscillator Control Register2"]
2447pub type Hococr2 = crate::RegValueT<Hococr2_SPEC>;
2448
2449impl Hococr2 {
2450    #[doc = "HOCO Frequency Setting 0"]
2451    #[inline(always)]
2452    pub fn hcfrq0(
2453        self,
2454    ) -> crate::common::RegisterField<
2455        0,
2456        0x7,
2457        1,
2458        0,
2459        hococr2::Hcfrq0,
2460        hococr2::Hcfrq0,
2461        Hococr2_SPEC,
2462        crate::common::RW,
2463    > {
2464        crate::common::RegisterField::<
2465            0,
2466            0x7,
2467            1,
2468            0,
2469            hococr2::Hcfrq0,
2470            hococr2::Hcfrq0,
2471            Hococr2_SPEC,
2472            crate::common::RW,
2473        >::from_register(self, 0)
2474    }
2475}
2476impl ::core::default::Default for Hococr2 {
2477    #[inline(always)]
2478    fn default() -> Hococr2 {
2479        <crate::RegValueT<Hococr2_SPEC> as RegisterValue<_>>::new(0)
2480    }
2481}
2482pub mod hococr2 {
2483
2484    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2485    pub struct Hcfrq0_SPEC;
2486    pub type Hcfrq0 = crate::EnumBitfieldStruct<u8, Hcfrq0_SPEC>;
2487    impl Hcfrq0 {
2488        #[doc = "16MHz"]
2489        pub const _000: Self = Self::new(0);
2490
2491        #[doc = "18MHz"]
2492        pub const _001: Self = Self::new(1);
2493
2494        #[doc = "20MHz"]
2495        pub const _010: Self = Self::new(2);
2496
2497        #[doc = "32MHz"]
2498        pub const _100: Self = Self::new(4);
2499
2500        #[doc = "48MHz"]
2501        pub const _111: Self = Self::new(7);
2502    }
2503}
2504#[doc(hidden)]
2505#[derive(Copy, Clone, Eq, PartialEq)]
2506pub struct Mococr_SPEC;
2507impl crate::sealed::RegSpec for Mococr_SPEC {
2508    type DataType = u8;
2509}
2510
2511#[doc = "Middle-Speed On-Chip Oscillator Control Register"]
2512pub type Mococr = crate::RegValueT<Mococr_SPEC>;
2513
2514impl Mococr {
2515    #[doc = "MOCO Stop"]
2516    #[inline(always)]
2517    pub fn mcstp(
2518        self,
2519    ) -> crate::common::RegisterField<
2520        0,
2521        0x1,
2522        1,
2523        0,
2524        mococr::Mcstp,
2525        mococr::Mcstp,
2526        Mococr_SPEC,
2527        crate::common::RW,
2528    > {
2529        crate::common::RegisterField::<
2530            0,
2531            0x1,
2532            1,
2533            0,
2534            mococr::Mcstp,
2535            mococr::Mcstp,
2536            Mococr_SPEC,
2537            crate::common::RW,
2538        >::from_register(self, 0)
2539    }
2540}
2541impl ::core::default::Default for Mococr {
2542    #[inline(always)]
2543    fn default() -> Mococr {
2544        <crate::RegValueT<Mococr_SPEC> as RegisterValue<_>>::new(0)
2545    }
2546}
2547pub mod mococr {
2548
2549    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2550    pub struct Mcstp_SPEC;
2551    pub type Mcstp = crate::EnumBitfieldStruct<u8, Mcstp_SPEC>;
2552    impl Mcstp {
2553        #[doc = "MOCO clock is operating"]
2554        pub const _0: Self = Self::new(0);
2555
2556        #[doc = "MOCO clock is stopped"]
2557        pub const _1: Self = Self::new(1);
2558    }
2559}
2560#[doc(hidden)]
2561#[derive(Copy, Clone, Eq, PartialEq)]
2562pub struct Fllcr1_SPEC;
2563impl crate::sealed::RegSpec for Fllcr1_SPEC {
2564    type DataType = u8;
2565}
2566
2567#[doc = "FLL Control Register1"]
2568pub type Fllcr1 = crate::RegValueT<Fllcr1_SPEC>;
2569
2570impl Fllcr1 {
2571    #[doc = "FLL Enable"]
2572    #[inline(always)]
2573    pub fn fllen(
2574        self,
2575    ) -> crate::common::RegisterField<
2576        0,
2577        0x1,
2578        1,
2579        0,
2580        fllcr1::Fllen,
2581        fllcr1::Fllen,
2582        Fllcr1_SPEC,
2583        crate::common::RW,
2584    > {
2585        crate::common::RegisterField::<
2586            0,
2587            0x1,
2588            1,
2589            0,
2590            fllcr1::Fllen,
2591            fllcr1::Fllen,
2592            Fllcr1_SPEC,
2593            crate::common::RW,
2594        >::from_register(self, 0)
2595    }
2596}
2597impl ::core::default::Default for Fllcr1 {
2598    #[inline(always)]
2599    fn default() -> Fllcr1 {
2600        <crate::RegValueT<Fllcr1_SPEC> as RegisterValue<_>>::new(0)
2601    }
2602}
2603pub mod fllcr1 {
2604
2605    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2606    pub struct Fllen_SPEC;
2607    pub type Fllen = crate::EnumBitfieldStruct<u8, Fllen_SPEC>;
2608    impl Fllen {
2609        #[doc = "FLL function is disabled"]
2610        pub const _0: Self = Self::new(0);
2611
2612        #[doc = "FLL function is enabled."]
2613        pub const _1: Self = Self::new(1);
2614    }
2615}
2616#[doc(hidden)]
2617#[derive(Copy, Clone, Eq, PartialEq)]
2618pub struct Fllcr2_SPEC;
2619impl crate::sealed::RegSpec for Fllcr2_SPEC {
2620    type DataType = u16;
2621}
2622
2623#[doc = "FLL Control Register2"]
2624pub type Fllcr2 = crate::RegValueT<Fllcr2_SPEC>;
2625
2626impl Fllcr2 {
2627    #[doc = "FLL Multiplication Control"]
2628    #[inline(always)]
2629    pub fn fllcntl(
2630        self,
2631    ) -> crate::common::RegisterField<0, 0x7ff, 1, 0, u16, u16, Fllcr2_SPEC, crate::common::RW>
2632    {
2633        crate::common::RegisterField::<0,0x7ff,1,0,u16,u16,Fllcr2_SPEC,crate::common::RW>::from_register(self,0)
2634    }
2635}
2636impl ::core::default::Default for Fllcr2 {
2637    #[inline(always)]
2638    fn default() -> Fllcr2 {
2639        <crate::RegValueT<Fllcr2_SPEC> as RegisterValue<_>>::new(0)
2640    }
2641}
2642
2643#[doc(hidden)]
2644#[derive(Copy, Clone, Eq, PartialEq)]
2645pub struct Oscsf_SPEC;
2646impl crate::sealed::RegSpec for Oscsf_SPEC {
2647    type DataType = u8;
2648}
2649
2650#[doc = "Oscillation Stabilization Flag Register"]
2651pub type Oscsf = crate::RegValueT<Oscsf_SPEC>;
2652
2653impl Oscsf {
2654    #[doc = "HOCO Clock Oscillation Stabilization Flag"]
2655    #[inline(always)]
2656    pub fn hocosf(
2657        self,
2658    ) -> crate::common::RegisterField<
2659        0,
2660        0x1,
2661        1,
2662        0,
2663        oscsf::Hocosf,
2664        oscsf::Hocosf,
2665        Oscsf_SPEC,
2666        crate::common::R,
2667    > {
2668        crate::common::RegisterField::<
2669            0,
2670            0x1,
2671            1,
2672            0,
2673            oscsf::Hocosf,
2674            oscsf::Hocosf,
2675            Oscsf_SPEC,
2676            crate::common::R,
2677        >::from_register(self, 0)
2678    }
2679
2680    #[doc = "Main Clock Oscillation Stabilization Flag"]
2681    #[inline(always)]
2682    pub fn moscsf(
2683        self,
2684    ) -> crate::common::RegisterField<
2685        3,
2686        0x1,
2687        1,
2688        0,
2689        oscsf::Moscsf,
2690        oscsf::Moscsf,
2691        Oscsf_SPEC,
2692        crate::common::R,
2693    > {
2694        crate::common::RegisterField::<
2695            3,
2696            0x1,
2697            1,
2698            0,
2699            oscsf::Moscsf,
2700            oscsf::Moscsf,
2701            Oscsf_SPEC,
2702            crate::common::R,
2703        >::from_register(self, 0)
2704    }
2705
2706    #[doc = "PLL1 Clock Oscillation Stabilization Flag"]
2707    #[inline(always)]
2708    pub fn pllsf(
2709        self,
2710    ) -> crate::common::RegisterField<
2711        5,
2712        0x1,
2713        1,
2714        0,
2715        oscsf::Pllsf,
2716        oscsf::Pllsf,
2717        Oscsf_SPEC,
2718        crate::common::R,
2719    > {
2720        crate::common::RegisterField::<
2721            5,
2722            0x1,
2723            1,
2724            0,
2725            oscsf::Pllsf,
2726            oscsf::Pllsf,
2727            Oscsf_SPEC,
2728            crate::common::R,
2729        >::from_register(self, 0)
2730    }
2731
2732    #[doc = "PLL2 Clock Oscillation Stabilization Flag"]
2733    #[inline(always)]
2734    pub fn pll2sf(
2735        self,
2736    ) -> crate::common::RegisterField<
2737        6,
2738        0x1,
2739        1,
2740        0,
2741        oscsf::Pll2Sf,
2742        oscsf::Pll2Sf,
2743        Oscsf_SPEC,
2744        crate::common::R,
2745    > {
2746        crate::common::RegisterField::<
2747            6,
2748            0x1,
2749            1,
2750            0,
2751            oscsf::Pll2Sf,
2752            oscsf::Pll2Sf,
2753            Oscsf_SPEC,
2754            crate::common::R,
2755        >::from_register(self, 0)
2756    }
2757}
2758impl ::core::default::Default for Oscsf {
2759    #[inline(always)]
2760    fn default() -> Oscsf {
2761        <crate::RegValueT<Oscsf_SPEC> as RegisterValue<_>>::new(0)
2762    }
2763}
2764pub mod oscsf {
2765
2766    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2767    pub struct Hocosf_SPEC;
2768    pub type Hocosf = crate::EnumBitfieldStruct<u8, Hocosf_SPEC>;
2769    impl Hocosf {
2770        #[doc = "The HOCO clock is stopped or is not yet stable"]
2771        pub const _0: Self = Self::new(0);
2772
2773        #[doc = "The HOCO clock is stable, so is available for use as the system clock source"]
2774        pub const _1: Self = Self::new(1);
2775    }
2776    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2777    pub struct Moscsf_SPEC;
2778    pub type Moscsf = crate::EnumBitfieldStruct<u8, Moscsf_SPEC>;
2779    impl Moscsf {
2780        #[doc = "The main clock oscillator is stopped or is not yet stable"]
2781        pub const _0: Self = Self::new(0);
2782
2783        #[doc = "The main clock oscillator is stable, so is available for use as the system clock source"]
2784        pub const _1: Self = Self::new(1);
2785    }
2786    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2787    pub struct Pllsf_SPEC;
2788    pub type Pllsf = crate::EnumBitfieldStruct<u8, Pllsf_SPEC>;
2789    impl Pllsf {
2790        #[doc = "The PLL1 clock is stopped or is not yet stable."]
2791        pub const _0: Self = Self::new(0);
2792
2793        #[doc = "The PLL1 clock is stable, so is available for use as the system clock source"]
2794        pub const _1: Self = Self::new(1);
2795    }
2796    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2797    pub struct Pll2Sf_SPEC;
2798    pub type Pll2Sf = crate::EnumBitfieldStruct<u8, Pll2Sf_SPEC>;
2799    impl Pll2Sf {
2800        #[doc = "The PLL2 clock is stopped or is not yet stable."]
2801        pub const _0: Self = Self::new(0);
2802
2803        #[doc = "The PLL2 clock is stable"]
2804        pub const _1: Self = Self::new(1);
2805    }
2806}
2807#[doc(hidden)]
2808#[derive(Copy, Clone, Eq, PartialEq)]
2809pub struct Ckocr_SPEC;
2810impl crate::sealed::RegSpec for Ckocr_SPEC {
2811    type DataType = u8;
2812}
2813
2814#[doc = "Clock Out Control Register"]
2815pub type Ckocr = crate::RegValueT<Ckocr_SPEC>;
2816
2817impl Ckocr {
2818    #[doc = "Clock Out Source Select"]
2819    #[inline(always)]
2820    pub fn ckosel(
2821        self,
2822    ) -> crate::common::RegisterField<
2823        0,
2824        0x7,
2825        1,
2826        0,
2827        ckocr::Ckosel,
2828        ckocr::Ckosel,
2829        Ckocr_SPEC,
2830        crate::common::RW,
2831    > {
2832        crate::common::RegisterField::<
2833            0,
2834            0x7,
2835            1,
2836            0,
2837            ckocr::Ckosel,
2838            ckocr::Ckosel,
2839            Ckocr_SPEC,
2840            crate::common::RW,
2841        >::from_register(self, 0)
2842    }
2843
2844    #[doc = "Clock Output Frequency Division Ratio"]
2845    #[inline(always)]
2846    pub fn ckodiv(
2847        self,
2848    ) -> crate::common::RegisterField<
2849        4,
2850        0x7,
2851        1,
2852        0,
2853        ckocr::Ckodiv,
2854        ckocr::Ckodiv,
2855        Ckocr_SPEC,
2856        crate::common::RW,
2857    > {
2858        crate::common::RegisterField::<
2859            4,
2860            0x7,
2861            1,
2862            0,
2863            ckocr::Ckodiv,
2864            ckocr::Ckodiv,
2865            Ckocr_SPEC,
2866            crate::common::RW,
2867        >::from_register(self, 0)
2868    }
2869
2870    #[doc = "Clock Out Enable"]
2871    #[inline(always)]
2872    pub fn ckoen(
2873        self,
2874    ) -> crate::common::RegisterField<
2875        7,
2876        0x1,
2877        1,
2878        0,
2879        ckocr::Ckoen,
2880        ckocr::Ckoen,
2881        Ckocr_SPEC,
2882        crate::common::RW,
2883    > {
2884        crate::common::RegisterField::<
2885            7,
2886            0x1,
2887            1,
2888            0,
2889            ckocr::Ckoen,
2890            ckocr::Ckoen,
2891            Ckocr_SPEC,
2892            crate::common::RW,
2893        >::from_register(self, 0)
2894    }
2895}
2896impl ::core::default::Default for Ckocr {
2897    #[inline(always)]
2898    fn default() -> Ckocr {
2899        <crate::RegValueT<Ckocr_SPEC> as RegisterValue<_>>::new(1)
2900    }
2901}
2902pub mod ckocr {
2903
2904    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2905    pub struct Ckosel_SPEC;
2906    pub type Ckosel = crate::EnumBitfieldStruct<u8, Ckosel_SPEC>;
2907    impl Ckosel {
2908        #[doc = "HOCO"]
2909        pub const _000: Self = Self::new(0);
2910
2911        #[doc = "MOCO (Value after reset)"]
2912        pub const _001: Self = Self::new(1);
2913
2914        #[doc = "LOCO"]
2915        pub const _010: Self = Self::new(2);
2916
2917        #[doc = "MOSC"]
2918        pub const _011: Self = Self::new(3);
2919
2920        #[doc = "SOSC"]
2921        pub const _100: Self = Self::new(4);
2922
2923        #[doc = "Setting prohibited"]
2924        pub const OTHERS: Self = Self::new(0);
2925    }
2926    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2927    pub struct Ckodiv_SPEC;
2928    pub type Ckodiv = crate::EnumBitfieldStruct<u8, Ckodiv_SPEC>;
2929    impl Ckodiv {
2930        #[doc = "x 1/1"]
2931        pub const _000: Self = Self::new(0);
2932
2933        #[doc = "x 1/2"]
2934        pub const _001: Self = Self::new(1);
2935
2936        #[doc = "x 1/4"]
2937        pub const _010: Self = Self::new(2);
2938
2939        #[doc = "x 1/8"]
2940        pub const _011: Self = Self::new(3);
2941
2942        #[doc = "x 1/16"]
2943        pub const _100: Self = Self::new(4);
2944
2945        #[doc = "x 1/32"]
2946        pub const _101: Self = Self::new(5);
2947
2948        #[doc = "x 1/64"]
2949        pub const _110: Self = Self::new(6);
2950
2951        #[doc = "x 1/128"]
2952        pub const _111: Self = Self::new(7);
2953    }
2954    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2955    pub struct Ckoen_SPEC;
2956    pub type Ckoen = crate::EnumBitfieldStruct<u8, Ckoen_SPEC>;
2957    impl Ckoen {
2958        #[doc = "Disable clock out"]
2959        pub const _0: Self = Self::new(0);
2960
2961        #[doc = "Enable clock out"]
2962        pub const _1: Self = Self::new(1);
2963    }
2964}
2965#[doc(hidden)]
2966#[derive(Copy, Clone, Eq, PartialEq)]
2967pub struct Trckcr_SPEC;
2968impl crate::sealed::RegSpec for Trckcr_SPEC {
2969    type DataType = u8;
2970}
2971
2972#[doc = "Trace Clock Control Register"]
2973pub type Trckcr = crate::RegValueT<Trckcr_SPEC>;
2974
2975impl Trckcr {
2976    #[doc = "Trace Clock operating frequency select"]
2977    #[inline(always)]
2978    pub fn trck(
2979        self,
2980    ) -> crate::common::RegisterField<
2981        0,
2982        0xf,
2983        1,
2984        0,
2985        trckcr::Trck,
2986        trckcr::Trck,
2987        Trckcr_SPEC,
2988        crate::common::RW,
2989    > {
2990        crate::common::RegisterField::<
2991            0,
2992            0xf,
2993            1,
2994            0,
2995            trckcr::Trck,
2996            trckcr::Trck,
2997            Trckcr_SPEC,
2998            crate::common::RW,
2999        >::from_register(self, 0)
3000    }
3001
3002    #[doc = "Trace Clock source select"]
3003    #[inline(always)]
3004    pub fn trcksel(
3005        self,
3006    ) -> crate::common::RegisterField<
3007        4,
3008        0x1,
3009        1,
3010        0,
3011        trckcr::Trcksel,
3012        trckcr::Trcksel,
3013        Trckcr_SPEC,
3014        crate::common::RW,
3015    > {
3016        crate::common::RegisterField::<
3017            4,
3018            0x1,
3019            1,
3020            0,
3021            trckcr::Trcksel,
3022            trckcr::Trcksel,
3023            Trckcr_SPEC,
3024            crate::common::RW,
3025        >::from_register(self, 0)
3026    }
3027
3028    #[doc = "Trace Clock operating Enable"]
3029    #[inline(always)]
3030    pub fn trcken(
3031        self,
3032    ) -> crate::common::RegisterField<
3033        7,
3034        0x1,
3035        1,
3036        0,
3037        trckcr::Trcken,
3038        trckcr::Trcken,
3039        Trckcr_SPEC,
3040        crate::common::RW,
3041    > {
3042        crate::common::RegisterField::<
3043            7,
3044            0x1,
3045            1,
3046            0,
3047            trckcr::Trcken,
3048            trckcr::Trcken,
3049            Trckcr_SPEC,
3050            crate::common::RW,
3051        >::from_register(self, 0)
3052    }
3053}
3054impl ::core::default::Default for Trckcr {
3055    #[inline(always)]
3056    fn default() -> Trckcr {
3057        <crate::RegValueT<Trckcr_SPEC> as RegisterValue<_>>::new(2)
3058    }
3059}
3060pub mod trckcr {
3061
3062    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3063    pub struct Trck_SPEC;
3064    pub type Trck = crate::EnumBitfieldStruct<u8, Trck_SPEC>;
3065    impl Trck {
3066        #[doc = "1/1"]
3067        pub const _0000: Self = Self::new(0);
3068
3069        #[doc = "1/2"]
3070        pub const _0001: Self = Self::new(1);
3071
3072        #[doc = "1/4 (Value after reset)"]
3073        pub const _0010: Self = Self::new(2);
3074
3075        #[doc = "1/8"]
3076        pub const _0011: Self = Self::new(3);
3077
3078        #[doc = "1/16"]
3079        pub const _0100: Self = Self::new(4);
3080
3081        #[doc = "1/32"]
3082        pub const _0101: Self = Self::new(5);
3083
3084        #[doc = "1/64"]
3085        pub const _0110: Self = Self::new(6);
3086
3087        #[doc = "1/128"]
3088        pub const _0111: Self = Self::new(7);
3089
3090        #[doc = "1/256"]
3091        pub const _1000: Self = Self::new(8);
3092
3093        #[doc = "1/3"]
3094        pub const _1001: Self = Self::new(9);
3095
3096        #[doc = "1/6"]
3097        pub const _1010: Self = Self::new(10);
3098
3099        #[doc = "1/12"]
3100        pub const _1011: Self = Self::new(11);
3101
3102        #[doc = "Setting prohibited"]
3103        pub const OTHERS: Self = Self::new(0);
3104    }
3105    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3106    pub struct Trcksel_SPEC;
3107    pub type Trcksel = crate::EnumBitfieldStruct<u8, Trcksel_SPEC>;
3108    impl Trcksel {
3109        #[doc = "System clock source (Value after reset)"]
3110        pub const _0: Self = Self::new(0);
3111
3112        #[doc = "HOCO (oscillation in debug mode)"]
3113        pub const _1: Self = Self::new(1);
3114    }
3115    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3116    pub struct Trcken_SPEC;
3117    pub type Trcken = crate::EnumBitfieldStruct<u8, Trcken_SPEC>;
3118    impl Trcken {
3119        #[doc = "Stop"]
3120        pub const _0: Self = Self::new(0);
3121
3122        #[doc = "Operation enable"]
3123        pub const _1: Self = Self::new(1);
3124    }
3125}
3126#[doc(hidden)]
3127#[derive(Copy, Clone, Eq, PartialEq)]
3128pub struct Ostdcr_SPEC;
3129impl crate::sealed::RegSpec for Ostdcr_SPEC {
3130    type DataType = u8;
3131}
3132
3133#[doc = "Oscillation Stop Detection Control Register"]
3134pub type Ostdcr = crate::RegValueT<Ostdcr_SPEC>;
3135
3136impl Ostdcr {
3137    #[doc = "Oscillation Stop Detection Interrupt Enable"]
3138    #[inline(always)]
3139    pub fn ostdie(
3140        self,
3141    ) -> crate::common::RegisterField<
3142        0,
3143        0x1,
3144        1,
3145        0,
3146        ostdcr::Ostdie,
3147        ostdcr::Ostdie,
3148        Ostdcr_SPEC,
3149        crate::common::RW,
3150    > {
3151        crate::common::RegisterField::<
3152            0,
3153            0x1,
3154            1,
3155            0,
3156            ostdcr::Ostdie,
3157            ostdcr::Ostdie,
3158            Ostdcr_SPEC,
3159            crate::common::RW,
3160        >::from_register(self, 0)
3161    }
3162
3163    #[doc = "Oscillation Stop Detection Function Enable"]
3164    #[inline(always)]
3165    pub fn ostde(
3166        self,
3167    ) -> crate::common::RegisterField<
3168        7,
3169        0x1,
3170        1,
3171        0,
3172        ostdcr::Ostde,
3173        ostdcr::Ostde,
3174        Ostdcr_SPEC,
3175        crate::common::RW,
3176    > {
3177        crate::common::RegisterField::<
3178            7,
3179            0x1,
3180            1,
3181            0,
3182            ostdcr::Ostde,
3183            ostdcr::Ostde,
3184            Ostdcr_SPEC,
3185            crate::common::RW,
3186        >::from_register(self, 0)
3187    }
3188}
3189impl ::core::default::Default for Ostdcr {
3190    #[inline(always)]
3191    fn default() -> Ostdcr {
3192        <crate::RegValueT<Ostdcr_SPEC> as RegisterValue<_>>::new(0)
3193    }
3194}
3195pub mod ostdcr {
3196
3197    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3198    pub struct Ostdie_SPEC;
3199    pub type Ostdie = crate::EnumBitfieldStruct<u8, Ostdie_SPEC>;
3200    impl Ostdie {
3201        #[doc = "Disable oscillation stop detection interrupt (do not notify the POEG)"]
3202        pub const _0: Self = Self::new(0);
3203
3204        #[doc = "Enable oscillation stop detection interrupt (notify the POEG)"]
3205        pub const _1: Self = Self::new(1);
3206    }
3207    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3208    pub struct Ostde_SPEC;
3209    pub type Ostde = crate::EnumBitfieldStruct<u8, Ostde_SPEC>;
3210    impl Ostde {
3211        #[doc = "Disable oscillation stop detection function"]
3212        pub const _0: Self = Self::new(0);
3213
3214        #[doc = "Enable oscillation stop detection function"]
3215        pub const _1: Self = Self::new(1);
3216    }
3217}
3218#[doc(hidden)]
3219#[derive(Copy, Clone, Eq, PartialEq)]
3220pub struct Ostdsr_SPEC;
3221impl crate::sealed::RegSpec for Ostdsr_SPEC {
3222    type DataType = u8;
3223}
3224
3225#[doc = "Oscillation Stop Detection Status Register"]
3226pub type Ostdsr = crate::RegValueT<Ostdsr_SPEC>;
3227
3228impl Ostdsr {
3229    #[doc = "Oscillation Stop Detection Flag"]
3230    #[inline(always)]
3231    pub fn ostdf(
3232        self,
3233    ) -> crate::common::RegisterField<
3234        0,
3235        0x1,
3236        1,
3237        0,
3238        ostdsr::Ostdf,
3239        ostdsr::Ostdf,
3240        Ostdsr_SPEC,
3241        crate::common::RW,
3242    > {
3243        crate::common::RegisterField::<
3244            0,
3245            0x1,
3246            1,
3247            0,
3248            ostdsr::Ostdf,
3249            ostdsr::Ostdf,
3250            Ostdsr_SPEC,
3251            crate::common::RW,
3252        >::from_register(self, 0)
3253    }
3254}
3255impl ::core::default::Default for Ostdsr {
3256    #[inline(always)]
3257    fn default() -> Ostdsr {
3258        <crate::RegValueT<Ostdsr_SPEC> as RegisterValue<_>>::new(0)
3259    }
3260}
3261pub mod ostdsr {
3262
3263    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3264    pub struct Ostdf_SPEC;
3265    pub type Ostdf = crate::EnumBitfieldStruct<u8, Ostdf_SPEC>;
3266    impl Ostdf {
3267        #[doc = "Main clock oscillation stop not detected"]
3268        pub const _0: Self = Self::new(0);
3269
3270        #[doc = "Main clock oscillation stop detected"]
3271        pub const _1: Self = Self::new(1);
3272    }
3273}
3274#[doc(hidden)]
3275#[derive(Copy, Clone, Eq, PartialEq)]
3276pub struct Oscmonr_SPEC;
3277impl crate::sealed::RegSpec for Oscmonr_SPEC {
3278    type DataType = u8;
3279}
3280
3281#[doc = "Oscillator Monitor Register"]
3282pub type Oscmonr = crate::RegValueT<Oscmonr_SPEC>;
3283
3284impl Oscmonr {
3285    #[doc = "MOCO operation monitor"]
3286    #[inline(always)]
3287    pub fn mocomon(
3288        self,
3289    ) -> crate::common::RegisterField<
3290        1,
3291        0x1,
3292        1,
3293        0,
3294        oscmonr::Mocomon,
3295        oscmonr::Mocomon,
3296        Oscmonr_SPEC,
3297        crate::common::R,
3298    > {
3299        crate::common::RegisterField::<
3300            1,
3301            0x1,
3302            1,
3303            0,
3304            oscmonr::Mocomon,
3305            oscmonr::Mocomon,
3306            Oscmonr_SPEC,
3307            crate::common::R,
3308        >::from_register(self, 0)
3309    }
3310
3311    #[doc = "LOCO operation monitor"]
3312    #[inline(always)]
3313    pub fn locomon(
3314        self,
3315    ) -> crate::common::RegisterField<
3316        2,
3317        0x1,
3318        1,
3319        0,
3320        oscmonr::Locomon,
3321        oscmonr::Locomon,
3322        Oscmonr_SPEC,
3323        crate::common::R,
3324    > {
3325        crate::common::RegisterField::<
3326            2,
3327            0x1,
3328            1,
3329            0,
3330            oscmonr::Locomon,
3331            oscmonr::Locomon,
3332            Oscmonr_SPEC,
3333            crate::common::R,
3334        >::from_register(self, 0)
3335    }
3336}
3337impl ::core::default::Default for Oscmonr {
3338    #[inline(always)]
3339    fn default() -> Oscmonr {
3340        <crate::RegValueT<Oscmonr_SPEC> as RegisterValue<_>>::new(0)
3341    }
3342}
3343pub mod oscmonr {
3344
3345    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3346    pub struct Mocomon_SPEC;
3347    pub type Mocomon = crate::EnumBitfieldStruct<u8, Mocomon_SPEC>;
3348    impl Mocomon {
3349        #[doc = "MOCO is set to operate."]
3350        pub const _0: Self = Self::new(0);
3351
3352        #[doc = "MOCO is set to stop."]
3353        pub const _1: Self = Self::new(1);
3354    }
3355    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3356    pub struct Locomon_SPEC;
3357    pub type Locomon = crate::EnumBitfieldStruct<u8, Locomon_SPEC>;
3358    impl Locomon {
3359        #[doc = "LOCO is set to operate."]
3360        pub const _0: Self = Self::new(0);
3361
3362        #[doc = "LOCO is set to stop."]
3363        pub const _1: Self = Self::new(1);
3364    }
3365}
3366#[doc(hidden)]
3367#[derive(Copy, Clone, Eq, PartialEq)]
3368pub struct Pll2Ccr_SPEC;
3369impl crate::sealed::RegSpec for Pll2Ccr_SPEC {
3370    type DataType = u16;
3371}
3372
3373#[doc = "PLL2 Clock Control Register"]
3374pub type Pll2Ccr = crate::RegValueT<Pll2Ccr_SPEC>;
3375
3376impl Pll2Ccr {
3377    #[doc = "PLL2 Input Frequency Division Ratio Select"]
3378    #[inline(always)]
3379    pub fn pl2idiv(
3380        self,
3381    ) -> crate::common::RegisterField<
3382        0,
3383        0x3,
3384        1,
3385        0,
3386        pll2ccr::Pl2Idiv,
3387        pll2ccr::Pl2Idiv,
3388        Pll2Ccr_SPEC,
3389        crate::common::RW,
3390    > {
3391        crate::common::RegisterField::<
3392            0,
3393            0x3,
3394            1,
3395            0,
3396            pll2ccr::Pl2Idiv,
3397            pll2ccr::Pl2Idiv,
3398            Pll2Ccr_SPEC,
3399            crate::common::RW,
3400        >::from_register(self, 0)
3401    }
3402
3403    #[doc = "PLL2 Clock Source Select"]
3404    #[inline(always)]
3405    pub fn pl2srcsel(
3406        self,
3407    ) -> crate::common::RegisterField<
3408        4,
3409        0x1,
3410        1,
3411        0,
3412        pll2ccr::Pl2Srcsel,
3413        pll2ccr::Pl2Srcsel,
3414        Pll2Ccr_SPEC,
3415        crate::common::RW,
3416    > {
3417        crate::common::RegisterField::<
3418            4,
3419            0x1,
3420            1,
3421            0,
3422            pll2ccr::Pl2Srcsel,
3423            pll2ccr::Pl2Srcsel,
3424            Pll2Ccr_SPEC,
3425            crate::common::RW,
3426        >::from_register(self, 0)
3427    }
3428
3429    #[doc = "PLL2 Frequency Multiplication Fractional Factor Select"]
3430    #[inline(always)]
3431    pub fn pll2mulnf(
3432        self,
3433    ) -> crate::common::RegisterField<
3434        6,
3435        0x3,
3436        1,
3437        0,
3438        pll2ccr::Pll2Mulnf,
3439        pll2ccr::Pll2Mulnf,
3440        Pll2Ccr_SPEC,
3441        crate::common::RW,
3442    > {
3443        crate::common::RegisterField::<
3444            6,
3445            0x3,
3446            1,
3447            0,
3448            pll2ccr::Pll2Mulnf,
3449            pll2ccr::Pll2Mulnf,
3450            Pll2Ccr_SPEC,
3451            crate::common::RW,
3452        >::from_register(self, 0)
3453    }
3454
3455    #[doc = "PLL2 Frequency Multiplication Factor Select"]
3456    #[inline(always)]
3457    pub fn pll2mul(
3458        self,
3459    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Pll2Ccr_SPEC, crate::common::RW> {
3460        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Pll2Ccr_SPEC,crate::common::RW>::from_register(self,0)
3461    }
3462}
3463impl ::core::default::Default for Pll2Ccr {
3464    #[inline(always)]
3465    fn default() -> Pll2Ccr {
3466        <crate::RegValueT<Pll2Ccr_SPEC> as RegisterValue<_>>::new(6400)
3467    }
3468}
3469pub mod pll2ccr {
3470
3471    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3472    pub struct Pl2Idiv_SPEC;
3473    pub type Pl2Idiv = crate::EnumBitfieldStruct<u8, Pl2Idiv_SPEC>;
3474    impl Pl2Idiv {
3475        #[doc = "1/1 (Value after reset)"]
3476        pub const _00: Self = Self::new(0);
3477
3478        #[doc = "1/2"]
3479        pub const _01: Self = Self::new(1);
3480
3481        #[doc = "1/3"]
3482        pub const _10: Self = Self::new(2);
3483
3484        #[doc = "1/4"]
3485        pub const _11: Self = Self::new(3);
3486    }
3487    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3488    pub struct Pl2Srcsel_SPEC;
3489    pub type Pl2Srcsel = crate::EnumBitfieldStruct<u8, Pl2Srcsel_SPEC>;
3490    impl Pl2Srcsel {
3491        #[doc = "Main clock oscillator"]
3492        pub const _0: Self = Self::new(0);
3493
3494        #[doc = "HOCO"]
3495        pub const _1: Self = Self::new(1);
3496    }
3497    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3498    pub struct Pll2Mulnf_SPEC;
3499    pub type Pll2Mulnf = crate::EnumBitfieldStruct<u8, Pll2Mulnf_SPEC>;
3500    impl Pll2Mulnf {
3501        #[doc = "0.00 (Value after reset)"]
3502        pub const _00: Self = Self::new(0);
3503
3504        #[doc = "0.33 (1/3)"]
3505        pub const _01: Self = Self::new(1);
3506
3507        #[doc = "0.66 (2/3)"]
3508        pub const _10: Self = Self::new(2);
3509
3510        #[doc = "0.50 (1/2)"]
3511        pub const _11: Self = Self::new(3);
3512    }
3513}
3514#[doc(hidden)]
3515#[derive(Copy, Clone, Eq, PartialEq)]
3516pub struct Pll2Cr_SPEC;
3517impl crate::sealed::RegSpec for Pll2Cr_SPEC {
3518    type DataType = u8;
3519}
3520
3521#[doc = "PLL2 Control Register"]
3522pub type Pll2Cr = crate::RegValueT<Pll2Cr_SPEC>;
3523
3524impl Pll2Cr {
3525    #[doc = "PLL2 Stop Control"]
3526    #[inline(always)]
3527    pub fn pll2stp(
3528        self,
3529    ) -> crate::common::RegisterField<
3530        0,
3531        0x1,
3532        1,
3533        0,
3534        pll2cr::Pll2Stp,
3535        pll2cr::Pll2Stp,
3536        Pll2Cr_SPEC,
3537        crate::common::RW,
3538    > {
3539        crate::common::RegisterField::<
3540            0,
3541            0x1,
3542            1,
3543            0,
3544            pll2cr::Pll2Stp,
3545            pll2cr::Pll2Stp,
3546            Pll2Cr_SPEC,
3547            crate::common::RW,
3548        >::from_register(self, 0)
3549    }
3550}
3551impl ::core::default::Default for Pll2Cr {
3552    #[inline(always)]
3553    fn default() -> Pll2Cr {
3554        <crate::RegValueT<Pll2Cr_SPEC> as RegisterValue<_>>::new(1)
3555    }
3556}
3557pub mod pll2cr {
3558
3559    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3560    pub struct Pll2Stp_SPEC;
3561    pub type Pll2Stp = crate::EnumBitfieldStruct<u8, Pll2Stp_SPEC>;
3562    impl Pll2Stp {
3563        #[doc = "PLL2 is operating"]
3564        pub const _0: Self = Self::new(0);
3565
3566        #[doc = "PLL2 is stopped"]
3567        pub const _1: Self = Self::new(1);
3568    }
3569}
3570#[doc(hidden)]
3571#[derive(Copy, Clone, Eq, PartialEq)]
3572pub struct Pllccr2_SPEC;
3573impl crate::sealed::RegSpec for Pllccr2_SPEC {
3574    type DataType = u16;
3575}
3576
3577#[doc = "PLL Clock Control Register 2"]
3578pub type Pllccr2 = crate::RegValueT<Pllccr2_SPEC>;
3579
3580impl Pllccr2 {
3581    #[doc = "PLL1 Output Frequency Division Ratio Select for output clock P"]
3582    #[inline(always)]
3583    pub fn plodivp(
3584        self,
3585    ) -> crate::common::RegisterField<
3586        0,
3587        0xf,
3588        1,
3589        0,
3590        pllccr2::Plodivp,
3591        pllccr2::Plodivp,
3592        Pllccr2_SPEC,
3593        crate::common::RW,
3594    > {
3595        crate::common::RegisterField::<
3596            0,
3597            0xf,
3598            1,
3599            0,
3600            pllccr2::Plodivp,
3601            pllccr2::Plodivp,
3602            Pllccr2_SPEC,
3603            crate::common::RW,
3604        >::from_register(self, 0)
3605    }
3606
3607    #[doc = "PLL1 Output Frequency Division Ratio Select for output clock Q"]
3608    #[inline(always)]
3609    pub fn plodivq(
3610        self,
3611    ) -> crate::common::RegisterField<
3612        4,
3613        0xf,
3614        1,
3615        0,
3616        pllccr2::Plodivq,
3617        pllccr2::Plodivq,
3618        Pllccr2_SPEC,
3619        crate::common::RW,
3620    > {
3621        crate::common::RegisterField::<
3622            4,
3623            0xf,
3624            1,
3625            0,
3626            pllccr2::Plodivq,
3627            pllccr2::Plodivq,
3628            Pllccr2_SPEC,
3629            crate::common::RW,
3630        >::from_register(self, 0)
3631    }
3632
3633    #[doc = "PLL1 Output Frequency Division Ratio Select for output clock R"]
3634    #[inline(always)]
3635    pub fn plodivr(
3636        self,
3637    ) -> crate::common::RegisterField<
3638        8,
3639        0xf,
3640        1,
3641        0,
3642        pllccr2::Plodivr,
3643        pllccr2::Plodivr,
3644        Pllccr2_SPEC,
3645        crate::common::RW,
3646    > {
3647        crate::common::RegisterField::<
3648            8,
3649            0xf,
3650            1,
3651            0,
3652            pllccr2::Plodivr,
3653            pllccr2::Plodivr,
3654            Pllccr2_SPEC,
3655            crate::common::RW,
3656        >::from_register(self, 0)
3657    }
3658}
3659impl ::core::default::Default for Pllccr2 {
3660    #[inline(always)]
3661    fn default() -> Pllccr2 {
3662        <crate::RegValueT<Pllccr2_SPEC> as RegisterValue<_>>::new(1365)
3663    }
3664}
3665pub mod pllccr2 {
3666
3667    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3668    pub struct Plodivp_SPEC;
3669    pub type Plodivp = crate::EnumBitfieldStruct<u8, Plodivp_SPEC>;
3670    impl Plodivp {
3671        #[doc = "× 1/2"]
3672        pub const _0001: Self = Self::new(1);
3673
3674        #[doc = "× 1/4"]
3675        pub const _0011: Self = Self::new(3);
3676
3677        #[doc = "× 1/6 (Value after reset)"]
3678        pub const _0101: Self = Self::new(5);
3679
3680        #[doc = "× 1/8"]
3681        pub const _0111: Self = Self::new(7);
3682
3683        #[doc = "× 1/16"]
3684        pub const _1111: Self = Self::new(15);
3685
3686        #[doc = "Setting prohibited."]
3687        pub const OTHERS: Self = Self::new(0);
3688    }
3689    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3690    pub struct Plodivq_SPEC;
3691    pub type Plodivq = crate::EnumBitfieldStruct<u8, Plodivq_SPEC>;
3692    impl Plodivq {
3693        #[doc = "× 1/2"]
3694        pub const _0001: Self = Self::new(1);
3695
3696        #[doc = "× 1/3"]
3697        pub const _0010: Self = Self::new(2);
3698
3699        #[doc = "× 1/4"]
3700        pub const _0011: Self = Self::new(3);
3701
3702        #[doc = "× 1/5"]
3703        pub const _0100: Self = Self::new(4);
3704
3705        #[doc = "× 1/6 (Value after reset)"]
3706        pub const _0101: Self = Self::new(5);
3707
3708        #[doc = "× 1/8"]
3709        pub const _0111: Self = Self::new(7);
3710
3711        #[doc = "× 1/9"]
3712        pub const _1000: Self = Self::new(8);
3713
3714        #[doc = "Setting prohibited."]
3715        pub const OTHERS: Self = Self::new(0);
3716    }
3717    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3718    pub struct Plodivr_SPEC;
3719    pub type Plodivr = crate::EnumBitfieldStruct<u8, Plodivr_SPEC>;
3720    impl Plodivr {
3721        #[doc = "× 1/2"]
3722        pub const _0001: Self = Self::new(1);
3723
3724        #[doc = "× 1/3"]
3725        pub const _0010: Self = Self::new(2);
3726
3727        #[doc = "× 1/4"]
3728        pub const _0011: Self = Self::new(3);
3729
3730        #[doc = "× 1/5"]
3731        pub const _0100: Self = Self::new(4);
3732
3733        #[doc = "× 1/6 (Value after reset)"]
3734        pub const _0101: Self = Self::new(5);
3735
3736        #[doc = "× 1/8"]
3737        pub const _0111: Self = Self::new(7);
3738
3739        #[doc = "× 1/9"]
3740        pub const _1000: Self = Self::new(8);
3741
3742        #[doc = "Setting prohibited."]
3743        pub const OTHERS: Self = Self::new(0);
3744    }
3745}
3746#[doc(hidden)]
3747#[derive(Copy, Clone, Eq, PartialEq)]
3748pub struct Pll2Ccr2_SPEC;
3749impl crate::sealed::RegSpec for Pll2Ccr2_SPEC {
3750    type DataType = u16;
3751}
3752
3753#[doc = "PLL2 Clock Control Register 2"]
3754pub type Pll2Ccr2 = crate::RegValueT<Pll2Ccr2_SPEC>;
3755
3756impl Pll2Ccr2 {
3757    #[doc = "PLL2 Output Frequency Division Ratio Select for output clock P"]
3758    #[inline(always)]
3759    pub fn pl2odivp(
3760        self,
3761    ) -> crate::common::RegisterField<
3762        0,
3763        0xf,
3764        1,
3765        0,
3766        pll2ccr2::Pl2Odivp,
3767        pll2ccr2::Pl2Odivp,
3768        Pll2Ccr2_SPEC,
3769        crate::common::RW,
3770    > {
3771        crate::common::RegisterField::<
3772            0,
3773            0xf,
3774            1,
3775            0,
3776            pll2ccr2::Pl2Odivp,
3777            pll2ccr2::Pl2Odivp,
3778            Pll2Ccr2_SPEC,
3779            crate::common::RW,
3780        >::from_register(self, 0)
3781    }
3782
3783    #[doc = "PLL2 Output Frequency Division Ratio Select for output clock Q"]
3784    #[inline(always)]
3785    pub fn pl2odivq(
3786        self,
3787    ) -> crate::common::RegisterField<
3788        4,
3789        0xf,
3790        1,
3791        0,
3792        pll2ccr2::Pl2Odivq,
3793        pll2ccr2::Pl2Odivq,
3794        Pll2Ccr2_SPEC,
3795        crate::common::RW,
3796    > {
3797        crate::common::RegisterField::<
3798            4,
3799            0xf,
3800            1,
3801            0,
3802            pll2ccr2::Pl2Odivq,
3803            pll2ccr2::Pl2Odivq,
3804            Pll2Ccr2_SPEC,
3805            crate::common::RW,
3806        >::from_register(self, 0)
3807    }
3808
3809    #[doc = "PLL2 Output Frequency Division Ratio Select for output clock R"]
3810    #[inline(always)]
3811    pub fn pl2odivr(
3812        self,
3813    ) -> crate::common::RegisterField<
3814        8,
3815        0xf,
3816        1,
3817        0,
3818        pll2ccr2::Pl2Odivr,
3819        pll2ccr2::Pl2Odivr,
3820        Pll2Ccr2_SPEC,
3821        crate::common::RW,
3822    > {
3823        crate::common::RegisterField::<
3824            8,
3825            0xf,
3826            1,
3827            0,
3828            pll2ccr2::Pl2Odivr,
3829            pll2ccr2::Pl2Odivr,
3830            Pll2Ccr2_SPEC,
3831            crate::common::RW,
3832        >::from_register(self, 0)
3833    }
3834}
3835impl ::core::default::Default for Pll2Ccr2 {
3836    #[inline(always)]
3837    fn default() -> Pll2Ccr2 {
3838        <crate::RegValueT<Pll2Ccr2_SPEC> as RegisterValue<_>>::new(1365)
3839    }
3840}
3841pub mod pll2ccr2 {
3842
3843    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3844    pub struct Pl2Odivp_SPEC;
3845    pub type Pl2Odivp = crate::EnumBitfieldStruct<u8, Pl2Odivp_SPEC>;
3846    impl Pl2Odivp {
3847        #[doc = "× 1/2"]
3848        pub const _0001: Self = Self::new(1);
3849
3850        #[doc = "× 1/4"]
3851        pub const _0011: Self = Self::new(3);
3852
3853        #[doc = "× 1/6 (Value after reset)"]
3854        pub const _0101: Self = Self::new(5);
3855
3856        #[doc = "× 1/8"]
3857        pub const _0111: Self = Self::new(7);
3858
3859        #[doc = "× 1/16"]
3860        pub const _1111: Self = Self::new(15);
3861
3862        #[doc = "Setting prohibited."]
3863        pub const OTHERS: Self = Self::new(0);
3864    }
3865    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3866    pub struct Pl2Odivq_SPEC;
3867    pub type Pl2Odivq = crate::EnumBitfieldStruct<u8, Pl2Odivq_SPEC>;
3868    impl Pl2Odivq {
3869        #[doc = "× 1/2"]
3870        pub const _0001: Self = Self::new(1);
3871
3872        #[doc = "× 1/3"]
3873        pub const _0010: Self = Self::new(2);
3874
3875        #[doc = "× 1/4"]
3876        pub const _0011: Self = Self::new(3);
3877
3878        #[doc = "× 1/5"]
3879        pub const _0100: Self = Self::new(4);
3880
3881        #[doc = "× 1/6 (Value after reset)"]
3882        pub const _0101: Self = Self::new(5);
3883
3884        #[doc = "× 1/8"]
3885        pub const _0111: Self = Self::new(7);
3886
3887        #[doc = "× 1/9"]
3888        pub const _1000: Self = Self::new(8);
3889
3890        #[doc = "Setting prohibited."]
3891        pub const OTHERS: Self = Self::new(0);
3892    }
3893    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3894    pub struct Pl2Odivr_SPEC;
3895    pub type Pl2Odivr = crate::EnumBitfieldStruct<u8, Pl2Odivr_SPEC>;
3896    impl Pl2Odivr {
3897        #[doc = "× 1/2"]
3898        pub const _0001: Self = Self::new(1);
3899
3900        #[doc = "× 1/3"]
3901        pub const _0010: Self = Self::new(2);
3902
3903        #[doc = "× 1/4"]
3904        pub const _0011: Self = Self::new(3);
3905
3906        #[doc = "× 1/5"]
3907        pub const _0100: Self = Self::new(4);
3908
3909        #[doc = "× 1/6 (Value after reset)"]
3910        pub const _0101: Self = Self::new(5);
3911
3912        #[doc = "× 1/8"]
3913        pub const _0111: Self = Self::new(7);
3914
3915        #[doc = "× 1/9"]
3916        pub const _1000: Self = Self::new(8);
3917
3918        #[doc = "Setting prohibited."]
3919        pub const OTHERS: Self = Self::new(0);
3920    }
3921}
3922#[doc(hidden)]
3923#[derive(Copy, Clone, Eq, PartialEq)]
3924pub struct Ebckocr_SPEC;
3925impl crate::sealed::RegSpec for Ebckocr_SPEC {
3926    type DataType = u8;
3927}
3928
3929#[doc = "External Bus Clock Output Control Register"]
3930pub type Ebckocr = crate::RegValueT<Ebckocr_SPEC>;
3931
3932impl Ebckocr {
3933    #[doc = "EBCLK Pin Output Control"]
3934    #[inline(always)]
3935    pub fn ebckoen(
3936        self,
3937    ) -> crate::common::RegisterField<
3938        0,
3939        0x1,
3940        1,
3941        0,
3942        ebckocr::Ebckoen,
3943        ebckocr::Ebckoen,
3944        Ebckocr_SPEC,
3945        crate::common::RW,
3946    > {
3947        crate::common::RegisterField::<
3948            0,
3949            0x1,
3950            1,
3951            0,
3952            ebckocr::Ebckoen,
3953            ebckocr::Ebckoen,
3954            Ebckocr_SPEC,
3955            crate::common::RW,
3956        >::from_register(self, 0)
3957    }
3958}
3959impl ::core::default::Default for Ebckocr {
3960    #[inline(always)]
3961    fn default() -> Ebckocr {
3962        <crate::RegValueT<Ebckocr_SPEC> as RegisterValue<_>>::new(0)
3963    }
3964}
3965pub mod ebckocr {
3966
3967    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3968    pub struct Ebckoen_SPEC;
3969    pub type Ebckoen = crate::EnumBitfieldStruct<u8, Ebckoen_SPEC>;
3970    impl Ebckoen {
3971        #[doc = "EBCLK pin output is disabled (fixed high)"]
3972        pub const _0: Self = Self::new(0);
3973
3974        #[doc = "EBCLK pin output is enabled."]
3975        pub const _1: Self = Self::new(1);
3976    }
3977}
3978#[doc(hidden)]
3979#[derive(Copy, Clone, Eq, PartialEq)]
3980pub struct Sdckocr_SPEC;
3981impl crate::sealed::RegSpec for Sdckocr_SPEC {
3982    type DataType = u8;
3983}
3984
3985#[doc = "SDRAM Clock Output Control Register"]
3986pub type Sdckocr = crate::RegValueT<Sdckocr_SPEC>;
3987
3988impl Sdckocr {
3989    #[doc = "SDCLK Pin Output Control"]
3990    #[inline(always)]
3991    pub fn sdckoen(
3992        self,
3993    ) -> crate::common::RegisterField<
3994        0,
3995        0x1,
3996        1,
3997        0,
3998        sdckocr::Sdckoen,
3999        sdckocr::Sdckoen,
4000        Sdckocr_SPEC,
4001        crate::common::RW,
4002    > {
4003        crate::common::RegisterField::<
4004            0,
4005            0x1,
4006            1,
4007            0,
4008            sdckocr::Sdckoen,
4009            sdckocr::Sdckoen,
4010            Sdckocr_SPEC,
4011            crate::common::RW,
4012        >::from_register(self, 0)
4013    }
4014}
4015impl ::core::default::Default for Sdckocr {
4016    #[inline(always)]
4017    fn default() -> Sdckocr {
4018        <crate::RegValueT<Sdckocr_SPEC> as RegisterValue<_>>::new(0)
4019    }
4020}
4021pub mod sdckocr {
4022
4023    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4024    pub struct Sdckoen_SPEC;
4025    pub type Sdckoen = crate::EnumBitfieldStruct<u8, Sdckoen_SPEC>;
4026    impl Sdckoen {
4027        #[doc = "SDCLK pin output is disabled. (Fixed high)"]
4028        pub const _0: Self = Self::new(0);
4029
4030        #[doc = "SDCLK pin output is enabled."]
4031        pub const _1: Self = Self::new(1);
4032    }
4033}
4034#[doc(hidden)]
4035#[derive(Copy, Clone, Eq, PartialEq)]
4036pub struct Scickdivcr_SPEC;
4037impl crate::sealed::RegSpec for Scickdivcr_SPEC {
4038    type DataType = u8;
4039}
4040
4041#[doc = "SCI clock Division control register"]
4042pub type Scickdivcr = crate::RegValueT<Scickdivcr_SPEC>;
4043
4044impl Scickdivcr {
4045    #[doc = "SCI clock (SCICLK) Division Select"]
4046    #[inline(always)]
4047    pub fn scickdiv(
4048        self,
4049    ) -> crate::common::RegisterField<
4050        0,
4051        0x7,
4052        1,
4053        0,
4054        scickdivcr::Scickdiv,
4055        scickdivcr::Scickdiv,
4056        Scickdivcr_SPEC,
4057        crate::common::RW,
4058    > {
4059        crate::common::RegisterField::<
4060            0,
4061            0x7,
4062            1,
4063            0,
4064            scickdivcr::Scickdiv,
4065            scickdivcr::Scickdiv,
4066            Scickdivcr_SPEC,
4067            crate::common::RW,
4068        >::from_register(self, 0)
4069    }
4070}
4071impl ::core::default::Default for Scickdivcr {
4072    #[inline(always)]
4073    fn default() -> Scickdivcr {
4074        <crate::RegValueT<Scickdivcr_SPEC> as RegisterValue<_>>::new(0)
4075    }
4076}
4077pub mod scickdivcr {
4078
4079    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4080    pub struct Scickdiv_SPEC;
4081    pub type Scickdiv = crate::EnumBitfieldStruct<u8, Scickdiv_SPEC>;
4082    impl Scickdiv {
4083        #[doc = "1/1 (Value after reset)"]
4084        pub const _000: Self = Self::new(0);
4085
4086        #[doc = "1/2"]
4087        pub const _001: Self = Self::new(1);
4088
4089        #[doc = "1/4"]
4090        pub const _010: Self = Self::new(2);
4091
4092        #[doc = "1/6"]
4093        pub const _011: Self = Self::new(3);
4094
4095        #[doc = "1/8"]
4096        pub const _100: Self = Self::new(4);
4097
4098        #[doc = "1/3"]
4099        pub const _101: Self = Self::new(5);
4100
4101        #[doc = "1/5"]
4102        pub const _110: Self = Self::new(6);
4103
4104        #[doc = "Setting prohibited."]
4105        pub const OTHERS: Self = Self::new(0);
4106    }
4107}
4108#[doc(hidden)]
4109#[derive(Copy, Clone, Eq, PartialEq)]
4110pub struct Scickcr_SPEC;
4111impl crate::sealed::RegSpec for Scickcr_SPEC {
4112    type DataType = u8;
4113}
4114
4115#[doc = "SCI clock control register"]
4116pub type Scickcr = crate::RegValueT<Scickcr_SPEC>;
4117
4118impl Scickcr {
4119    #[doc = "SCI clock (SCICLK) Source Select"]
4120    #[inline(always)]
4121    pub fn scicksel(
4122        self,
4123    ) -> crate::common::RegisterField<
4124        0,
4125        0xf,
4126        1,
4127        0,
4128        scickcr::Scicksel,
4129        scickcr::Scicksel,
4130        Scickcr_SPEC,
4131        crate::common::RW,
4132    > {
4133        crate::common::RegisterField::<
4134            0,
4135            0xf,
4136            1,
4137            0,
4138            scickcr::Scicksel,
4139            scickcr::Scicksel,
4140            Scickcr_SPEC,
4141            crate::common::RW,
4142        >::from_register(self, 0)
4143    }
4144
4145    #[doc = "SCI clock (SCICLK) Switching Request"]
4146    #[inline(always)]
4147    pub fn scicksreq(
4148        self,
4149    ) -> crate::common::RegisterField<
4150        6,
4151        0x1,
4152        1,
4153        0,
4154        scickcr::Scicksreq,
4155        scickcr::Scicksreq,
4156        Scickcr_SPEC,
4157        crate::common::RW,
4158    > {
4159        crate::common::RegisterField::<
4160            6,
4161            0x1,
4162            1,
4163            0,
4164            scickcr::Scicksreq,
4165            scickcr::Scicksreq,
4166            Scickcr_SPEC,
4167            crate::common::RW,
4168        >::from_register(self, 0)
4169    }
4170
4171    #[doc = "SCI clock (SCICLK) Switching Ready state flag"]
4172    #[inline(always)]
4173    pub fn scicksrdy(
4174        self,
4175    ) -> crate::common::RegisterField<
4176        7,
4177        0x1,
4178        1,
4179        0,
4180        scickcr::Scicksrdy,
4181        scickcr::Scicksrdy,
4182        Scickcr_SPEC,
4183        crate::common::R,
4184    > {
4185        crate::common::RegisterField::<
4186            7,
4187            0x1,
4188            1,
4189            0,
4190            scickcr::Scicksrdy,
4191            scickcr::Scicksrdy,
4192            Scickcr_SPEC,
4193            crate::common::R,
4194        >::from_register(self, 0)
4195    }
4196}
4197impl ::core::default::Default for Scickcr {
4198    #[inline(always)]
4199    fn default() -> Scickcr {
4200        <crate::RegValueT<Scickcr_SPEC> as RegisterValue<_>>::new(1)
4201    }
4202}
4203pub mod scickcr {
4204
4205    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4206    pub struct Scicksel_SPEC;
4207    pub type Scicksel = crate::EnumBitfieldStruct<u8, Scicksel_SPEC>;
4208    impl Scicksel {
4209        #[doc = "HOCO"]
4210        pub const _0000: Self = Self::new(0);
4211
4212        #[doc = "MOCO (Value after reset)"]
4213        pub const _0001: Self = Self::new(1);
4214
4215        #[doc = "LOCO"]
4216        pub const _0010: Self = Self::new(2);
4217
4218        #[doc = "Main clock oscillator"]
4219        pub const _0011: Self = Self::new(3);
4220
4221        #[doc = "Sub-clock oscillator"]
4222        pub const _0100: Self = Self::new(4);
4223
4224        #[doc = "PLL1P"]
4225        pub const _0101: Self = Self::new(5);
4226
4227        #[doc = "PLL2P"]
4228        pub const _0110: Self = Self::new(6);
4229
4230        #[doc = "PLL1Q"]
4231        pub const _0111: Self = Self::new(7);
4232
4233        #[doc = "PLL1R"]
4234        pub const _1000: Self = Self::new(8);
4235
4236        #[doc = "PLL2Q"]
4237        pub const _1001: Self = Self::new(9);
4238
4239        #[doc = "PLL2R"]
4240        pub const _1010: Self = Self::new(10);
4241
4242        #[doc = "Setting prohibited."]
4243        pub const OTHERS: Self = Self::new(0);
4244    }
4245    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4246    pub struct Scicksreq_SPEC;
4247    pub type Scicksreq = crate::EnumBitfieldStruct<u8, Scicksreq_SPEC>;
4248    impl Scicksreq {
4249        #[doc = "No request"]
4250        pub const _0: Self = Self::new(0);
4251
4252        #[doc = "Request switching"]
4253        pub const _1: Self = Self::new(1);
4254    }
4255    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4256    pub struct Scicksrdy_SPEC;
4257    pub type Scicksrdy = crate::EnumBitfieldStruct<u8, Scicksrdy_SPEC>;
4258    impl Scicksrdy {
4259        #[doc = "Impossible to Switch"]
4260        pub const _0: Self = Self::new(0);
4261
4262        #[doc = "Possible to Switch"]
4263        pub const _1: Self = Self::new(1);
4264    }
4265}
4266#[doc(hidden)]
4267#[derive(Copy, Clone, Eq, PartialEq)]
4268pub struct Spickdivcr_SPEC;
4269impl crate::sealed::RegSpec for Spickdivcr_SPEC {
4270    type DataType = u8;
4271}
4272
4273#[doc = "SPI clock Division control register"]
4274pub type Spickdivcr = crate::RegValueT<Spickdivcr_SPEC>;
4275
4276impl Spickdivcr {
4277    #[doc = "SPI clock (SPICLK) Division Select"]
4278    #[inline(always)]
4279    pub fn spickdiv(
4280        self,
4281    ) -> crate::common::RegisterField<
4282        0,
4283        0x7,
4284        1,
4285        0,
4286        spickdivcr::Spickdiv,
4287        spickdivcr::Spickdiv,
4288        Spickdivcr_SPEC,
4289        crate::common::RW,
4290    > {
4291        crate::common::RegisterField::<
4292            0,
4293            0x7,
4294            1,
4295            0,
4296            spickdivcr::Spickdiv,
4297            spickdivcr::Spickdiv,
4298            Spickdivcr_SPEC,
4299            crate::common::RW,
4300        >::from_register(self, 0)
4301    }
4302}
4303impl ::core::default::Default for Spickdivcr {
4304    #[inline(always)]
4305    fn default() -> Spickdivcr {
4306        <crate::RegValueT<Spickdivcr_SPEC> as RegisterValue<_>>::new(0)
4307    }
4308}
4309pub mod spickdivcr {
4310
4311    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4312    pub struct Spickdiv_SPEC;
4313    pub type Spickdiv = crate::EnumBitfieldStruct<u8, Spickdiv_SPEC>;
4314    impl Spickdiv {
4315        #[doc = "1/1 (Value after reset)"]
4316        pub const _000: Self = Self::new(0);
4317
4318        #[doc = "1/2"]
4319        pub const _001: Self = Self::new(1);
4320
4321        #[doc = "1/4"]
4322        pub const _010: Self = Self::new(2);
4323
4324        #[doc = "1/6"]
4325        pub const _011: Self = Self::new(3);
4326
4327        #[doc = "1/8"]
4328        pub const _100: Self = Self::new(4);
4329
4330        #[doc = "1/3"]
4331        pub const _101: Self = Self::new(5);
4332
4333        #[doc = "1/5"]
4334        pub const _110: Self = Self::new(6);
4335
4336        #[doc = "Setting prohibited."]
4337        pub const OTHERS: Self = Self::new(0);
4338    }
4339}
4340#[doc(hidden)]
4341#[derive(Copy, Clone, Eq, PartialEq)]
4342pub struct Spickcr_SPEC;
4343impl crate::sealed::RegSpec for Spickcr_SPEC {
4344    type DataType = u8;
4345}
4346
4347#[doc = "SPI clock control register"]
4348pub type Spickcr = crate::RegValueT<Spickcr_SPEC>;
4349
4350impl Spickcr {
4351    #[doc = "SPI clock (SPICLK) Source Select"]
4352    #[inline(always)]
4353    pub fn spicksel(
4354        self,
4355    ) -> crate::common::RegisterField<
4356        0,
4357        0xf,
4358        1,
4359        0,
4360        spickcr::Spicksel,
4361        spickcr::Spicksel,
4362        Spickcr_SPEC,
4363        crate::common::RW,
4364    > {
4365        crate::common::RegisterField::<
4366            0,
4367            0xf,
4368            1,
4369            0,
4370            spickcr::Spicksel,
4371            spickcr::Spicksel,
4372            Spickcr_SPEC,
4373            crate::common::RW,
4374        >::from_register(self, 0)
4375    }
4376
4377    #[doc = "SPI clock (SPICLK) Switching Request"]
4378    #[inline(always)]
4379    pub fn spicksreq(
4380        self,
4381    ) -> crate::common::RegisterField<
4382        6,
4383        0x1,
4384        1,
4385        0,
4386        spickcr::Spicksreq,
4387        spickcr::Spicksreq,
4388        Spickcr_SPEC,
4389        crate::common::RW,
4390    > {
4391        crate::common::RegisterField::<
4392            6,
4393            0x1,
4394            1,
4395            0,
4396            spickcr::Spicksreq,
4397            spickcr::Spicksreq,
4398            Spickcr_SPEC,
4399            crate::common::RW,
4400        >::from_register(self, 0)
4401    }
4402
4403    #[doc = "SPI clock (SPICLK) Switching Ready state flag"]
4404    #[inline(always)]
4405    pub fn spicksrdy(
4406        self,
4407    ) -> crate::common::RegisterField<
4408        7,
4409        0x1,
4410        1,
4411        0,
4412        spickcr::Spicksrdy,
4413        spickcr::Spicksrdy,
4414        Spickcr_SPEC,
4415        crate::common::R,
4416    > {
4417        crate::common::RegisterField::<
4418            7,
4419            0x1,
4420            1,
4421            0,
4422            spickcr::Spicksrdy,
4423            spickcr::Spicksrdy,
4424            Spickcr_SPEC,
4425            crate::common::R,
4426        >::from_register(self, 0)
4427    }
4428}
4429impl ::core::default::Default for Spickcr {
4430    #[inline(always)]
4431    fn default() -> Spickcr {
4432        <crate::RegValueT<Spickcr_SPEC> as RegisterValue<_>>::new(0)
4433    }
4434}
4435pub mod spickcr {
4436
4437    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4438    pub struct Spicksel_SPEC;
4439    pub type Spicksel = crate::EnumBitfieldStruct<u8, Spicksel_SPEC>;
4440    impl Spicksel {
4441        #[doc = "HOCO"]
4442        pub const _0000: Self = Self::new(0);
4443
4444        #[doc = "MOCO (Value after reset)"]
4445        pub const _0001: Self = Self::new(1);
4446
4447        #[doc = "LOCO"]
4448        pub const _0010: Self = Self::new(2);
4449
4450        #[doc = "Main clock oscillator"]
4451        pub const _0011: Self = Self::new(3);
4452
4453        #[doc = "Sub-clock oscillator"]
4454        pub const _0100: Self = Self::new(4);
4455
4456        #[doc = "PLL1P"]
4457        pub const _0101: Self = Self::new(5);
4458
4459        #[doc = "PLL2P"]
4460        pub const _0110: Self = Self::new(6);
4461
4462        #[doc = "PLL1Q"]
4463        pub const _0111: Self = Self::new(7);
4464
4465        #[doc = "PLL1R"]
4466        pub const _1000: Self = Self::new(8);
4467
4468        #[doc = "PLL2Q"]
4469        pub const _1001: Self = Self::new(9);
4470
4471        #[doc = "PLL2R"]
4472        pub const _1010: Self = Self::new(10);
4473
4474        #[doc = "Setting prohibited."]
4475        pub const OTHERS: Self = Self::new(0);
4476    }
4477    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4478    pub struct Spicksreq_SPEC;
4479    pub type Spicksreq = crate::EnumBitfieldStruct<u8, Spicksreq_SPEC>;
4480    impl Spicksreq {
4481        #[doc = "No request"]
4482        pub const _0: Self = Self::new(0);
4483
4484        #[doc = "Request switching"]
4485        pub const _1: Self = Self::new(1);
4486    }
4487    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4488    pub struct Spicksrdy_SPEC;
4489    pub type Spicksrdy = crate::EnumBitfieldStruct<u8, Spicksrdy_SPEC>;
4490    impl Spicksrdy {
4491        #[doc = "Impossible to Switch"]
4492        pub const _0: Self = Self::new(0);
4493
4494        #[doc = "Possible to Switch"]
4495        pub const _1: Self = Self::new(1);
4496    }
4497}
4498#[doc(hidden)]
4499#[derive(Copy, Clone, Eq, PartialEq)]
4500pub struct Lcdckdivcr_SPEC;
4501impl crate::sealed::RegSpec for Lcdckdivcr_SPEC {
4502    type DataType = u8;
4503}
4504
4505#[doc = "LCD clock Division control register"]
4506pub type Lcdckdivcr = crate::RegValueT<Lcdckdivcr_SPEC>;
4507
4508impl Lcdckdivcr {
4509    #[doc = "LCD clock (LCDCLK) Division Select"]
4510    #[inline(always)]
4511    pub fn lcdckdiv(
4512        self,
4513    ) -> crate::common::RegisterField<
4514        0,
4515        0x7,
4516        1,
4517        0,
4518        lcdckdivcr::Lcdckdiv,
4519        lcdckdivcr::Lcdckdiv,
4520        Lcdckdivcr_SPEC,
4521        crate::common::RW,
4522    > {
4523        crate::common::RegisterField::<
4524            0,
4525            0x7,
4526            1,
4527            0,
4528            lcdckdivcr::Lcdckdiv,
4529            lcdckdivcr::Lcdckdiv,
4530            Lcdckdivcr_SPEC,
4531            crate::common::RW,
4532        >::from_register(self, 0)
4533    }
4534}
4535impl ::core::default::Default for Lcdckdivcr {
4536    #[inline(always)]
4537    fn default() -> Lcdckdivcr {
4538        <crate::RegValueT<Lcdckdivcr_SPEC> as RegisterValue<_>>::new(0)
4539    }
4540}
4541pub mod lcdckdivcr {
4542
4543    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4544    pub struct Lcdckdiv_SPEC;
4545    pub type Lcdckdiv = crate::EnumBitfieldStruct<u8, Lcdckdiv_SPEC>;
4546    impl Lcdckdiv {
4547        #[doc = "1/1"]
4548        pub const _000: Self = Self::new(0);
4549
4550        #[doc = "1/2"]
4551        pub const _001: Self = Self::new(1);
4552
4553        #[doc = "1/4"]
4554        pub const _010: Self = Self::new(2);
4555
4556        #[doc = "1/6"]
4557        pub const _011: Self = Self::new(3);
4558
4559        #[doc = "1/8"]
4560        pub const _100: Self = Self::new(4);
4561
4562        #[doc = "1/3"]
4563        pub const _101: Self = Self::new(5);
4564
4565        #[doc = "1/5"]
4566        pub const _110: Self = Self::new(6);
4567
4568        #[doc = "Setting prohibited."]
4569        pub const OTHERS: Self = Self::new(0);
4570    }
4571}
4572#[doc(hidden)]
4573#[derive(Copy, Clone, Eq, PartialEq)]
4574pub struct Lcdckcr_SPEC;
4575impl crate::sealed::RegSpec for Lcdckcr_SPEC {
4576    type DataType = u8;
4577}
4578
4579#[doc = "LCD clock control register"]
4580pub type Lcdckcr = crate::RegValueT<Lcdckcr_SPEC>;
4581
4582impl Lcdckcr {
4583    #[doc = "LCD clock (LCDCLK) Source Select"]
4584    #[inline(always)]
4585    pub fn lcdcksel(
4586        self,
4587    ) -> crate::common::RegisterField<
4588        0,
4589        0xf,
4590        1,
4591        0,
4592        lcdckcr::Lcdcksel,
4593        lcdckcr::Lcdcksel,
4594        Lcdckcr_SPEC,
4595        crate::common::RW,
4596    > {
4597        crate::common::RegisterField::<
4598            0,
4599            0xf,
4600            1,
4601            0,
4602            lcdckcr::Lcdcksel,
4603            lcdckcr::Lcdcksel,
4604            Lcdckcr_SPEC,
4605            crate::common::RW,
4606        >::from_register(self, 0)
4607    }
4608
4609    #[doc = "LCD clock (LCDCLK) Switching Request"]
4610    #[inline(always)]
4611    pub fn lcdcksreq(
4612        self,
4613    ) -> crate::common::RegisterField<
4614        6,
4615        0x1,
4616        1,
4617        0,
4618        lcdckcr::Lcdcksreq,
4619        lcdckcr::Lcdcksreq,
4620        Lcdckcr_SPEC,
4621        crate::common::RW,
4622    > {
4623        crate::common::RegisterField::<
4624            6,
4625            0x1,
4626            1,
4627            0,
4628            lcdckcr::Lcdcksreq,
4629            lcdckcr::Lcdcksreq,
4630            Lcdckcr_SPEC,
4631            crate::common::RW,
4632        >::from_register(self, 0)
4633    }
4634
4635    #[doc = "LCD clock (LCDCLK) Switching Ready state flag"]
4636    #[inline(always)]
4637    pub fn lcdcksrdy(
4638        self,
4639    ) -> crate::common::RegisterField<
4640        7,
4641        0x1,
4642        1,
4643        0,
4644        lcdckcr::Lcdcksrdy,
4645        lcdckcr::Lcdcksrdy,
4646        Lcdckcr_SPEC,
4647        crate::common::R,
4648    > {
4649        crate::common::RegisterField::<
4650            7,
4651            0x1,
4652            1,
4653            0,
4654            lcdckcr::Lcdcksrdy,
4655            lcdckcr::Lcdcksrdy,
4656            Lcdckcr_SPEC,
4657            crate::common::R,
4658        >::from_register(self, 0)
4659    }
4660}
4661impl ::core::default::Default for Lcdckcr {
4662    #[inline(always)]
4663    fn default() -> Lcdckcr {
4664        <crate::RegValueT<Lcdckcr_SPEC> as RegisterValue<_>>::new(1)
4665    }
4666}
4667pub mod lcdckcr {
4668
4669    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4670    pub struct Lcdcksel_SPEC;
4671    pub type Lcdcksel = crate::EnumBitfieldStruct<u8, Lcdcksel_SPEC>;
4672    impl Lcdcksel {
4673        #[doc = "MOCO (Value after reset)"]
4674        pub const _0001: Self = Self::new(1);
4675
4676        #[doc = "PLL1P"]
4677        pub const _0101: Self = Self::new(5);
4678
4679        #[doc = "PLL2P"]
4680        pub const _0110: Self = Self::new(6);
4681
4682        #[doc = "PLL1Q"]
4683        pub const _0111: Self = Self::new(7);
4684
4685        #[doc = "PLL1R"]
4686        pub const _1000: Self = Self::new(8);
4687
4688        #[doc = "PLL2Q"]
4689        pub const _1001: Self = Self::new(9);
4690
4691        #[doc = "PLL2R"]
4692        pub const _1010: Self = Self::new(10);
4693
4694        #[doc = "Setting prohibited."]
4695        pub const OTHERS: Self = Self::new(0);
4696    }
4697    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4698    pub struct Lcdcksreq_SPEC;
4699    pub type Lcdcksreq = crate::EnumBitfieldStruct<u8, Lcdcksreq_SPEC>;
4700    impl Lcdcksreq {
4701        #[doc = "No request"]
4702        pub const _0: Self = Self::new(0);
4703
4704        #[doc = "Request switching"]
4705        pub const _1: Self = Self::new(1);
4706    }
4707    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4708    pub struct Lcdcksrdy_SPEC;
4709    pub type Lcdcksrdy = crate::EnumBitfieldStruct<u8, Lcdcksrdy_SPEC>;
4710    impl Lcdcksrdy {
4711        #[doc = "Impossible to Switch"]
4712        pub const _0: Self = Self::new(0);
4713
4714        #[doc = "Possible to Switch"]
4715        pub const _1: Self = Self::new(1);
4716    }
4717}
4718#[doc(hidden)]
4719#[derive(Copy, Clone, Eq, PartialEq)]
4720pub struct Mocoutcr_SPEC;
4721impl crate::sealed::RegSpec for Mocoutcr_SPEC {
4722    type DataType = u8;
4723}
4724
4725#[doc = "MOCO User Trimming Control Register"]
4726pub type Mocoutcr = crate::RegValueT<Mocoutcr_SPEC>;
4727
4728impl Mocoutcr {
4729    #[doc = "MOCO User Trimming"]
4730    #[inline(always)]
4731    pub fn mocoutrm(
4732        self,
4733    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Mocoutcr_SPEC, crate::common::RW> {
4734        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Mocoutcr_SPEC,crate::common::RW>::from_register(self,0)
4735    }
4736}
4737impl ::core::default::Default for Mocoutcr {
4738    #[inline(always)]
4739    fn default() -> Mocoutcr {
4740        <crate::RegValueT<Mocoutcr_SPEC> as RegisterValue<_>>::new(0)
4741    }
4742}
4743
4744#[doc(hidden)]
4745#[derive(Copy, Clone, Eq, PartialEq)]
4746pub struct Hocoutcr_SPEC;
4747impl crate::sealed::RegSpec for Hocoutcr_SPEC {
4748    type DataType = u8;
4749}
4750
4751#[doc = "HOCO User Trimming Control Register"]
4752pub type Hocoutcr = crate::RegValueT<Hocoutcr_SPEC>;
4753
4754impl Hocoutcr {
4755    #[doc = "HOCO User Trimming"]
4756    #[inline(always)]
4757    pub fn hocoutrm(
4758        self,
4759    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Hocoutcr_SPEC, crate::common::RW> {
4760        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Hocoutcr_SPEC,crate::common::RW>::from_register(self,0)
4761    }
4762}
4763impl ::core::default::Default for Hocoutcr {
4764    #[inline(always)]
4765    fn default() -> Hocoutcr {
4766        <crate::RegValueT<Hocoutcr_SPEC> as RegisterValue<_>>::new(0)
4767    }
4768}
4769
4770#[doc(hidden)]
4771#[derive(Copy, Clone, Eq, PartialEq)]
4772pub struct Usbckdivcr_SPEC;
4773impl crate::sealed::RegSpec for Usbckdivcr_SPEC {
4774    type DataType = u8;
4775}
4776
4777#[doc = "USB Clock Division Control Register"]
4778pub type Usbckdivcr = crate::RegValueT<Usbckdivcr_SPEC>;
4779
4780impl Usbckdivcr {
4781    #[doc = "USB Clock (USBCLK) Division Select"]
4782    #[inline(always)]
4783    pub fn usbckdiv(
4784        self,
4785    ) -> crate::common::RegisterField<
4786        0,
4787        0x7,
4788        1,
4789        0,
4790        usbckdivcr::Usbckdiv,
4791        usbckdivcr::Usbckdiv,
4792        Usbckdivcr_SPEC,
4793        crate::common::RW,
4794    > {
4795        crate::common::RegisterField::<
4796            0,
4797            0x7,
4798            1,
4799            0,
4800            usbckdivcr::Usbckdiv,
4801            usbckdivcr::Usbckdiv,
4802            Usbckdivcr_SPEC,
4803            crate::common::RW,
4804        >::from_register(self, 0)
4805    }
4806}
4807impl ::core::default::Default for Usbckdivcr {
4808    #[inline(always)]
4809    fn default() -> Usbckdivcr {
4810        <crate::RegValueT<Usbckdivcr_SPEC> as RegisterValue<_>>::new(0)
4811    }
4812}
4813pub mod usbckdivcr {
4814
4815    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4816    pub struct Usbckdiv_SPEC;
4817    pub type Usbckdiv = crate::EnumBitfieldStruct<u8, Usbckdiv_SPEC>;
4818    impl Usbckdiv {
4819        #[doc = "1/1"]
4820        pub const _000: Self = Self::new(0);
4821
4822        #[doc = "1/2"]
4823        pub const _001: Self = Self::new(1);
4824
4825        #[doc = "1/4"]
4826        pub const _010: Self = Self::new(2);
4827
4828        #[doc = "1/6"]
4829        pub const _011: Self = Self::new(3);
4830
4831        #[doc = "1/8"]
4832        pub const _100: Self = Self::new(4);
4833
4834        #[doc = "1/3"]
4835        pub const _101: Self = Self::new(5);
4836
4837        #[doc = "1/5"]
4838        pub const _110: Self = Self::new(6);
4839
4840        #[doc = "Setting prohibited."]
4841        pub const OTHERS: Self = Self::new(0);
4842    }
4843}
4844#[doc(hidden)]
4845#[derive(Copy, Clone, Eq, PartialEq)]
4846pub struct Octackdivcr_SPEC;
4847impl crate::sealed::RegSpec for Octackdivcr_SPEC {
4848    type DataType = u8;
4849}
4850
4851#[doc = "Octal-SPI Clock Division Control Register"]
4852pub type Octackdivcr = crate::RegValueT<Octackdivcr_SPEC>;
4853
4854impl Octackdivcr {
4855    #[doc = "Octal-SPI Clock (OCTACLK) Division Select"]
4856    #[inline(always)]
4857    pub fn octackdiv(
4858        self,
4859    ) -> crate::common::RegisterField<
4860        0,
4861        0x7,
4862        1,
4863        0,
4864        octackdivcr::Octackdiv,
4865        octackdivcr::Octackdiv,
4866        Octackdivcr_SPEC,
4867        crate::common::RW,
4868    > {
4869        crate::common::RegisterField::<
4870            0,
4871            0x7,
4872            1,
4873            0,
4874            octackdivcr::Octackdiv,
4875            octackdivcr::Octackdiv,
4876            Octackdivcr_SPEC,
4877            crate::common::RW,
4878        >::from_register(self, 0)
4879    }
4880}
4881impl ::core::default::Default for Octackdivcr {
4882    #[inline(always)]
4883    fn default() -> Octackdivcr {
4884        <crate::RegValueT<Octackdivcr_SPEC> as RegisterValue<_>>::new(0)
4885    }
4886}
4887pub mod octackdivcr {
4888
4889    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4890    pub struct Octackdiv_SPEC;
4891    pub type Octackdiv = crate::EnumBitfieldStruct<u8, Octackdiv_SPEC>;
4892    impl Octackdiv {
4893        #[doc = "1/1 (Value after reset)"]
4894        pub const _000: Self = Self::new(0);
4895
4896        #[doc = "1/2"]
4897        pub const _001: Self = Self::new(1);
4898
4899        #[doc = "1/4"]
4900        pub const _010: Self = Self::new(2);
4901
4902        #[doc = "1/6"]
4903        pub const _011: Self = Self::new(3);
4904
4905        #[doc = "1/8"]
4906        pub const _100: Self = Self::new(4);
4907
4908        #[doc = "1/3"]
4909        pub const _101: Self = Self::new(5);
4910
4911        #[doc = "1/5"]
4912        pub const _110: Self = Self::new(6);
4913
4914        #[doc = "Setting prohibited."]
4915        pub const OTHERS: Self = Self::new(0);
4916    }
4917}
4918#[doc(hidden)]
4919#[derive(Copy, Clone, Eq, PartialEq)]
4920pub struct Canfdckdivcr_SPEC;
4921impl crate::sealed::RegSpec for Canfdckdivcr_SPEC {
4922    type DataType = u8;
4923}
4924
4925#[doc = "CANFD Core Clock Division Control Register"]
4926pub type Canfdckdivcr = crate::RegValueT<Canfdckdivcr_SPEC>;
4927
4928impl Canfdckdivcr {
4929    #[doc = "CANFD core clock (CANFDCLK) Division Select"]
4930    #[inline(always)]
4931    pub fn canfdckdiv(
4932        self,
4933    ) -> crate::common::RegisterField<
4934        0,
4935        0x7,
4936        1,
4937        0,
4938        canfdckdivcr::Canfdckdiv,
4939        canfdckdivcr::Canfdckdiv,
4940        Canfdckdivcr_SPEC,
4941        crate::common::RW,
4942    > {
4943        crate::common::RegisterField::<
4944            0,
4945            0x7,
4946            1,
4947            0,
4948            canfdckdivcr::Canfdckdiv,
4949            canfdckdivcr::Canfdckdiv,
4950            Canfdckdivcr_SPEC,
4951            crate::common::RW,
4952        >::from_register(self, 0)
4953    }
4954}
4955impl ::core::default::Default for Canfdckdivcr {
4956    #[inline(always)]
4957    fn default() -> Canfdckdivcr {
4958        <crate::RegValueT<Canfdckdivcr_SPEC> as RegisterValue<_>>::new(0)
4959    }
4960}
4961pub mod canfdckdivcr {
4962
4963    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4964    pub struct Canfdckdiv_SPEC;
4965    pub type Canfdckdiv = crate::EnumBitfieldStruct<u8, Canfdckdiv_SPEC>;
4966    impl Canfdckdiv {
4967        #[doc = "1/1 (Value after reset)"]
4968        pub const _000: Self = Self::new(0);
4969
4970        #[doc = "1/2"]
4971        pub const _001: Self = Self::new(1);
4972
4973        #[doc = "1/4"]
4974        pub const _010: Self = Self::new(2);
4975
4976        #[doc = "1/6"]
4977        pub const _011: Self = Self::new(3);
4978
4979        #[doc = "1/8"]
4980        pub const _100: Self = Self::new(4);
4981
4982        #[doc = "1/3"]
4983        pub const _101: Self = Self::new(5);
4984
4985        #[doc = "1/5"]
4986        pub const _110: Self = Self::new(6);
4987
4988        #[doc = "Setting prohibited"]
4989        pub const OTHERS: Self = Self::new(0);
4990    }
4991}
4992#[doc(hidden)]
4993#[derive(Copy, Clone, Eq, PartialEq)]
4994pub struct Usbckcr_SPEC;
4995impl crate::sealed::RegSpec for Usbckcr_SPEC {
4996    type DataType = u8;
4997}
4998
4999#[doc = "USB Clock Control Register"]
5000pub type Usbckcr = crate::RegValueT<Usbckcr_SPEC>;
5001
5002impl Usbckcr {
5003    #[doc = "USB Clock (USBCLK) Source Select"]
5004    #[inline(always)]
5005    pub fn usbcksel(
5006        self,
5007    ) -> crate::common::RegisterField<
5008        0,
5009        0xf,
5010        1,
5011        0,
5012        usbckcr::Usbcksel,
5013        usbckcr::Usbcksel,
5014        Usbckcr_SPEC,
5015        crate::common::RW,
5016    > {
5017        crate::common::RegisterField::<
5018            0,
5019            0xf,
5020            1,
5021            0,
5022            usbckcr::Usbcksel,
5023            usbckcr::Usbcksel,
5024            Usbckcr_SPEC,
5025            crate::common::RW,
5026        >::from_register(self, 0)
5027    }
5028
5029    #[doc = "USB Clock (USBCLK) Switching Request"]
5030    #[inline(always)]
5031    pub fn usbcksreq(
5032        self,
5033    ) -> crate::common::RegisterField<
5034        6,
5035        0x1,
5036        1,
5037        0,
5038        usbckcr::Usbcksreq,
5039        usbckcr::Usbcksreq,
5040        Usbckcr_SPEC,
5041        crate::common::RW,
5042    > {
5043        crate::common::RegisterField::<
5044            6,
5045            0x1,
5046            1,
5047            0,
5048            usbckcr::Usbcksreq,
5049            usbckcr::Usbcksreq,
5050            Usbckcr_SPEC,
5051            crate::common::RW,
5052        >::from_register(self, 0)
5053    }
5054
5055    #[doc = "USB Clock (USBCLK) Switching Ready state flag"]
5056    #[inline(always)]
5057    pub fn usbcksrdy(
5058        self,
5059    ) -> crate::common::RegisterField<
5060        7,
5061        0x1,
5062        1,
5063        0,
5064        usbckcr::Usbcksrdy,
5065        usbckcr::Usbcksrdy,
5066        Usbckcr_SPEC,
5067        crate::common::R,
5068    > {
5069        crate::common::RegisterField::<
5070            7,
5071            0x1,
5072            1,
5073            0,
5074            usbckcr::Usbcksrdy,
5075            usbckcr::Usbcksrdy,
5076            Usbckcr_SPEC,
5077            crate::common::R,
5078        >::from_register(self, 0)
5079    }
5080}
5081impl ::core::default::Default for Usbckcr {
5082    #[inline(always)]
5083    fn default() -> Usbckcr {
5084        <crate::RegValueT<Usbckcr_SPEC> as RegisterValue<_>>::new(1)
5085    }
5086}
5087pub mod usbckcr {
5088
5089    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5090    pub struct Usbcksel_SPEC;
5091    pub type Usbcksel = crate::EnumBitfieldStruct<u8, Usbcksel_SPEC>;
5092    impl Usbcksel {
5093        #[doc = "HOCO"]
5094        pub const _0000: Self = Self::new(0);
5095
5096        #[doc = "MOCO (Value after reset)"]
5097        pub const _0001: Self = Self::new(1);
5098
5099        #[doc = "Main clock oscillator"]
5100        pub const _0011: Self = Self::new(3);
5101
5102        #[doc = "PLL1P"]
5103        pub const _0101: Self = Self::new(5);
5104
5105        #[doc = "PLL2P"]
5106        pub const _0110: Self = Self::new(6);
5107
5108        #[doc = "PLL1Q"]
5109        pub const _0111: Self = Self::new(7);
5110
5111        #[doc = "PLL1R"]
5112        pub const _1000: Self = Self::new(8);
5113
5114        #[doc = "PLL2Q"]
5115        pub const _1001: Self = Self::new(9);
5116
5117        #[doc = "PLL2R"]
5118        pub const _1010: Self = Self::new(10);
5119
5120        #[doc = "Setting prohibited."]
5121        pub const OTHERS: Self = Self::new(0);
5122    }
5123    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5124    pub struct Usbcksreq_SPEC;
5125    pub type Usbcksreq = crate::EnumBitfieldStruct<u8, Usbcksreq_SPEC>;
5126    impl Usbcksreq {
5127        #[doc = "No request"]
5128        pub const _0: Self = Self::new(0);
5129
5130        #[doc = "Request switching."]
5131        pub const _1: Self = Self::new(1);
5132    }
5133    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5134    pub struct Usbcksrdy_SPEC;
5135    pub type Usbcksrdy = crate::EnumBitfieldStruct<u8, Usbcksrdy_SPEC>;
5136    impl Usbcksrdy {
5137        #[doc = "Impossible to Switch"]
5138        pub const _0: Self = Self::new(0);
5139
5140        #[doc = "Possible to Switch"]
5141        pub const _1: Self = Self::new(1);
5142    }
5143}
5144#[doc(hidden)]
5145#[derive(Copy, Clone, Eq, PartialEq)]
5146pub struct Octackcr_SPEC;
5147impl crate::sealed::RegSpec for Octackcr_SPEC {
5148    type DataType = u8;
5149}
5150
5151#[doc = "Octal-SPI Clock Control Register"]
5152pub type Octackcr = crate::RegValueT<Octackcr_SPEC>;
5153
5154impl Octackcr {
5155    #[doc = "Octal-SPI Clock (OCTACLK) Source Select"]
5156    #[inline(always)]
5157    pub fn octacksel(
5158        self,
5159    ) -> crate::common::RegisterField<
5160        0,
5161        0xf,
5162        1,
5163        0,
5164        octackcr::Octacksel,
5165        octackcr::Octacksel,
5166        Octackcr_SPEC,
5167        crate::common::RW,
5168    > {
5169        crate::common::RegisterField::<
5170            0,
5171            0xf,
5172            1,
5173            0,
5174            octackcr::Octacksel,
5175            octackcr::Octacksel,
5176            Octackcr_SPEC,
5177            crate::common::RW,
5178        >::from_register(self, 0)
5179    }
5180
5181    #[doc = "Octal-SPI Clock (OCTACLK) Switching Request"]
5182    #[inline(always)]
5183    pub fn octacksreq(
5184        self,
5185    ) -> crate::common::RegisterField<
5186        6,
5187        0x1,
5188        1,
5189        0,
5190        octackcr::Octacksreq,
5191        octackcr::Octacksreq,
5192        Octackcr_SPEC,
5193        crate::common::RW,
5194    > {
5195        crate::common::RegisterField::<
5196            6,
5197            0x1,
5198            1,
5199            0,
5200            octackcr::Octacksreq,
5201            octackcr::Octacksreq,
5202            Octackcr_SPEC,
5203            crate::common::RW,
5204        >::from_register(self, 0)
5205    }
5206
5207    #[doc = "Octal-SPI Clock (OCTACLK) Switching Ready state flag"]
5208    #[inline(always)]
5209    pub fn octacksrdy(
5210        self,
5211    ) -> crate::common::RegisterField<
5212        7,
5213        0x1,
5214        1,
5215        0,
5216        octackcr::Octacksrdy,
5217        octackcr::Octacksrdy,
5218        Octackcr_SPEC,
5219        crate::common::R,
5220    > {
5221        crate::common::RegisterField::<
5222            7,
5223            0x1,
5224            1,
5225            0,
5226            octackcr::Octacksrdy,
5227            octackcr::Octacksrdy,
5228            Octackcr_SPEC,
5229            crate::common::R,
5230        >::from_register(self, 0)
5231    }
5232}
5233impl ::core::default::Default for Octackcr {
5234    #[inline(always)]
5235    fn default() -> Octackcr {
5236        <crate::RegValueT<Octackcr_SPEC> as RegisterValue<_>>::new(1)
5237    }
5238}
5239pub mod octackcr {
5240
5241    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5242    pub struct Octacksel_SPEC;
5243    pub type Octacksel = crate::EnumBitfieldStruct<u8, Octacksel_SPEC>;
5244    impl Octacksel {
5245        #[doc = "HOCO"]
5246        pub const _0000: Self = Self::new(0);
5247
5248        #[doc = "MOCO (Value after reset)"]
5249        pub const _0001: Self = Self::new(1);
5250
5251        #[doc = "LOCO"]
5252        pub const _0010: Self = Self::new(2);
5253
5254        #[doc = "Main clock oscillator"]
5255        pub const _0011: Self = Self::new(3);
5256
5257        #[doc = "Sub-clock oscillator"]
5258        pub const _0100: Self = Self::new(4);
5259
5260        #[doc = "PLL1P"]
5261        pub const _0101: Self = Self::new(5);
5262
5263        #[doc = "PLL2P"]
5264        pub const _0110: Self = Self::new(6);
5265
5266        #[doc = "PLL1Q"]
5267        pub const _0111: Self = Self::new(7);
5268
5269        #[doc = "PLL1R"]
5270        pub const _1000: Self = Self::new(8);
5271
5272        #[doc = "PLL2Q"]
5273        pub const _1001: Self = Self::new(9);
5274
5275        #[doc = "PLL2R"]
5276        pub const _1010: Self = Self::new(10);
5277
5278        #[doc = "Setting prohibited."]
5279        pub const OTHERS: Self = Self::new(0);
5280    }
5281    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5282    pub struct Octacksreq_SPEC;
5283    pub type Octacksreq = crate::EnumBitfieldStruct<u8, Octacksreq_SPEC>;
5284    impl Octacksreq {
5285        #[doc = "No request"]
5286        pub const _0: Self = Self::new(0);
5287
5288        #[doc = "Request switching."]
5289        pub const _1: Self = Self::new(1);
5290    }
5291    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5292    pub struct Octacksrdy_SPEC;
5293    pub type Octacksrdy = crate::EnumBitfieldStruct<u8, Octacksrdy_SPEC>;
5294    impl Octacksrdy {
5295        #[doc = "Impossible to Switch"]
5296        pub const _0: Self = Self::new(0);
5297
5298        #[doc = "Possible to Switch"]
5299        pub const _1: Self = Self::new(1);
5300    }
5301}
5302#[doc(hidden)]
5303#[derive(Copy, Clone, Eq, PartialEq)]
5304pub struct Canfdckcr_SPEC;
5305impl crate::sealed::RegSpec for Canfdckcr_SPEC {
5306    type DataType = u8;
5307}
5308
5309#[doc = "CANFD Core Clock Control Register"]
5310pub type Canfdckcr = crate::RegValueT<Canfdckcr_SPEC>;
5311
5312impl Canfdckcr {
5313    #[doc = "CANFD Core Clock (CANFDCLK) Source Select"]
5314    #[inline(always)]
5315    pub fn canfdcksel(
5316        self,
5317    ) -> crate::common::RegisterField<
5318        0,
5319        0xf,
5320        1,
5321        0,
5322        canfdckcr::Canfdcksel,
5323        canfdckcr::Canfdcksel,
5324        Canfdckcr_SPEC,
5325        crate::common::RW,
5326    > {
5327        crate::common::RegisterField::<
5328            0,
5329            0xf,
5330            1,
5331            0,
5332            canfdckcr::Canfdcksel,
5333            canfdckcr::Canfdcksel,
5334            Canfdckcr_SPEC,
5335            crate::common::RW,
5336        >::from_register(self, 0)
5337    }
5338
5339    #[doc = "CANFD Core Clock (CANFDCLK) Switching Request"]
5340    #[inline(always)]
5341    pub fn canfdcksreq(
5342        self,
5343    ) -> crate::common::RegisterField<
5344        6,
5345        0x1,
5346        1,
5347        0,
5348        canfdckcr::Canfdcksreq,
5349        canfdckcr::Canfdcksreq,
5350        Canfdckcr_SPEC,
5351        crate::common::RW,
5352    > {
5353        crate::common::RegisterField::<
5354            6,
5355            0x1,
5356            1,
5357            0,
5358            canfdckcr::Canfdcksreq,
5359            canfdckcr::Canfdcksreq,
5360            Canfdckcr_SPEC,
5361            crate::common::RW,
5362        >::from_register(self, 0)
5363    }
5364}
5365impl ::core::default::Default for Canfdckcr {
5366    #[inline(always)]
5367    fn default() -> Canfdckcr {
5368        <crate::RegValueT<Canfdckcr_SPEC> as RegisterValue<_>>::new(1)
5369    }
5370}
5371pub mod canfdckcr {
5372
5373    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5374    pub struct Canfdcksel_SPEC;
5375    pub type Canfdcksel = crate::EnumBitfieldStruct<u8, Canfdcksel_SPEC>;
5376    impl Canfdcksel {
5377        #[doc = "HOCO"]
5378        pub const _0000: Self = Self::new(0);
5379
5380        #[doc = "MOCO (Value after reset)"]
5381        pub const _0001: Self = Self::new(1);
5382
5383        #[doc = "LOCO"]
5384        pub const _0010: Self = Self::new(2);
5385
5386        #[doc = "Main clock oscillator"]
5387        pub const _0011: Self = Self::new(3);
5388
5389        #[doc = "Sub-clock oscillator"]
5390        pub const _0100: Self = Self::new(4);
5391
5392        #[doc = "PLL1P"]
5393        pub const _0101: Self = Self::new(5);
5394
5395        #[doc = "PLL2P"]
5396        pub const _0110: Self = Self::new(6);
5397
5398        #[doc = "PLL1Q"]
5399        pub const _0111: Self = Self::new(7);
5400
5401        #[doc = "PLL1R"]
5402        pub const _1000: Self = Self::new(8);
5403
5404        #[doc = "PLL2Q"]
5405        pub const _1001: Self = Self::new(9);
5406
5407        #[doc = "PLL2R"]
5408        pub const _1010: Self = Self::new(10);
5409
5410        #[doc = "Setting prohibited."]
5411        pub const OTHERS: Self = Self::new(0);
5412    }
5413    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5414    pub struct Canfdcksreq_SPEC;
5415    pub type Canfdcksreq = crate::EnumBitfieldStruct<u8, Canfdcksreq_SPEC>;
5416    impl Canfdcksreq {
5417        #[doc = "No request"]
5418        pub const _0: Self = Self::new(0);
5419
5420        #[doc = "Request switching"]
5421        pub const _1: Self = Self::new(1);
5422    }
5423}
5424#[doc(hidden)]
5425#[derive(Copy, Clone, Eq, PartialEq)]
5426pub struct Moscscr_SPEC;
5427impl crate::sealed::RegSpec for Moscscr_SPEC {
5428    type DataType = u8;
5429}
5430
5431#[doc = "Main Clock Oscillator Standby Control Register"]
5432pub type Moscscr = crate::RegValueT<Moscscr_SPEC>;
5433
5434impl Moscscr {
5435    #[doc = "Main Clock Oscillator Standby Oscillation Keep select"]
5436    #[inline(always)]
5437    pub fn moscsokp(
5438        self,
5439    ) -> crate::common::RegisterField<
5440        0,
5441        0x1,
5442        1,
5443        0,
5444        moscscr::Moscsokp,
5445        moscscr::Moscsokp,
5446        Moscscr_SPEC,
5447        crate::common::RW,
5448    > {
5449        crate::common::RegisterField::<
5450            0,
5451            0x1,
5452            1,
5453            0,
5454            moscscr::Moscsokp,
5455            moscscr::Moscsokp,
5456            Moscscr_SPEC,
5457            crate::common::RW,
5458        >::from_register(self, 0)
5459    }
5460}
5461impl ::core::default::Default for Moscscr {
5462    #[inline(always)]
5463    fn default() -> Moscscr {
5464        <crate::RegValueT<Moscscr_SPEC> as RegisterValue<_>>::new(0)
5465    }
5466}
5467pub mod moscscr {
5468
5469    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5470    pub struct Moscsokp_SPEC;
5471    pub type Moscsokp = crate::EnumBitfieldStruct<u8, Moscsokp_SPEC>;
5472    impl Moscsokp {
5473        #[doc = "Disable"]
5474        pub const _0: Self = Self::new(0);
5475
5476        #[doc = "Enable"]
5477        pub const _1: Self = Self::new(1);
5478    }
5479}
5480#[doc(hidden)]
5481#[derive(Copy, Clone, Eq, PartialEq)]
5482pub struct Hocoscr_SPEC;
5483impl crate::sealed::RegSpec for Hocoscr_SPEC {
5484    type DataType = u8;
5485}
5486
5487#[doc = "High-Speed On-Chip Oscillator Standby Control Register"]
5488pub type Hocoscr = crate::RegValueT<Hocoscr_SPEC>;
5489
5490impl Hocoscr {
5491    #[doc = "HOCO Standby Oscillation Keep select."]
5492    #[inline(always)]
5493    pub fn hocosokp(
5494        self,
5495    ) -> crate::common::RegisterField<
5496        0,
5497        0x1,
5498        1,
5499        0,
5500        hocoscr::Hocosokp,
5501        hocoscr::Hocosokp,
5502        Hocoscr_SPEC,
5503        crate::common::RW,
5504    > {
5505        crate::common::RegisterField::<
5506            0,
5507            0x1,
5508            1,
5509            0,
5510            hocoscr::Hocosokp,
5511            hocoscr::Hocosokp,
5512            Hocoscr_SPEC,
5513            crate::common::RW,
5514        >::from_register(self, 0)
5515    }
5516}
5517impl ::core::default::Default for Hocoscr {
5518    #[inline(always)]
5519    fn default() -> Hocoscr {
5520        <crate::RegValueT<Hocoscr_SPEC> as RegisterValue<_>>::new(0)
5521    }
5522}
5523pub mod hocoscr {
5524
5525    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5526    pub struct Hocosokp_SPEC;
5527    pub type Hocosokp = crate::EnumBitfieldStruct<u8, Hocosokp_SPEC>;
5528    impl Hocosokp {
5529        #[doc = "Disable"]
5530        pub const _0: Self = Self::new(0);
5531
5532        #[doc = "Enable"]
5533        pub const _1: Self = Self::new(1);
5534    }
5535}
5536#[doc(hidden)]
5537#[derive(Copy, Clone, Eq, PartialEq)]
5538pub struct Opccr_SPEC;
5539impl crate::sealed::RegSpec for Opccr_SPEC {
5540    type DataType = u8;
5541}
5542
5543#[doc = "Operating Power Control Register"]
5544pub type Opccr = crate::RegValueT<Opccr_SPEC>;
5545
5546impl Opccr {
5547    #[doc = "Operating Power Control Mode Select"]
5548    #[inline(always)]
5549    pub fn opcm(
5550        self,
5551    ) -> crate::common::RegisterField<
5552        0,
5553        0x3,
5554        1,
5555        0,
5556        opccr::Opcm,
5557        opccr::Opcm,
5558        Opccr_SPEC,
5559        crate::common::RW,
5560    > {
5561        crate::common::RegisterField::<
5562            0,
5563            0x3,
5564            1,
5565            0,
5566            opccr::Opcm,
5567            opccr::Opcm,
5568            Opccr_SPEC,
5569            crate::common::RW,
5570        >::from_register(self, 0)
5571    }
5572
5573    #[doc = "Operating Power Control Mode Transition Status Flag"]
5574    #[inline(always)]
5575    pub fn opcmtsf(
5576        self,
5577    ) -> crate::common::RegisterField<
5578        4,
5579        0x1,
5580        1,
5581        0,
5582        opccr::Opcmtsf,
5583        opccr::Opcmtsf,
5584        Opccr_SPEC,
5585        crate::common::R,
5586    > {
5587        crate::common::RegisterField::<
5588            4,
5589            0x1,
5590            1,
5591            0,
5592            opccr::Opcmtsf,
5593            opccr::Opcmtsf,
5594            Opccr_SPEC,
5595            crate::common::R,
5596        >::from_register(self, 0)
5597    }
5598}
5599impl ::core::default::Default for Opccr {
5600    #[inline(always)]
5601    fn default() -> Opccr {
5602        <crate::RegValueT<Opccr_SPEC> as RegisterValue<_>>::new(0)
5603    }
5604}
5605pub mod opccr {
5606
5607    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5608    pub struct Opcm_SPEC;
5609    pub type Opcm = crate::EnumBitfieldStruct<u8, Opcm_SPEC>;
5610    impl Opcm {
5611        #[doc = "High-speed mode"]
5612        pub const _00: Self = Self::new(0);
5613
5614        #[doc = "Setting prohibited"]
5615        pub const _01: Self = Self::new(1);
5616
5617        #[doc = "Setting prohibited"]
5618        pub const _10: Self = Self::new(2);
5619
5620        #[doc = "Low-speed mode"]
5621        pub const _11: Self = Self::new(3);
5622    }
5623    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5624    pub struct Opcmtsf_SPEC;
5625    pub type Opcmtsf = crate::EnumBitfieldStruct<u8, Opcmtsf_SPEC>;
5626    impl Opcmtsf {
5627        #[doc = "Transition completed"]
5628        pub const _0: Self = Self::new(0);
5629
5630        #[doc = "During transition"]
5631        pub const _1: Self = Self::new(1);
5632    }
5633}
5634#[doc(hidden)]
5635#[derive(Copy, Clone, Eq, PartialEq)]
5636pub struct Moscwtcr_SPEC;
5637impl crate::sealed::RegSpec for Moscwtcr_SPEC {
5638    type DataType = u8;
5639}
5640
5641#[doc = "Main Clock Oscillator Wait Control Register"]
5642pub type Moscwtcr = crate::RegValueT<Moscwtcr_SPEC>;
5643
5644impl Moscwtcr {
5645    #[doc = "Main Clock Oscillator Wait Time Setting"]
5646    #[inline(always)]
5647    pub fn msts(
5648        self,
5649    ) -> crate::common::RegisterField<
5650        0,
5651        0xf,
5652        1,
5653        0,
5654        moscwtcr::Msts,
5655        moscwtcr::Msts,
5656        Moscwtcr_SPEC,
5657        crate::common::RW,
5658    > {
5659        crate::common::RegisterField::<
5660            0,
5661            0xf,
5662            1,
5663            0,
5664            moscwtcr::Msts,
5665            moscwtcr::Msts,
5666            Moscwtcr_SPEC,
5667            crate::common::RW,
5668        >::from_register(self, 0)
5669    }
5670}
5671impl ::core::default::Default for Moscwtcr {
5672    #[inline(always)]
5673    fn default() -> Moscwtcr {
5674        <crate::RegValueT<Moscwtcr_SPEC> as RegisterValue<_>>::new(5)
5675    }
5676}
5677pub mod moscwtcr {
5678
5679    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5680    pub struct Msts_SPEC;
5681    pub type Msts = crate::EnumBitfieldStruct<u8, Msts_SPEC>;
5682    impl Msts {
5683        #[doc = "Wait time = 3 cycles (11.4 us)"]
5684        pub const _0_X_0: Self = Self::new(0);
5685
5686        #[doc = "Wait time = 35 cycles (133.5 us)"]
5687        pub const _0_X_1: Self = Self::new(1);
5688
5689        #[doc = "Wait time = 67 cycles (255.6 us)"]
5690        pub const _0_X_2: Self = Self::new(2);
5691
5692        #[doc = "Wait time = 131 cycles (499.7 us)"]
5693        pub const _0_X_3: Self = Self::new(3);
5694
5695        #[doc = "Wait time = 259 cycles (988.0 us)"]
5696        pub const _0_X_4: Self = Self::new(4);
5697
5698        #[doc = "Wait time = 547 cycles (2086.6 us)"]
5699        pub const _0_X_5: Self = Self::new(5);
5700
5701        #[doc = "Wait time = 1059 cycles (4039.8 us)"]
5702        pub const _0_X_6: Self = Self::new(6);
5703
5704        #[doc = "Wait time = 2147 cycles (8190.2 us)"]
5705        pub const _0_X_7: Self = Self::new(7);
5706
5707        #[doc = "Wait time = 4291 cycles (16368.9 us)"]
5708        pub const _0_X_8: Self = Self::new(8);
5709
5710        #[doc = "Wait time = 8163 cycles (31139.4 us)"]
5711        pub const _0_X_9: Self = Self::new(9);
5712
5713        #[doc = "Setting prohibited"]
5714        pub const OTHERS: Self = Self::new(0);
5715    }
5716}
5717#[doc(hidden)]
5718#[derive(Copy, Clone, Eq, PartialEq)]
5719pub struct Rstsr1_SPEC;
5720impl crate::sealed::RegSpec for Rstsr1_SPEC {
5721    type DataType = u32;
5722}
5723
5724#[doc = "Reset Status Register 1"]
5725pub type Rstsr1 = crate::RegValueT<Rstsr1_SPEC>;
5726
5727impl Rstsr1 {
5728    #[doc = "Independent Watchdog Timer Reset Detect Flag"]
5729    #[inline(always)]
5730    pub fn iwdtrf(
5731        self,
5732    ) -> crate::common::RegisterField<
5733        0,
5734        0x1,
5735        1,
5736        0,
5737        rstsr1::Iwdtrf,
5738        rstsr1::Iwdtrf,
5739        Rstsr1_SPEC,
5740        crate::common::RW,
5741    > {
5742        crate::common::RegisterField::<
5743            0,
5744            0x1,
5745            1,
5746            0,
5747            rstsr1::Iwdtrf,
5748            rstsr1::Iwdtrf,
5749            Rstsr1_SPEC,
5750            crate::common::RW,
5751        >::from_register(self, 0)
5752    }
5753
5754    #[doc = "Watchdog Timer Reset Detect Flag"]
5755    #[inline(always)]
5756    pub fn wdt0rf(
5757        self,
5758    ) -> crate::common::RegisterField<
5759        1,
5760        0x1,
5761        1,
5762        0,
5763        rstsr1::Wdt0Rf,
5764        rstsr1::Wdt0Rf,
5765        Rstsr1_SPEC,
5766        crate::common::RW,
5767    > {
5768        crate::common::RegisterField::<
5769            1,
5770            0x1,
5771            1,
5772            0,
5773            rstsr1::Wdt0Rf,
5774            rstsr1::Wdt0Rf,
5775            Rstsr1_SPEC,
5776            crate::common::RW,
5777        >::from_register(self, 0)
5778    }
5779
5780    #[doc = "Software Reset Detect Flag"]
5781    #[inline(always)]
5782    pub fn swrf(
5783        self,
5784    ) -> crate::common::RegisterField<
5785        2,
5786        0x1,
5787        1,
5788        0,
5789        rstsr1::Swrf,
5790        rstsr1::Swrf,
5791        Rstsr1_SPEC,
5792        crate::common::RW,
5793    > {
5794        crate::common::RegisterField::<
5795            2,
5796            0x1,
5797            1,
5798            0,
5799            rstsr1::Swrf,
5800            rstsr1::Swrf,
5801            Rstsr1_SPEC,
5802            crate::common::RW,
5803        >::from_register(self, 0)
5804    }
5805
5806    #[doc = "CPU Lockup Reset Detect Flag"]
5807    #[inline(always)]
5808    pub fn clu0rf(
5809        self,
5810    ) -> crate::common::RegisterField<
5811        4,
5812        0x1,
5813        1,
5814        0,
5815        rstsr1::Clu0Rf,
5816        rstsr1::Clu0Rf,
5817        Rstsr1_SPEC,
5818        crate::common::RW,
5819    > {
5820        crate::common::RegisterField::<
5821            4,
5822            0x1,
5823            1,
5824            0,
5825            rstsr1::Clu0Rf,
5826            rstsr1::Clu0Rf,
5827            Rstsr1_SPEC,
5828            crate::common::RW,
5829        >::from_register(self, 0)
5830    }
5831
5832    #[doc = "Bus Error Reset Detect Flag"]
5833    #[inline(always)]
5834    pub fn busrf(
5835        self,
5836    ) -> crate::common::RegisterField<
5837        10,
5838        0x1,
5839        1,
5840        0,
5841        rstsr1::Busrf,
5842        rstsr1::Busrf,
5843        Rstsr1_SPEC,
5844        crate::common::RW,
5845    > {
5846        crate::common::RegisterField::<
5847            10,
5848            0x1,
5849            1,
5850            0,
5851            rstsr1::Busrf,
5852            rstsr1::Busrf,
5853            Rstsr1_SPEC,
5854            crate::common::RW,
5855        >::from_register(self, 0)
5856    }
5857
5858    #[doc = "Common Memory Error Reset Detect Flag"]
5859    #[inline(always)]
5860    pub fn cmrf(
5861        self,
5862    ) -> crate::common::RegisterField<
5863        14,
5864        0x1,
5865        1,
5866        0,
5867        rstsr1::Cmrf,
5868        rstsr1::Cmrf,
5869        Rstsr1_SPEC,
5870        crate::common::RW,
5871    > {
5872        crate::common::RegisterField::<
5873            14,
5874            0x1,
5875            1,
5876            0,
5877            rstsr1::Cmrf,
5878            rstsr1::Cmrf,
5879            Rstsr1_SPEC,
5880            crate::common::RW,
5881        >::from_register(self, 0)
5882    }
5883}
5884impl ::core::default::Default for Rstsr1 {
5885    #[inline(always)]
5886    fn default() -> Rstsr1 {
5887        <crate::RegValueT<Rstsr1_SPEC> as RegisterValue<_>>::new(0)
5888    }
5889}
5890pub mod rstsr1 {
5891
5892    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5893    pub struct Iwdtrf_SPEC;
5894    pub type Iwdtrf = crate::EnumBitfieldStruct<u8, Iwdtrf_SPEC>;
5895    impl Iwdtrf {
5896        #[doc = "Independent watchdog timer reset not detected"]
5897        pub const _0: Self = Self::new(0);
5898
5899        #[doc = "Independent watchdog timer reset detected"]
5900        pub const _1: Self = Self::new(1);
5901    }
5902    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5903    pub struct Wdt0Rf_SPEC;
5904    pub type Wdt0Rf = crate::EnumBitfieldStruct<u8, Wdt0Rf_SPEC>;
5905    impl Wdt0Rf {
5906        #[doc = "Watchdog timer reset not detected"]
5907        pub const _0: Self = Self::new(0);
5908
5909        #[doc = "Watchdog timer reset detected"]
5910        pub const _1: Self = Self::new(1);
5911    }
5912    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5913    pub struct Swrf_SPEC;
5914    pub type Swrf = crate::EnumBitfieldStruct<u8, Swrf_SPEC>;
5915    impl Swrf {
5916        #[doc = "Software reset not detected"]
5917        pub const _0: Self = Self::new(0);
5918
5919        #[doc = "Software reset detected"]
5920        pub const _1: Self = Self::new(1);
5921    }
5922    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5923    pub struct Clu0Rf_SPEC;
5924    pub type Clu0Rf = crate::EnumBitfieldStruct<u8, Clu0Rf_SPEC>;
5925    impl Clu0Rf {
5926        #[doc = "CPU Lockup reset not detected"]
5927        pub const _0: Self = Self::new(0);
5928
5929        #[doc = "CPU Lockup reset detected"]
5930        pub const _1: Self = Self::new(1);
5931    }
5932    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5933    pub struct Busrf_SPEC;
5934    pub type Busrf = crate::EnumBitfieldStruct<u8, Busrf_SPEC>;
5935    impl Busrf {
5936        #[doc = "Bus error reset not detected"]
5937        pub const _0: Self = Self::new(0);
5938
5939        #[doc = "Bus error reset detected"]
5940        pub const _1: Self = Self::new(1);
5941    }
5942    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5943    pub struct Cmrf_SPEC;
5944    pub type Cmrf = crate::EnumBitfieldStruct<u8, Cmrf_SPEC>;
5945    impl Cmrf {
5946        #[doc = "Common memory error reset not detected"]
5947        pub const _0: Self = Self::new(0);
5948
5949        #[doc = "Common memory error reset detected"]
5950        pub const _1: Self = Self::new(1);
5951    }
5952}
5953#[doc(hidden)]
5954#[derive(Copy, Clone, Eq, PartialEq)]
5955pub struct Syraccr_SPEC;
5956impl crate::sealed::RegSpec for Syraccr_SPEC {
5957    type DataType = u8;
5958}
5959
5960#[doc = "System Register Access Control Register"]
5961pub type Syraccr = crate::RegValueT<Syraccr_SPEC>;
5962
5963impl Syraccr {
5964    #[doc = "Access Ready monitor"]
5965    #[inline(always)]
5966    pub fn busy(
5967        self,
5968    ) -> crate::common::RegisterField<
5969        0,
5970        0x1,
5971        1,
5972        0,
5973        syraccr::Busy,
5974        syraccr::Busy,
5975        Syraccr_SPEC,
5976        crate::common::R,
5977    > {
5978        crate::common::RegisterField::<
5979            0,
5980            0x1,
5981            1,
5982            0,
5983            syraccr::Busy,
5984            syraccr::Busy,
5985            Syraccr_SPEC,
5986            crate::common::R,
5987        >::from_register(self, 0)
5988    }
5989}
5990impl ::core::default::Default for Syraccr {
5991    #[inline(always)]
5992    fn default() -> Syraccr {
5993        <crate::RegValueT<Syraccr_SPEC> as RegisterValue<_>>::new(0)
5994    }
5995}
5996pub mod syraccr {
5997
5998    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5999    pub struct Busy_SPEC;
6000    pub type Busy = crate::EnumBitfieldStruct<u8, Busy_SPEC>;
6001    impl Busy {
6002        #[doc = "Ready to read/write access"]
6003        pub const _0: Self = Self::new(0);
6004
6005        #[doc = "Writing in progress"]
6006        pub const _1: Self = Self::new(1);
6007    }
6008}
6009#[doc(hidden)]
6010#[derive(Copy, Clone, Eq, PartialEq)]
6011pub struct Pvdcr1_SPEC;
6012impl crate::sealed::RegSpec for Pvdcr1_SPEC {
6013    type DataType = u8;
6014}
6015
6016#[doc = "Voltage Monitor %s Circuit Control Register 1"]
6017pub type Pvdcr1 = crate::RegValueT<Pvdcr1_SPEC>;
6018
6019impl Pvdcr1 {
6020    #[doc = "Voltage Monitor m Interrupt Generation Condition Select"]
6021    #[inline(always)]
6022    pub fn idtsel(
6023        self,
6024    ) -> crate::common::RegisterField<0, 0x3, 1, 0, u8, u8, Pvdcr1_SPEC, crate::common::RW> {
6025        crate::common::RegisterField::<0,0x3,1,0,u8,u8,Pvdcr1_SPEC,crate::common::RW>::from_register(self,0)
6026    }
6027
6028    #[doc = "Voltage Monitor m Interrupt Type Select"]
6029    #[inline(always)]
6030    pub fn irqsel(
6031        self,
6032    ) -> crate::common::RegisterField<
6033        2,
6034        0x1,
6035        1,
6036        0,
6037        pvdcr1::Irqsel,
6038        pvdcr1::Irqsel,
6039        Pvdcr1_SPEC,
6040        crate::common::RW,
6041    > {
6042        crate::common::RegisterField::<
6043            2,
6044            0x1,
6045            1,
6046            0,
6047            pvdcr1::Irqsel,
6048            pvdcr1::Irqsel,
6049            Pvdcr1_SPEC,
6050            crate::common::RW,
6051        >::from_register(self, 0)
6052    }
6053}
6054impl ::core::default::Default for Pvdcr1 {
6055    #[inline(always)]
6056    fn default() -> Pvdcr1 {
6057        <crate::RegValueT<Pvdcr1_SPEC> as RegisterValue<_>>::new(1)
6058    }
6059}
6060pub mod pvdcr1 {
6061
6062    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6063    pub struct Irqsel_SPEC;
6064    pub type Irqsel = crate::EnumBitfieldStruct<u8, Irqsel_SPEC>;
6065    impl Irqsel {
6066        #[doc = "Non-maskable interrupt"]
6067        pub const _0: Self = Self::new(0);
6068
6069        #[doc = "Maskable interrupt"]
6070        pub const _1: Self = Self::new(1);
6071    }
6072}
6073#[doc(hidden)]
6074#[derive(Copy, Clone, Eq, PartialEq)]
6075pub struct Pvdsr_SPEC;
6076impl crate::sealed::RegSpec for Pvdsr_SPEC {
6077    type DataType = u8;
6078}
6079
6080#[doc = "Voltage Monitor %s Circuit Status Register"]
6081pub type Pvdsr = crate::RegValueT<Pvdsr_SPEC>;
6082
6083impl Pvdsr {
6084    #[doc = "Voltage Monitor m Voltage Change Detection Flag"]
6085    #[inline(always)]
6086    pub fn det(self) -> crate::common::RegisterFieldBool<0, 1, 0, Pvdsr_SPEC, crate::common::RW> {
6087        crate::common::RegisterFieldBool::<0, 1, 0, Pvdsr_SPEC, crate::common::RW>::from_register(
6088            self, 0,
6089        )
6090    }
6091
6092    #[doc = "Voltage Monitor 1 Signal Monitor Flag"]
6093    #[inline(always)]
6094    pub fn mon(self) -> crate::common::RegisterFieldBool<1, 1, 0, Pvdsr_SPEC, crate::common::RW> {
6095        crate::common::RegisterFieldBool::<1, 1, 0, Pvdsr_SPEC, crate::common::RW>::from_register(
6096            self, 0,
6097        )
6098    }
6099}
6100impl ::core::default::Default for Pvdsr {
6101    #[inline(always)]
6102    fn default() -> Pvdsr {
6103        <crate::RegValueT<Pvdsr_SPEC> as RegisterValue<_>>::new(2)
6104    }
6105}
6106
6107#[doc(hidden)]
6108#[derive(Copy, Clone, Eq, PartialEq)]
6109pub struct Pdctrgd_SPEC;
6110impl crate::sealed::RegSpec for Pdctrgd_SPEC {
6111    type DataType = u8;
6112}
6113
6114#[doc = "Graphics Power Domain Control Register"]
6115pub type Pdctrgd = crate::RegValueT<Pdctrgd_SPEC>;
6116
6117impl Pdctrgd {
6118    #[doc = "Power control enable"]
6119    #[inline(always)]
6120    pub fn pdde(
6121        self,
6122    ) -> crate::common::RegisterField<
6123        0,
6124        0x1,
6125        1,
6126        0,
6127        pdctrgd::Pdde,
6128        pdctrgd::Pdde,
6129        Pdctrgd_SPEC,
6130        crate::common::RW,
6131    > {
6132        crate::common::RegisterField::<
6133            0,
6134            0x1,
6135            1,
6136            0,
6137            pdctrgd::Pdde,
6138            pdctrgd::Pdde,
6139            Pdctrgd_SPEC,
6140            crate::common::RW,
6141        >::from_register(self, 0)
6142    }
6143
6144    #[doc = "Power control status flag"]
6145    #[inline(always)]
6146    pub fn pdcsf(
6147        self,
6148    ) -> crate::common::RegisterField<
6149        6,
6150        0x1,
6151        1,
6152        0,
6153        pdctrgd::Pdcsf,
6154        pdctrgd::Pdcsf,
6155        Pdctrgd_SPEC,
6156        crate::common::R,
6157    > {
6158        crate::common::RegisterField::<
6159            6,
6160            0x1,
6161            1,
6162            0,
6163            pdctrgd::Pdcsf,
6164            pdctrgd::Pdcsf,
6165            Pdctrgd_SPEC,
6166            crate::common::R,
6167        >::from_register(self, 0)
6168    }
6169
6170    #[doc = "Power gating status flag"]
6171    #[inline(always)]
6172    pub fn pdpgsf(
6173        self,
6174    ) -> crate::common::RegisterField<
6175        7,
6176        0x1,
6177        1,
6178        0,
6179        pdctrgd::Pdpgsf,
6180        pdctrgd::Pdpgsf,
6181        Pdctrgd_SPEC,
6182        crate::common::R,
6183    > {
6184        crate::common::RegisterField::<
6185            7,
6186            0x1,
6187            1,
6188            0,
6189            pdctrgd::Pdpgsf,
6190            pdctrgd::Pdpgsf,
6191            Pdctrgd_SPEC,
6192            crate::common::R,
6193        >::from_register(self, 0)
6194    }
6195}
6196impl ::core::default::Default for Pdctrgd {
6197    #[inline(always)]
6198    fn default() -> Pdctrgd {
6199        <crate::RegValueT<Pdctrgd_SPEC> as RegisterValue<_>>::new(129)
6200    }
6201}
6202pub mod pdctrgd {
6203
6204    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6205    pub struct Pdde_SPEC;
6206    pub type Pdde = crate::EnumBitfieldStruct<u8, Pdde_SPEC>;
6207    impl Pdde {
6208        #[doc = "Power on the target domain"]
6209        pub const _0: Self = Self::new(0);
6210
6211        #[doc = "Power off the target domain"]
6212        pub const _1: Self = Self::new(1);
6213    }
6214    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6215    pub struct Pdcsf_SPEC;
6216    pub type Pdcsf = crate::EnumBitfieldStruct<u8, Pdcsf_SPEC>;
6217    impl Pdcsf {
6218        #[doc = "Power gating control is not executed (idle)"]
6219        pub const _0: Self = Self::new(0);
6220
6221        #[doc = "Power gating control is in progress"]
6222        pub const _1: Self = Self::new(1);
6223    }
6224    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6225    pub struct Pdpgsf_SPEC;
6226    pub type Pdpgsf = crate::EnumBitfieldStruct<u8, Pdpgsf_SPEC>;
6227    impl Pdpgsf {
6228        #[doc = "Target domain is power on (not gating)"]
6229        pub const _0: Self = Self::new(0);
6230
6231        #[doc = "Target domain is power off (during Gating)"]
6232        pub const _1: Self = Self::new(1);
6233    }
6234}
6235#[doc(hidden)]
6236#[derive(Copy, Clone, Eq, PartialEq)]
6237pub struct Pdramscr0_SPEC;
6238impl crate::sealed::RegSpec for Pdramscr0_SPEC {
6239    type DataType = u16;
6240}
6241
6242#[doc = "SRAM Power Domain Standby Control Register 0"]
6243pub type Pdramscr0 = crate::RegValueT<Pdramscr0_SPEC>;
6244
6245impl Pdramscr0 {
6246    #[doc = "Unnecessary Circuit Retention"]
6247    #[inline(always)]
6248    pub fn rkeep0(
6249        self,
6250    ) -> crate::common::RegisterField<
6251        0,
6252        0x1,
6253        1,
6254        0,
6255        pdramscr0::Rkeep0,
6256        pdramscr0::Rkeep0,
6257        Pdramscr0_SPEC,
6258        crate::common::RW,
6259    > {
6260        crate::common::RegisterField::<
6261            0,
6262            0x1,
6263            1,
6264            0,
6265            pdramscr0::Rkeep0,
6266            pdramscr0::Rkeep0,
6267            Pdramscr0_SPEC,
6268            crate::common::RW,
6269        >::from_register(self, 0)
6270    }
6271
6272    #[doc = "Unnecessary Circuit Retention"]
6273    #[inline(always)]
6274    pub fn rkeep1(
6275        self,
6276    ) -> crate::common::RegisterField<
6277        1,
6278        0x1,
6279        1,
6280        0,
6281        pdramscr0::Rkeep1,
6282        pdramscr0::Rkeep1,
6283        Pdramscr0_SPEC,
6284        crate::common::RW,
6285    > {
6286        crate::common::RegisterField::<
6287            1,
6288            0x1,
6289            1,
6290            0,
6291            pdramscr0::Rkeep1,
6292            pdramscr0::Rkeep1,
6293            Pdramscr0_SPEC,
6294            crate::common::RW,
6295        >::from_register(self, 0)
6296    }
6297
6298    #[doc = "RAM Retention"]
6299    #[inline(always)]
6300    pub fn rkeep2(
6301        self,
6302    ) -> crate::common::RegisterField<
6303        2,
6304        0x1,
6305        1,
6306        0,
6307        pdramscr0::Rkeep2,
6308        pdramscr0::Rkeep2,
6309        Pdramscr0_SPEC,
6310        crate::common::RW,
6311    > {
6312        crate::common::RegisterField::<
6313            2,
6314            0x1,
6315            1,
6316            0,
6317            pdramscr0::Rkeep2,
6318            pdramscr0::Rkeep2,
6319            Pdramscr0_SPEC,
6320            crate::common::RW,
6321        >::from_register(self, 0)
6322    }
6323
6324    #[doc = "RAM Retention"]
6325    #[inline(always)]
6326    pub fn rkeep3(
6327        self,
6328    ) -> crate::common::RegisterField<
6329        3,
6330        0x1,
6331        1,
6332        0,
6333        pdramscr0::Rkeep3,
6334        pdramscr0::Rkeep3,
6335        Pdramscr0_SPEC,
6336        crate::common::RW,
6337    > {
6338        crate::common::RegisterField::<
6339            3,
6340            0x1,
6341            1,
6342            0,
6343            pdramscr0::Rkeep3,
6344            pdramscr0::Rkeep3,
6345            Pdramscr0_SPEC,
6346            crate::common::RW,
6347        >::from_register(self, 0)
6348    }
6349
6350    #[doc = "RAM Retention"]
6351    #[inline(always)]
6352    pub fn rkeep4(
6353        self,
6354    ) -> crate::common::RegisterField<
6355        4,
6356        0x1,
6357        1,
6358        0,
6359        pdramscr0::Rkeep4,
6360        pdramscr0::Rkeep4,
6361        Pdramscr0_SPEC,
6362        crate::common::RW,
6363    > {
6364        crate::common::RegisterField::<
6365            4,
6366            0x1,
6367            1,
6368            0,
6369            pdramscr0::Rkeep4,
6370            pdramscr0::Rkeep4,
6371            Pdramscr0_SPEC,
6372            crate::common::RW,
6373        >::from_register(self, 0)
6374    }
6375
6376    #[doc = "RAM Retention"]
6377    #[inline(always)]
6378    pub fn rkeep5(
6379        self,
6380    ) -> crate::common::RegisterField<
6381        5,
6382        0x1,
6383        1,
6384        0,
6385        pdramscr0::Rkeep5,
6386        pdramscr0::Rkeep5,
6387        Pdramscr0_SPEC,
6388        crate::common::RW,
6389    > {
6390        crate::common::RegisterField::<
6391            5,
6392            0x1,
6393            1,
6394            0,
6395            pdramscr0::Rkeep5,
6396            pdramscr0::Rkeep5,
6397            Pdramscr0_SPEC,
6398            crate::common::RW,
6399        >::from_register(self, 0)
6400    }
6401
6402    #[doc = "RAM Retention"]
6403    #[inline(always)]
6404    pub fn rkeep6(
6405        self,
6406    ) -> crate::common::RegisterField<
6407        6,
6408        0x1,
6409        1,
6410        0,
6411        pdramscr0::Rkeep6,
6412        pdramscr0::Rkeep6,
6413        Pdramscr0_SPEC,
6414        crate::common::RW,
6415    > {
6416        crate::common::RegisterField::<
6417            6,
6418            0x1,
6419            1,
6420            0,
6421            pdramscr0::Rkeep6,
6422            pdramscr0::Rkeep6,
6423            Pdramscr0_SPEC,
6424            crate::common::RW,
6425        >::from_register(self, 0)
6426    }
6427}
6428impl ::core::default::Default for Pdramscr0 {
6429    #[inline(always)]
6430    fn default() -> Pdramscr0 {
6431        <crate::RegValueT<Pdramscr0_SPEC> as RegisterValue<_>>::new(32767)
6432    }
6433}
6434pub mod pdramscr0 {
6435
6436    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6437    pub struct Rkeep0_SPEC;
6438    pub type Rkeep0 = crate::EnumBitfieldStruct<u8, Rkeep0_SPEC>;
6439    impl Rkeep0 {
6440        #[doc = "When entering the Software Standby mode, the contents of unnecessary circuit are not kept."]
6441        pub const _0: Self = Self::new(0);
6442
6443        #[doc = "When entering the Software Standby mode, the contents of unnecessary circuit are kept."]
6444        pub const _1: Self = Self::new(1);
6445    }
6446    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6447    pub struct Rkeep1_SPEC;
6448    pub type Rkeep1 = crate::EnumBitfieldStruct<u8, Rkeep1_SPEC>;
6449    impl Rkeep1 {
6450        #[doc = "When entering the Software Standby mode, the contents of unnecessary circuit are not kept."]
6451        pub const _0: Self = Self::new(0);
6452
6453        #[doc = "When entering the Software Standby mode, the contents of unnecessary circuit are kept."]
6454        pub const _1: Self = Self::new(1);
6455    }
6456    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6457    pub struct Rkeep2_SPEC;
6458    pub type Rkeep2 = crate::EnumBitfieldStruct<u8, Rkeep2_SPEC>;
6459    impl Rkeep2 {
6460        #[doc = "When entering the Software Standby mode, the contents of the target RAM are not kept."]
6461        pub const _0: Self = Self::new(0);
6462
6463        #[doc = "When entering the Software Standby mode, the contents of the target RAM are kept."]
6464        pub const _1: Self = Self::new(1);
6465    }
6466    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6467    pub struct Rkeep3_SPEC;
6468    pub type Rkeep3 = crate::EnumBitfieldStruct<u8, Rkeep3_SPEC>;
6469    impl Rkeep3 {
6470        #[doc = "When entering the Software Standby mode, the contents of the target RAM are not kept."]
6471        pub const _0: Self = Self::new(0);
6472
6473        #[doc = "When entering the Software Standby mode, the contents of the target RAM are kept."]
6474        pub const _1: Self = Self::new(1);
6475    }
6476    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6477    pub struct Rkeep4_SPEC;
6478    pub type Rkeep4 = crate::EnumBitfieldStruct<u8, Rkeep4_SPEC>;
6479    impl Rkeep4 {
6480        #[doc = "When entering the Software Standby mode, the contents of the target RAM are not kept."]
6481        pub const _0: Self = Self::new(0);
6482
6483        #[doc = "When entering the Software Standby mode, the contents of the target RAM are kept."]
6484        pub const _1: Self = Self::new(1);
6485    }
6486    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6487    pub struct Rkeep5_SPEC;
6488    pub type Rkeep5 = crate::EnumBitfieldStruct<u8, Rkeep5_SPEC>;
6489    impl Rkeep5 {
6490        #[doc = "When entering the Software Standby mode, the contents of the target RAM are not kept."]
6491        pub const _0: Self = Self::new(0);
6492
6493        #[doc = "When entering the Software Standby mode, the contents of the target RAM are kept."]
6494        pub const _1: Self = Self::new(1);
6495    }
6496    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6497    pub struct Rkeep6_SPEC;
6498    pub type Rkeep6 = crate::EnumBitfieldStruct<u8, Rkeep6_SPEC>;
6499    impl Rkeep6 {
6500        #[doc = "When entering the Software Standby mode, the contents of the target RAM are not kept."]
6501        pub const _0: Self = Self::new(0);
6502
6503        #[doc = "When entering the Software Standby mode, the contents of the target RAM are kept."]
6504        pub const _1: Self = Self::new(1);
6505    }
6506}
6507#[doc(hidden)]
6508#[derive(Copy, Clone, Eq, PartialEq)]
6509pub struct Pdramscr1_SPEC;
6510impl crate::sealed::RegSpec for Pdramscr1_SPEC {
6511    type DataType = u8;
6512}
6513
6514#[doc = "SRAM Power Domain Standby Control Register 1"]
6515pub type Pdramscr1 = crate::RegValueT<Pdramscr1_SPEC>;
6516
6517impl Pdramscr1 {
6518    #[doc = "RAM Retention"]
6519    #[inline(always)]
6520    pub fn rkeep0(
6521        self,
6522    ) -> crate::common::RegisterField<
6523        0,
6524        0x1,
6525        1,
6526        0,
6527        pdramscr1::Rkeep0,
6528        pdramscr1::Rkeep0,
6529        Pdramscr1_SPEC,
6530        crate::common::RW,
6531    > {
6532        crate::common::RegisterField::<
6533            0,
6534            0x1,
6535            1,
6536            0,
6537            pdramscr1::Rkeep0,
6538            pdramscr1::Rkeep0,
6539            Pdramscr1_SPEC,
6540            crate::common::RW,
6541        >::from_register(self, 0)
6542    }
6543}
6544impl ::core::default::Default for Pdramscr1 {
6545    #[inline(always)]
6546    fn default() -> Pdramscr1 {
6547        <crate::RegValueT<Pdramscr1_SPEC> as RegisterValue<_>>::new(3)
6548    }
6549}
6550pub mod pdramscr1 {
6551
6552    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
6553    pub struct Rkeep0_SPEC;
6554    pub type Rkeep0 = crate::EnumBitfieldStruct<u8, Rkeep0_SPEC>;
6555    impl Rkeep0 {
6556        #[doc = "When entering the CPU Deep Sleep and Software Standby mode, the contents of the target RAM are not kept."]
6557        pub const _0: Self = Self::new(0);
6558
6559        #[doc = "When entering the CPU Deep Sleep and Software Standby mode, the contents of the target RAM are kept."]
6560        pub const _1: Self = Self::new(1);
6561    }
6562}
6563#[doc(hidden)]
6564#[derive(Copy, Clone, Eq, PartialEq)]
6565pub struct Vbrsabar_SPEC;
6566impl crate::sealed::RegSpec for Vbrsabar_SPEC {
6567    type DataType = u16;
6568}
6569
6570#[doc = "VBATT Backup Register Security Attribute Boundary Address Register"]
6571pub type Vbrsabar = crate::RegValueT<Vbrsabar_SPEC>;
6572
6573impl Vbrsabar {
6574    #[doc = "Boundary address between secure and non-secure"]
6575    #[inline(always)]
6576    pub fn saba(
6577        self,
6578    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Vbrsabar_SPEC, crate::common::RW>
6579    {
6580        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Vbrsabar_SPEC,crate::common::RW>::from_register(self,0)
6581    }
6582}
6583impl ::core::default::Default for Vbrsabar {
6584    #[inline(always)]
6585    fn default() -> Vbrsabar {
6586        <crate::RegValueT<Vbrsabar_SPEC> as RegisterValue<_>>::new(65504)
6587    }
6588}
6589
6590#[doc(hidden)]
6591#[derive(Copy, Clone, Eq, PartialEq)]
6592pub struct Vbrpabars_SPEC;
6593impl crate::sealed::RegSpec for Vbrpabars_SPEC {
6594    type DataType = u16;
6595}
6596
6597#[doc = "VBATT Backup Register Privilege Attribute Boundary Address Register for Secure Region"]
6598pub type Vbrpabars = crate::RegValueT<Vbrpabars_SPEC>;
6599
6600impl Vbrpabars {
6601    #[doc = "Boundary address between privileged and unprivileged."]
6602    #[inline(always)]
6603    pub fn pabas(
6604        self,
6605    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, Vbrpabars_SPEC, crate::common::RW>
6606    {
6607        crate::common::RegisterField::<0,0xffff,1,0,u16,u16,Vbrpabars_SPEC,crate::common::RW>::from_register(self,0)
6608    }
6609}
6610impl ::core::default::Default for Vbrpabars {
6611    #[inline(always)]
6612    fn default() -> Vbrpabars {
6613        <crate::RegValueT<Vbrpabars_SPEC> as RegisterValue<_>>::new(0)
6614    }
6615}
6616
6617#[doc(hidden)]
6618#[derive(Copy, Clone, Eq, PartialEq)]
6619pub struct Cgfsar_SPEC;
6620impl crate::sealed::RegSpec for Cgfsar_SPEC {
6621    type DataType = u32;
6622}
6623
6624#[doc = "Clock Generation Function Security Attribute Register"]
6625pub type Cgfsar = crate::RegValueT<Cgfsar_SPEC>;
6626
6627impl Cgfsar {
6628    #[doc = "Non Secure Attribute bit 00"]
6629    #[inline(always)]
6630    pub fn nonsec00(
6631        self,
6632    ) -> crate::common::RegisterField<
6633        0,
6634        0x1,
6635        1,
6636        0,
6637        cgfsar::Nonsec00,
6638        cgfsar::Nonsec00,
6639        Cgfsar_SPEC,
6640        crate::common::RW,
6641    > {
6642        crate::common::RegisterField::<
6643            0,
6644            0x1,
6645            1,
6646            0,
6647            cgfsar::Nonsec00,
6648            cgfsar::Nonsec00,
6649            Cgfsar_SPEC,
6650            crate::common::RW,
6651        >::from_register(self, 0)
6652    }
6653
6654    #[doc = "Non Secure Attribute bit 02"]
6655    #[inline(always)]
6656    pub fn nonsec02(
6657        self,
6658    ) -> crate::common::RegisterField<
6659        2,
6660        0x1,
6661        1,
6662        0,
6663        cgfsar::Nonsec02,
6664        cgfsar::Nonsec02,
6665        Cgfsar_SPEC,
6666        crate::common::RW,
6667    > {
6668        crate::common::RegisterField::<
6669            2,
6670            0x1,
6671            1,
6672            0,
6673            cgfsar::Nonsec02,
6674            cgfsar::Nonsec02,
6675            Cgfsar_SPEC,
6676            crate::common::RW,
6677        >::from_register(self, 0)
6678    }
6679
6680    #[doc = "Non Secure Attribute bit 03"]
6681    #[inline(always)]
6682    pub fn nonsec03(
6683        self,
6684    ) -> crate::common::RegisterField<
6685        3,
6686        0x1,
6687        1,
6688        0,
6689        cgfsar::Nonsec03,
6690        cgfsar::Nonsec03,
6691        Cgfsar_SPEC,
6692        crate::common::RW,
6693    > {
6694        crate::common::RegisterField::<
6695            3,
6696            0x1,
6697            1,
6698            0,
6699            cgfsar::Nonsec03,
6700            cgfsar::Nonsec03,
6701            Cgfsar_SPEC,
6702            crate::common::RW,
6703        >::from_register(self, 0)
6704    }
6705
6706    #[doc = "Non Secure Attribute bit 04"]
6707    #[inline(always)]
6708    pub fn nonsec04(
6709        self,
6710    ) -> crate::common::RegisterField<
6711        4,
6712        0x1,
6713        1,
6714        0,
6715        cgfsar::Nonsec04,
6716        cgfsar::Nonsec04,
6717        Cgfsar_SPEC,
6718        crate::common::RW,
6719    > {
6720        crate::common::RegisterField::<
6721            4,
6722            0x1,
6723            1,
6724            0,
6725            cgfsar::Nonsec04,
6726            cgfsar::Nonsec04,
6727            Cgfsar_SPEC,
6728            crate::common::RW,
6729        >::from_register(self, 0)
6730    }
6731
6732    #[doc = "Non Secure Attribute bit 05"]
6733    #[inline(always)]
6734    pub fn nonsec05(
6735        self,
6736    ) -> crate::common::RegisterField<
6737        5,
6738        0x1,
6739        1,
6740        0,
6741        cgfsar::Nonsec05,
6742        cgfsar::Nonsec05,
6743        Cgfsar_SPEC,
6744        crate::common::RW,
6745    > {
6746        crate::common::RegisterField::<
6747            5,
6748            0x1,
6749            1,
6750            0,
6751            cgfsar::Nonsec05,
6752            cgfsar::Nonsec05,
6753            Cgfsar_SPEC,
6754            crate::common::RW,
6755        >::from_register(self, 0)
6756    }
6757
6758    #[doc = "Non Secure Attribute bit 06"]
6759    #[inline(always)]
6760    pub fn nonsec06(
6761        self,
6762    ) -> crate::common::RegisterField<
6763        6,
6764        0x1,
6765        1,
6766        0,
6767        cgfsar::Nonsec06,
6768        cgfsar::Nonsec06,
6769        Cgfsar_SPEC,
6770        crate::common::RW,
6771    > {
6772        crate::common::RegisterField::<
6773            6,
6774            0x1,
6775            1,
6776            0,
6777            cgfsar::Nonsec06,
6778            cgfsar::Nonsec06,
6779            Cgfsar_SPEC,
6780            crate::common::RW,
6781        >::from_register(self, 0)
6782    }
6783
6784    #[doc = "Non Secure Attribute bit 07"]
6785    #[inline(always)]
6786    pub fn nonsec07(
6787        self,
6788    ) -> crate::common::RegisterField<
6789        7,
6790        0x1,
6791        1,
6792        0,
6793        cgfsar::Nonsec07,
6794        cgfsar::Nonsec07,
6795        Cgfsar_SPEC,
6796        crate::common::RW,
6797    > {
6798        crate::common::RegisterField::<
6799            7,
6800            0x1,
6801            1,
6802            0,
6803            cgfsar::Nonsec07,
6804            cgfsar::Nonsec07,
6805            Cgfsar_SPEC,
6806            crate::common::RW,
6807        >::from_register(self, 0)
6808    }
6809
6810    #[doc = "Non Secure Attribute bit 08"]
6811    #[inline(always)]
6812    pub fn nonsec08(
6813        self,
6814    ) -> crate::common::RegisterField<
6815        8,
6816        0x1,
6817        1,
6818        0,
6819        cgfsar::Nonsec08,
6820        cgfsar::Nonsec08,
6821        Cgfsar_SPEC,
6822        crate::common::RW,
6823    > {
6824        crate::common::RegisterField::<
6825            8,
6826            0x1,
6827            1,
6828            0,
6829            cgfsar::Nonsec08,
6830            cgfsar::Nonsec08,
6831            Cgfsar_SPEC,
6832            crate::common::RW,
6833        >::from_register(self, 0)
6834    }
6835
6836    #[doc = "Non Secure Attribute bit 09"]
6837    #[inline(always)]
6838    pub fn nonsec09(
6839        self,
6840    ) -> crate::common::RegisterField<
6841        9,
6842        0x1,
6843        1,
6844        0,
6845        cgfsar::Nonsec09,
6846        cgfsar::Nonsec09,
6847        Cgfsar_SPEC,
6848        crate::common::RW,
6849    > {
6850        crate::common::RegisterField::<
6851            9,
6852            0x1,
6853            1,
6854            0,
6855            cgfsar::Nonsec09,
6856            cgfsar::Nonsec09,
6857            Cgfsar_SPEC,
6858            crate::common::RW,
6859        >::from_register(self, 0)
6860    }
6861
6862    #[doc = "Non Secure Attribute bit 11"]
6863    #[inline(always)]
6864    pub fn nonsec11(
6865        self,
6866    ) -> crate::common::RegisterField<
6867        11,
6868        0x1,
6869        1,
6870        0,
6871        cgfsar::Nonsec11,
6872        cgfsar::Nonsec11,
6873        Cgfsar_SPEC,
6874        crate::common::RW,
6875    > {
6876        crate::common::RegisterField::<
6877            11,
6878            0x1,
6879            1,
6880            0,
6881            cgfsar::Nonsec11,
6882            cgfsar::Nonsec11,
6883            Cgfsar_SPEC,
6884            crate::common::RW,
6885        >::from_register(self, 0)
6886    }
6887
6888    #[doc = "Non Secure Attribute bit 12"]
6889    #[inline(always)]
6890    pub fn nonsec12(
6891        self,
6892    ) -> crate::common::RegisterField<
6893        12,
6894        0x1,
6895        1,
6896        0,
6897        cgfsar::Nonsec12,
6898        cgfsar::Nonsec12,
6899        Cgfsar_SPEC,
6900        crate::common::RW,
6901    > {
6902        crate::common::RegisterField::<
6903            12,
6904            0x1,
6905            1,
6906            0,
6907            cgfsar::Nonsec12,
6908            cgfsar::Nonsec12,
6909            Cgfsar_SPEC,
6910            crate::common::RW,
6911        >::from_register(self, 0)
6912    }
6913
6914    #[doc = "Non Secure Attribute bit 13"]
6915    #[inline(always)]
6916    pub fn nonsec13(
6917        self,
6918    ) -> crate::common::RegisterField<
6919        13,
6920        0x1,
6921        1,
6922        0,
6923        cgfsar::Nonsec13,
6924        cgfsar::Nonsec13,
6925        Cgfsar_SPEC,
6926        crate::common::RW,
6927    > {
6928        crate::common::RegisterField::<
6929            13,
6930            0x1,
6931            1,
6932            0,
6933            cgfsar::Nonsec13,
6934            cgfsar::Nonsec13,
6935            Cgfsar_SPEC,
6936            crate::common::RW,
6937        >::from_register(self, 0)
6938    }
6939
6940    #[doc = "Non Secure Attribute bit 16"]
6941    #[inline(always)]
6942    pub fn nonsec16(
6943        self,
6944    ) -> crate::common::RegisterField<
6945        16,
6946        0x1,
6947        1,
6948        0,
6949        cgfsar::Nonsec16,
6950        cgfsar::Nonsec16,
6951        Cgfsar_SPEC,
6952        crate::common::RW,
6953    > {
6954        crate::common::RegisterField::<
6955            16,
6956            0x1,
6957            1,
6958            0,
6959            cgfsar::Nonsec16,
6960            cgfsar::Nonsec16,
6961            Cgfsar_SPEC,
6962            crate::common::RW,
6963        >::from_register(self, 0)
6964    }
6965
6966    #[doc = "Non Secure Attribute bit 17"]
6967    #[inline(always)]
6968    pub fn nonsec17(
6969        self,
6970    ) -> crate::common::RegisterField<
6971        17,
6972        0x1,
6973        1,
6974        0,
6975        cgfsar::Nonsec17,
6976        cgfsar::Nonsec17,
6977        Cgfsar_SPEC,
6978        crate::common::RW,
6979    > {
6980        crate::common::RegisterField::<
6981            17,
6982            0x1,
6983            1,
6984            0,
6985            cgfsar::Nonsec17,
6986            cgfsar::Nonsec17,
6987            Cgfsar_SPEC,
6988            crate::common::RW,
6989        >::from_register(self, 0)
6990    }
6991
6992    #[doc = "Non Secure Attribute bit 18"]
6993    #[inline(always)]
6994    pub fn nonsec18(
6995        self,
6996    ) -> crate::common::RegisterField<
6997        18,
6998        0x1,
6999        1,
7000        0,
7001        cgfsar::Nonsec18,
7002        cgfsar::Nonsec18,
7003        Cgfsar_SPEC,
7004        crate::common::RW,
7005    > {
7006        crate::common::RegisterField::<
7007            18,
7008            0x1,
7009            1,
7010            0,
7011            cgfsar::Nonsec18,
7012            cgfsar::Nonsec18,
7013            Cgfsar_SPEC,
7014            crate::common::RW,
7015        >::from_register(self, 0)
7016    }
7017
7018    #[doc = "Non Secure Attribute bit 21"]
7019    #[inline(always)]
7020    pub fn nonsec21(
7021        self,
7022    ) -> crate::common::RegisterField<
7023        21,
7024        0x1,
7025        1,
7026        0,
7027        cgfsar::Nonsec21,
7028        cgfsar::Nonsec21,
7029        Cgfsar_SPEC,
7030        crate::common::RW,
7031    > {
7032        crate::common::RegisterField::<
7033            21,
7034            0x1,
7035            1,
7036            0,
7037            cgfsar::Nonsec21,
7038            cgfsar::Nonsec21,
7039            Cgfsar_SPEC,
7040            crate::common::RW,
7041        >::from_register(self, 0)
7042    }
7043
7044    #[doc = "Non Secure Attribute bit 22"]
7045    #[inline(always)]
7046    pub fn nonsec22(
7047        self,
7048    ) -> crate::common::RegisterField<
7049        22,
7050        0x1,
7051        1,
7052        0,
7053        cgfsar::Nonsec22,
7054        cgfsar::Nonsec22,
7055        Cgfsar_SPEC,
7056        crate::common::RW,
7057    > {
7058        crate::common::RegisterField::<
7059            22,
7060            0x1,
7061            1,
7062            0,
7063            cgfsar::Nonsec22,
7064            cgfsar::Nonsec22,
7065            Cgfsar_SPEC,
7066            crate::common::RW,
7067        >::from_register(self, 0)
7068    }
7069
7070    #[doc = "Non Secure Attribute bit 26"]
7071    #[inline(always)]
7072    pub fn nonsec26(
7073        self,
7074    ) -> crate::common::RegisterField<
7075        26,
7076        0x1,
7077        1,
7078        0,
7079        cgfsar::Nonsec26,
7080        cgfsar::Nonsec26,
7081        Cgfsar_SPEC,
7082        crate::common::RW,
7083    > {
7084        crate::common::RegisterField::<
7085            26,
7086            0x1,
7087            1,
7088            0,
7089            cgfsar::Nonsec26,
7090            cgfsar::Nonsec26,
7091            Cgfsar_SPEC,
7092            crate::common::RW,
7093        >::from_register(self, 0)
7094    }
7095}
7096impl ::core::default::Default for Cgfsar {
7097    #[inline(always)]
7098    fn default() -> Cgfsar {
7099        <crate::RegValueT<Cgfsar_SPEC> as RegisterValue<_>>::new(0)
7100    }
7101}
7102pub mod cgfsar {
7103
7104    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7105    pub struct Nonsec00_SPEC;
7106    pub type Nonsec00 = crate::EnumBitfieldStruct<u8, Nonsec00_SPEC>;
7107    impl Nonsec00 {
7108        #[doc = "Secure"]
7109        pub const _0: Self = Self::new(0);
7110
7111        #[doc = "Non Secure"]
7112        pub const _1: Self = Self::new(1);
7113    }
7114    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7115    pub struct Nonsec02_SPEC;
7116    pub type Nonsec02 = crate::EnumBitfieldStruct<u8, Nonsec02_SPEC>;
7117    impl Nonsec02 {
7118        #[doc = "Secure"]
7119        pub const _0: Self = Self::new(0);
7120
7121        #[doc = "Non Secure"]
7122        pub const _1: Self = Self::new(1);
7123    }
7124    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7125    pub struct Nonsec03_SPEC;
7126    pub type Nonsec03 = crate::EnumBitfieldStruct<u8, Nonsec03_SPEC>;
7127    impl Nonsec03 {
7128        #[doc = "Secure"]
7129        pub const _0: Self = Self::new(0);
7130
7131        #[doc = "Non Secure"]
7132        pub const _1: Self = Self::new(1);
7133    }
7134    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7135    pub struct Nonsec04_SPEC;
7136    pub type Nonsec04 = crate::EnumBitfieldStruct<u8, Nonsec04_SPEC>;
7137    impl Nonsec04 {
7138        #[doc = "Secure"]
7139        pub const _0: Self = Self::new(0);
7140
7141        #[doc = "Non Secure"]
7142        pub const _1: Self = Self::new(1);
7143    }
7144    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7145    pub struct Nonsec05_SPEC;
7146    pub type Nonsec05 = crate::EnumBitfieldStruct<u8, Nonsec05_SPEC>;
7147    impl Nonsec05 {
7148        #[doc = "Secure"]
7149        pub const _0: Self = Self::new(0);
7150
7151        #[doc = "Non Secure"]
7152        pub const _1: Self = Self::new(1);
7153    }
7154    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7155    pub struct Nonsec06_SPEC;
7156    pub type Nonsec06 = crate::EnumBitfieldStruct<u8, Nonsec06_SPEC>;
7157    impl Nonsec06 {
7158        #[doc = "Secure"]
7159        pub const _0: Self = Self::new(0);
7160
7161        #[doc = "Non Secure"]
7162        pub const _1: Self = Self::new(1);
7163    }
7164    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7165    pub struct Nonsec07_SPEC;
7166    pub type Nonsec07 = crate::EnumBitfieldStruct<u8, Nonsec07_SPEC>;
7167    impl Nonsec07 {
7168        #[doc = "Secure"]
7169        pub const _0: Self = Self::new(0);
7170
7171        #[doc = "Non Secure"]
7172        pub const _1: Self = Self::new(1);
7173    }
7174    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7175    pub struct Nonsec08_SPEC;
7176    pub type Nonsec08 = crate::EnumBitfieldStruct<u8, Nonsec08_SPEC>;
7177    impl Nonsec08 {
7178        #[doc = "Secure"]
7179        pub const _0: Self = Self::new(0);
7180
7181        #[doc = "Non Secure"]
7182        pub const _1: Self = Self::new(1);
7183    }
7184    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7185    pub struct Nonsec09_SPEC;
7186    pub type Nonsec09 = crate::EnumBitfieldStruct<u8, Nonsec09_SPEC>;
7187    impl Nonsec09 {
7188        #[doc = "Secure"]
7189        pub const _0: Self = Self::new(0);
7190
7191        #[doc = "Non Secure"]
7192        pub const _1: Self = Self::new(1);
7193    }
7194    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7195    pub struct Nonsec11_SPEC;
7196    pub type Nonsec11 = crate::EnumBitfieldStruct<u8, Nonsec11_SPEC>;
7197    impl Nonsec11 {
7198        #[doc = "Secure"]
7199        pub const _0: Self = Self::new(0);
7200
7201        #[doc = "Non Secure"]
7202        pub const _1: Self = Self::new(1);
7203    }
7204    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7205    pub struct Nonsec12_SPEC;
7206    pub type Nonsec12 = crate::EnumBitfieldStruct<u8, Nonsec12_SPEC>;
7207    impl Nonsec12 {
7208        #[doc = "Secure"]
7209        pub const _0: Self = Self::new(0);
7210
7211        #[doc = "Non Secure"]
7212        pub const _1: Self = Self::new(1);
7213    }
7214    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7215    pub struct Nonsec13_SPEC;
7216    pub type Nonsec13 = crate::EnumBitfieldStruct<u8, Nonsec13_SPEC>;
7217    impl Nonsec13 {
7218        #[doc = "Secure"]
7219        pub const _0: Self = Self::new(0);
7220
7221        #[doc = "Non Secure"]
7222        pub const _1: Self = Self::new(1);
7223    }
7224    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7225    pub struct Nonsec16_SPEC;
7226    pub type Nonsec16 = crate::EnumBitfieldStruct<u8, Nonsec16_SPEC>;
7227    impl Nonsec16 {
7228        #[doc = "Secure"]
7229        pub const _0: Self = Self::new(0);
7230
7231        #[doc = "Non Secure"]
7232        pub const _1: Self = Self::new(1);
7233    }
7234    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7235    pub struct Nonsec17_SPEC;
7236    pub type Nonsec17 = crate::EnumBitfieldStruct<u8, Nonsec17_SPEC>;
7237    impl Nonsec17 {
7238        #[doc = "Secure"]
7239        pub const _0: Self = Self::new(0);
7240
7241        #[doc = "Non Secure"]
7242        pub const _1: Self = Self::new(1);
7243    }
7244    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7245    pub struct Nonsec18_SPEC;
7246    pub type Nonsec18 = crate::EnumBitfieldStruct<u8, Nonsec18_SPEC>;
7247    impl Nonsec18 {
7248        #[doc = "Secure"]
7249        pub const _0: Self = Self::new(0);
7250
7251        #[doc = "Non Secure"]
7252        pub const _1: Self = Self::new(1);
7253    }
7254    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7255    pub struct Nonsec21_SPEC;
7256    pub type Nonsec21 = crate::EnumBitfieldStruct<u8, Nonsec21_SPEC>;
7257    impl Nonsec21 {
7258        #[doc = "Secure"]
7259        pub const _0: Self = Self::new(0);
7260
7261        #[doc = "Non Secure"]
7262        pub const _1: Self = Self::new(1);
7263    }
7264    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7265    pub struct Nonsec22_SPEC;
7266    pub type Nonsec22 = crate::EnumBitfieldStruct<u8, Nonsec22_SPEC>;
7267    impl Nonsec22 {
7268        #[doc = "Secure"]
7269        pub const _0: Self = Self::new(0);
7270
7271        #[doc = "Non Secure"]
7272        pub const _1: Self = Self::new(1);
7273    }
7274    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7275    pub struct Nonsec26_SPEC;
7276    pub type Nonsec26 = crate::EnumBitfieldStruct<u8, Nonsec26_SPEC>;
7277    impl Nonsec26 {
7278        #[doc = "Secure"]
7279        pub const _0: Self = Self::new(0);
7280
7281        #[doc = "Non Secure"]
7282        pub const _1: Self = Self::new(1);
7283    }
7284}
7285#[doc(hidden)]
7286#[derive(Copy, Clone, Eq, PartialEq)]
7287pub struct Rstsar_SPEC;
7288impl crate::sealed::RegSpec for Rstsar_SPEC {
7289    type DataType = u32;
7290}
7291
7292#[doc = "Reset Security Attribution Register"]
7293pub type Rstsar = crate::RegValueT<Rstsar_SPEC>;
7294
7295impl Rstsar {
7296    #[doc = "Non-secure Attribute bit 0"]
7297    #[inline(always)]
7298    pub fn nonsec0(
7299        self,
7300    ) -> crate::common::RegisterField<
7301        0,
7302        0x1,
7303        1,
7304        0,
7305        rstsar::Nonsec0,
7306        rstsar::Nonsec0,
7307        Rstsar_SPEC,
7308        crate::common::RW,
7309    > {
7310        crate::common::RegisterField::<
7311            0,
7312            0x1,
7313            1,
7314            0,
7315            rstsar::Nonsec0,
7316            rstsar::Nonsec0,
7317            Rstsar_SPEC,
7318            crate::common::RW,
7319        >::from_register(self, 0)
7320    }
7321
7322    #[doc = "Non-secure Attribute bit 1"]
7323    #[inline(always)]
7324    pub fn nonsec1(
7325        self,
7326    ) -> crate::common::RegisterField<
7327        1,
7328        0x1,
7329        1,
7330        0,
7331        rstsar::Nonsec1,
7332        rstsar::Nonsec1,
7333        Rstsar_SPEC,
7334        crate::common::RW,
7335    > {
7336        crate::common::RegisterField::<
7337            1,
7338            0x1,
7339            1,
7340            0,
7341            rstsar::Nonsec1,
7342            rstsar::Nonsec1,
7343            Rstsar_SPEC,
7344            crate::common::RW,
7345        >::from_register(self, 0)
7346    }
7347
7348    #[doc = "Non-secure Attribute bit 2"]
7349    #[inline(always)]
7350    pub fn nonsec2(
7351        self,
7352    ) -> crate::common::RegisterField<
7353        2,
7354        0x1,
7355        1,
7356        0,
7357        rstsar::Nonsec2,
7358        rstsar::Nonsec2,
7359        Rstsar_SPEC,
7360        crate::common::RW,
7361    > {
7362        crate::common::RegisterField::<
7363            2,
7364            0x1,
7365            1,
7366            0,
7367            rstsar::Nonsec2,
7368            rstsar::Nonsec2,
7369            Rstsar_SPEC,
7370            crate::common::RW,
7371        >::from_register(self, 0)
7372    }
7373}
7374impl ::core::default::Default for Rstsar {
7375    #[inline(always)]
7376    fn default() -> Rstsar {
7377        <crate::RegValueT<Rstsar_SPEC> as RegisterValue<_>>::new(0)
7378    }
7379}
7380pub mod rstsar {
7381
7382    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7383    pub struct Nonsec0_SPEC;
7384    pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
7385    impl Nonsec0 {
7386        #[doc = "Secure"]
7387        pub const _0: Self = Self::new(0);
7388
7389        #[doc = "Non-secure"]
7390        pub const _1: Self = Self::new(1);
7391    }
7392    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7393    pub struct Nonsec1_SPEC;
7394    pub type Nonsec1 = crate::EnumBitfieldStruct<u8, Nonsec1_SPEC>;
7395    impl Nonsec1 {
7396        #[doc = "Secure"]
7397        pub const _0: Self = Self::new(0);
7398
7399        #[doc = "Non-secure"]
7400        pub const _1: Self = Self::new(1);
7401    }
7402    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7403    pub struct Nonsec2_SPEC;
7404    pub type Nonsec2 = crate::EnumBitfieldStruct<u8, Nonsec2_SPEC>;
7405    impl Nonsec2 {
7406        #[doc = "Secure"]
7407        pub const _0: Self = Self::new(0);
7408
7409        #[doc = "Non-secure"]
7410        pub const _1: Self = Self::new(1);
7411    }
7412}
7413#[doc(hidden)]
7414#[derive(Copy, Clone, Eq, PartialEq)]
7415pub struct Lpmsar_SPEC;
7416impl crate::sealed::RegSpec for Lpmsar_SPEC {
7417    type DataType = u32;
7418}
7419
7420#[doc = "Low Power Mode Security Attribution Register"]
7421pub type Lpmsar = crate::RegValueT<Lpmsar_SPEC>;
7422
7423impl Lpmsar {
7424    #[doc = "Non-secure Attribute bit 0"]
7425    #[inline(always)]
7426    pub fn nonsec0(
7427        self,
7428    ) -> crate::common::RegisterField<
7429        0,
7430        0x1,
7431        1,
7432        0,
7433        lpmsar::Nonsec0,
7434        lpmsar::Nonsec0,
7435        Lpmsar_SPEC,
7436        crate::common::RW,
7437    > {
7438        crate::common::RegisterField::<
7439            0,
7440            0x1,
7441            1,
7442            0,
7443            lpmsar::Nonsec0,
7444            lpmsar::Nonsec0,
7445            Lpmsar_SPEC,
7446            crate::common::RW,
7447        >::from_register(self, 0)
7448    }
7449
7450    #[doc = "Non-secure Attribute bit 1"]
7451    #[inline(always)]
7452    pub fn nonsec1(
7453        self,
7454    ) -> crate::common::RegisterField<
7455        1,
7456        0x1,
7457        1,
7458        0,
7459        lpmsar::Nonsec1,
7460        lpmsar::Nonsec1,
7461        Lpmsar_SPEC,
7462        crate::common::RW,
7463    > {
7464        crate::common::RegisterField::<
7465            1,
7466            0x1,
7467            1,
7468            0,
7469            lpmsar::Nonsec1,
7470            lpmsar::Nonsec1,
7471            Lpmsar_SPEC,
7472            crate::common::RW,
7473        >::from_register(self, 0)
7474    }
7475
7476    #[doc = "Non-secure Attribute bit 2"]
7477    #[inline(always)]
7478    pub fn nonsec2(
7479        self,
7480    ) -> crate::common::RegisterField<
7481        2,
7482        0x1,
7483        1,
7484        0,
7485        lpmsar::Nonsec2,
7486        lpmsar::Nonsec2,
7487        Lpmsar_SPEC,
7488        crate::common::RW,
7489    > {
7490        crate::common::RegisterField::<
7491            2,
7492            0x1,
7493            1,
7494            0,
7495            lpmsar::Nonsec2,
7496            lpmsar::Nonsec2,
7497            Lpmsar_SPEC,
7498            crate::common::RW,
7499        >::from_register(self, 0)
7500    }
7501
7502    #[doc = "Non-secure Attribute bit 8"]
7503    #[inline(always)]
7504    pub fn nonsec8(
7505        self,
7506    ) -> crate::common::RegisterField<
7507        8,
7508        0x1,
7509        1,
7510        0,
7511        lpmsar::Nonsec8,
7512        lpmsar::Nonsec8,
7513        Lpmsar_SPEC,
7514        crate::common::RW,
7515    > {
7516        crate::common::RegisterField::<
7517            8,
7518            0x1,
7519            1,
7520            0,
7521            lpmsar::Nonsec8,
7522            lpmsar::Nonsec8,
7523            Lpmsar_SPEC,
7524            crate::common::RW,
7525        >::from_register(self, 0)
7526    }
7527
7528    #[doc = "Non-secure Attribute bit 17"]
7529    #[inline(always)]
7530    pub fn nonsec17(
7531        self,
7532    ) -> crate::common::RegisterField<
7533        17,
7534        0x1,
7535        1,
7536        0,
7537        lpmsar::Nonsec17,
7538        lpmsar::Nonsec17,
7539        Lpmsar_SPEC,
7540        crate::common::RW,
7541    > {
7542        crate::common::RegisterField::<
7543            17,
7544            0x1,
7545            1,
7546            0,
7547            lpmsar::Nonsec17,
7548            lpmsar::Nonsec17,
7549            Lpmsar_SPEC,
7550            crate::common::RW,
7551        >::from_register(self, 0)
7552    }
7553
7554    #[doc = "Non-secure Attribute bit 18"]
7555    #[inline(always)]
7556    pub fn nonsec18(
7557        self,
7558    ) -> crate::common::RegisterField<
7559        18,
7560        0x1,
7561        1,
7562        0,
7563        lpmsar::Nonsec18,
7564        lpmsar::Nonsec18,
7565        Lpmsar_SPEC,
7566        crate::common::RW,
7567    > {
7568        crate::common::RegisterField::<
7569            18,
7570            0x1,
7571            1,
7572            0,
7573            lpmsar::Nonsec18,
7574            lpmsar::Nonsec18,
7575            Lpmsar_SPEC,
7576            crate::common::RW,
7577        >::from_register(self, 0)
7578    }
7579
7580    #[doc = "Non-secure Attribute bit 19"]
7581    #[inline(always)]
7582    pub fn nonsec19(
7583        self,
7584    ) -> crate::common::RegisterField<
7585        19,
7586        0x1,
7587        1,
7588        0,
7589        lpmsar::Nonsec19,
7590        lpmsar::Nonsec19,
7591        Lpmsar_SPEC,
7592        crate::common::RW,
7593    > {
7594        crate::common::RegisterField::<
7595            19,
7596            0x1,
7597            1,
7598            0,
7599            lpmsar::Nonsec19,
7600            lpmsar::Nonsec19,
7601            Lpmsar_SPEC,
7602            crate::common::RW,
7603        >::from_register(self, 0)
7604    }
7605
7606    #[doc = "Non-secure Attribute bit 21"]
7607    #[inline(always)]
7608    pub fn nonsec21(
7609        self,
7610    ) -> crate::common::RegisterField<
7611        21,
7612        0x1,
7613        1,
7614        0,
7615        lpmsar::Nonsec21,
7616        lpmsar::Nonsec21,
7617        Lpmsar_SPEC,
7618        crate::common::RW,
7619    > {
7620        crate::common::RegisterField::<
7621            21,
7622            0x1,
7623            1,
7624            0,
7625            lpmsar::Nonsec21,
7626            lpmsar::Nonsec21,
7627            Lpmsar_SPEC,
7628            crate::common::RW,
7629        >::from_register(self, 0)
7630    }
7631}
7632impl ::core::default::Default for Lpmsar {
7633    #[inline(always)]
7634    fn default() -> Lpmsar {
7635        <crate::RegValueT<Lpmsar_SPEC> as RegisterValue<_>>::new(0)
7636    }
7637}
7638pub mod lpmsar {
7639
7640    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7641    pub struct Nonsec0_SPEC;
7642    pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
7643    impl Nonsec0 {
7644        #[doc = "Secure"]
7645        pub const _0: Self = Self::new(0);
7646
7647        #[doc = "Non-secure"]
7648        pub const _1: Self = Self::new(1);
7649    }
7650    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7651    pub struct Nonsec1_SPEC;
7652    pub type Nonsec1 = crate::EnumBitfieldStruct<u8, Nonsec1_SPEC>;
7653    impl Nonsec1 {
7654        #[doc = "Secure"]
7655        pub const _0: Self = Self::new(0);
7656
7657        #[doc = "Non-secure"]
7658        pub const _1: Self = Self::new(1);
7659    }
7660    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7661    pub struct Nonsec2_SPEC;
7662    pub type Nonsec2 = crate::EnumBitfieldStruct<u8, Nonsec2_SPEC>;
7663    impl Nonsec2 {
7664        #[doc = "Secure"]
7665        pub const _0: Self = Self::new(0);
7666
7667        #[doc = "Non-secure"]
7668        pub const _1: Self = Self::new(1);
7669    }
7670    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7671    pub struct Nonsec8_SPEC;
7672    pub type Nonsec8 = crate::EnumBitfieldStruct<u8, Nonsec8_SPEC>;
7673    impl Nonsec8 {
7674        #[doc = "Secure"]
7675        pub const _0: Self = Self::new(0);
7676
7677        #[doc = "Non-secure"]
7678        pub const _1: Self = Self::new(1);
7679    }
7680    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7681    pub struct Nonsec17_SPEC;
7682    pub type Nonsec17 = crate::EnumBitfieldStruct<u8, Nonsec17_SPEC>;
7683    impl Nonsec17 {
7684        #[doc = "Secure"]
7685        pub const _0: Self = Self::new(0);
7686
7687        #[doc = "Non-secure"]
7688        pub const _1: Self = Self::new(1);
7689    }
7690    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7691    pub struct Nonsec18_SPEC;
7692    pub type Nonsec18 = crate::EnumBitfieldStruct<u8, Nonsec18_SPEC>;
7693    impl Nonsec18 {
7694        #[doc = "Secure"]
7695        pub const _0: Self = Self::new(0);
7696
7697        #[doc = "Non-secure"]
7698        pub const _1: Self = Self::new(1);
7699    }
7700    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7701    pub struct Nonsec19_SPEC;
7702    pub type Nonsec19 = crate::EnumBitfieldStruct<u8, Nonsec19_SPEC>;
7703    impl Nonsec19 {
7704        #[doc = "Secure"]
7705        pub const _0: Self = Self::new(0);
7706
7707        #[doc = "Non-secure"]
7708        pub const _1: Self = Self::new(1);
7709    }
7710    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7711    pub struct Nonsec21_SPEC;
7712    pub type Nonsec21 = crate::EnumBitfieldStruct<u8, Nonsec21_SPEC>;
7713    impl Nonsec21 {
7714        #[doc = "Secure"]
7715        pub const _0: Self = Self::new(0);
7716
7717        #[doc = "Non-secure"]
7718        pub const _1: Self = Self::new(1);
7719    }
7720}
7721#[doc(hidden)]
7722#[derive(Copy, Clone, Eq, PartialEq)]
7723pub struct Pvdsar_SPEC;
7724impl crate::sealed::RegSpec for Pvdsar_SPEC {
7725    type DataType = u32;
7726}
7727
7728#[doc = "Programable Voltage Detection Security Attribution Register"]
7729pub type Pvdsar = crate::RegValueT<Pvdsar_SPEC>;
7730
7731impl Pvdsar {
7732    #[doc = "Non Secure Attribute bit 0"]
7733    #[inline(always)]
7734    pub fn nonsec0(
7735        self,
7736    ) -> crate::common::RegisterField<
7737        0,
7738        0x1,
7739        1,
7740        0,
7741        pvdsar::Nonsec0,
7742        pvdsar::Nonsec0,
7743        Pvdsar_SPEC,
7744        crate::common::RW,
7745    > {
7746        crate::common::RegisterField::<
7747            0,
7748            0x1,
7749            1,
7750            0,
7751            pvdsar::Nonsec0,
7752            pvdsar::Nonsec0,
7753            Pvdsar_SPEC,
7754            crate::common::RW,
7755        >::from_register(self, 0)
7756    }
7757
7758    #[doc = "Non Secure Attribute bit 1"]
7759    #[inline(always)]
7760    pub fn nonsec1(
7761        self,
7762    ) -> crate::common::RegisterField<
7763        1,
7764        0x1,
7765        1,
7766        0,
7767        pvdsar::Nonsec1,
7768        pvdsar::Nonsec1,
7769        Pvdsar_SPEC,
7770        crate::common::RW,
7771    > {
7772        crate::common::RegisterField::<
7773            1,
7774            0x1,
7775            1,
7776            0,
7777            pvdsar::Nonsec1,
7778            pvdsar::Nonsec1,
7779            Pvdsar_SPEC,
7780            crate::common::RW,
7781        >::from_register(self, 0)
7782    }
7783}
7784impl ::core::default::Default for Pvdsar {
7785    #[inline(always)]
7786    fn default() -> Pvdsar {
7787        <crate::RegValueT<Pvdsar_SPEC> as RegisterValue<_>>::new(0)
7788    }
7789}
7790pub mod pvdsar {
7791
7792    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7793    pub struct Nonsec0_SPEC;
7794    pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
7795    impl Nonsec0 {
7796        #[doc = "Secure"]
7797        pub const _0: Self = Self::new(0);
7798
7799        #[doc = "Non Secure"]
7800        pub const _1: Self = Self::new(1);
7801    }
7802    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7803    pub struct Nonsec1_SPEC;
7804    pub type Nonsec1 = crate::EnumBitfieldStruct<u8, Nonsec1_SPEC>;
7805    impl Nonsec1 {
7806        #[doc = "Secure"]
7807        pub const _0: Self = Self::new(0);
7808
7809        #[doc = "Non Secure"]
7810        pub const _1: Self = Self::new(1);
7811    }
7812}
7813#[doc(hidden)]
7814#[derive(Copy, Clone, Eq, PartialEq)]
7815pub struct Bbfsar_SPEC;
7816impl crate::sealed::RegSpec for Bbfsar_SPEC {
7817    type DataType = u32;
7818}
7819
7820#[doc = "Battery Backup Function Security Attribute Register"]
7821pub type Bbfsar = crate::RegValueT<Bbfsar_SPEC>;
7822
7823impl Bbfsar {
7824    #[doc = "Non Secure Attribute bit 0"]
7825    #[inline(always)]
7826    pub fn nonsec0(
7827        self,
7828    ) -> crate::common::RegisterField<
7829        0,
7830        0x1,
7831        1,
7832        0,
7833        bbfsar::Nonsec0,
7834        bbfsar::Nonsec0,
7835        Bbfsar_SPEC,
7836        crate::common::RW,
7837    > {
7838        crate::common::RegisterField::<
7839            0,
7840            0x1,
7841            1,
7842            0,
7843            bbfsar::Nonsec0,
7844            bbfsar::Nonsec0,
7845            Bbfsar_SPEC,
7846            crate::common::RW,
7847        >::from_register(self, 0)
7848    }
7849
7850    #[doc = "Non Secure Attribute bit 1"]
7851    #[inline(always)]
7852    pub fn nonsec1(
7853        self,
7854    ) -> crate::common::RegisterField<
7855        1,
7856        0x1,
7857        1,
7858        0,
7859        bbfsar::Nonsec1,
7860        bbfsar::Nonsec1,
7861        Bbfsar_SPEC,
7862        crate::common::RW,
7863    > {
7864        crate::common::RegisterField::<
7865            1,
7866            0x1,
7867            1,
7868            0,
7869            bbfsar::Nonsec1,
7870            bbfsar::Nonsec1,
7871            Bbfsar_SPEC,
7872            crate::common::RW,
7873        >::from_register(self, 0)
7874    }
7875
7876    #[doc = "Non Secure Attribute bit 2"]
7877    #[inline(always)]
7878    pub fn nonsec2(
7879        self,
7880    ) -> crate::common::RegisterField<
7881        2,
7882        0x1,
7883        1,
7884        0,
7885        bbfsar::Nonsec2,
7886        bbfsar::Nonsec2,
7887        Bbfsar_SPEC,
7888        crate::common::RW,
7889    > {
7890        crate::common::RegisterField::<
7891            2,
7892            0x1,
7893            1,
7894            0,
7895            bbfsar::Nonsec2,
7896            bbfsar::Nonsec2,
7897            Bbfsar_SPEC,
7898            crate::common::RW,
7899        >::from_register(self, 0)
7900    }
7901
7902    #[doc = "Non Secure Attribute bit 3"]
7903    #[inline(always)]
7904    pub fn nonsec3(
7905        self,
7906    ) -> crate::common::RegisterField<
7907        3,
7908        0x1,
7909        1,
7910        0,
7911        bbfsar::Nonsec3,
7912        bbfsar::Nonsec3,
7913        Bbfsar_SPEC,
7914        crate::common::RW,
7915    > {
7916        crate::common::RegisterField::<
7917            3,
7918            0x1,
7919            1,
7920            0,
7921            bbfsar::Nonsec3,
7922            bbfsar::Nonsec3,
7923            Bbfsar_SPEC,
7924            crate::common::RW,
7925        >::from_register(self, 0)
7926    }
7927
7928    #[doc = "Non Secure Attribute bit 4"]
7929    #[inline(always)]
7930    pub fn nonsec4(
7931        self,
7932    ) -> crate::common::RegisterField<
7933        4,
7934        0x1,
7935        1,
7936        0,
7937        bbfsar::Nonsec4,
7938        bbfsar::Nonsec4,
7939        Bbfsar_SPEC,
7940        crate::common::RW,
7941    > {
7942        crate::common::RegisterField::<
7943            4,
7944            0x1,
7945            1,
7946            0,
7947            bbfsar::Nonsec4,
7948            bbfsar::Nonsec4,
7949            Bbfsar_SPEC,
7950            crate::common::RW,
7951        >::from_register(self, 0)
7952    }
7953}
7954impl ::core::default::Default for Bbfsar {
7955    #[inline(always)]
7956    fn default() -> Bbfsar {
7957        <crate::RegValueT<Bbfsar_SPEC> as RegisterValue<_>>::new(0)
7958    }
7959}
7960pub mod bbfsar {
7961
7962    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7963    pub struct Nonsec0_SPEC;
7964    pub type Nonsec0 = crate::EnumBitfieldStruct<u8, Nonsec0_SPEC>;
7965    impl Nonsec0 {
7966        #[doc = "Secure"]
7967        pub const _0: Self = Self::new(0);
7968
7969        #[doc = "Non Secure"]
7970        pub const _1: Self = Self::new(1);
7971    }
7972    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7973    pub struct Nonsec1_SPEC;
7974    pub type Nonsec1 = crate::EnumBitfieldStruct<u8, Nonsec1_SPEC>;
7975    impl Nonsec1 {
7976        #[doc = "Secure"]
7977        pub const _0: Self = Self::new(0);
7978
7979        #[doc = "Non Secure"]
7980        pub const _1: Self = Self::new(1);
7981    }
7982    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7983    pub struct Nonsec2_SPEC;
7984    pub type Nonsec2 = crate::EnumBitfieldStruct<u8, Nonsec2_SPEC>;
7985    impl Nonsec2 {
7986        #[doc = "Secure"]
7987        pub const _0: Self = Self::new(0);
7988
7989        #[doc = "Non Secure"]
7990        pub const _1: Self = Self::new(1);
7991    }
7992    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
7993    pub struct Nonsec3_SPEC;
7994    pub type Nonsec3 = crate::EnumBitfieldStruct<u8, Nonsec3_SPEC>;
7995    impl Nonsec3 {
7996        #[doc = "Secure"]
7997        pub const _0: Self = Self::new(0);
7998
7999        #[doc = "Non Secure"]
8000        pub const _1: Self = Self::new(1);
8001    }
8002    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8003    pub struct Nonsec4_SPEC;
8004    pub type Nonsec4 = crate::EnumBitfieldStruct<u8, Nonsec4_SPEC>;
8005    impl Nonsec4 {
8006        #[doc = "Secure"]
8007        pub const _0: Self = Self::new(0);
8008
8009        #[doc = "Non Secure"]
8010        pub const _1: Self = Self::new(1);
8011    }
8012}
8013#[doc(hidden)]
8014#[derive(Copy, Clone, Eq, PartialEq)]
8015pub struct Pgcsar_SPEC;
8016impl crate::sealed::RegSpec for Pgcsar_SPEC {
8017    type DataType = u32;
8018}
8019
8020#[doc = "Power Gating Control Security Attribution Register"]
8021pub type Pgcsar = crate::RegValueT<Pgcsar_SPEC>;
8022
8023impl Pgcsar {
8024    #[doc = "Non-secure Attribute bit 1"]
8025    #[inline(always)]
8026    pub fn nonsec1(
8027        self,
8028    ) -> crate::common::RegisterField<
8029        1,
8030        0x1,
8031        1,
8032        0,
8033        pgcsar::Nonsec1,
8034        pgcsar::Nonsec1,
8035        Pgcsar_SPEC,
8036        crate::common::RW,
8037    > {
8038        crate::common::RegisterField::<
8039            1,
8040            0x1,
8041            1,
8042            0,
8043            pgcsar::Nonsec1,
8044            pgcsar::Nonsec1,
8045            Pgcsar_SPEC,
8046            crate::common::RW,
8047        >::from_register(self, 0)
8048    }
8049}
8050impl ::core::default::Default for Pgcsar {
8051    #[inline(always)]
8052    fn default() -> Pgcsar {
8053        <crate::RegValueT<Pgcsar_SPEC> as RegisterValue<_>>::new(0)
8054    }
8055}
8056pub mod pgcsar {
8057
8058    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8059    pub struct Nonsec1_SPEC;
8060    pub type Nonsec1 = crate::EnumBitfieldStruct<u8, Nonsec1_SPEC>;
8061    impl Nonsec1 {
8062        #[doc = "Secure"]
8063        pub const _0: Self = Self::new(0);
8064
8065        #[doc = "Non-secure"]
8066        pub const _1: Self = Self::new(1);
8067    }
8068}
8069#[doc(hidden)]
8070#[derive(Copy, Clone, Eq, PartialEq)]
8071pub struct Dpfsar_SPEC;
8072impl crate::sealed::RegSpec for Dpfsar_SPEC {
8073    type DataType = u32;
8074}
8075
8076#[doc = "Deep Software Standby Interrupt Factor Security Attribution Register"]
8077pub type Dpfsar = crate::RegValueT<Dpfsar_SPEC>;
8078
8079impl Dpfsar {
8080    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 0 to 7)"]
8081    #[inline(always)]
8082    pub fn dpfsa0(
8083        self,
8084    ) -> crate::common::RegisterField<
8085        0,
8086        0x1,
8087        1,
8088        0,
8089        dpfsar::Dpfsa0,
8090        dpfsar::Dpfsa0,
8091        Dpfsar_SPEC,
8092        crate::common::RW,
8093    > {
8094        crate::common::RegisterField::<
8095            0,
8096            0x1,
8097            1,
8098            0,
8099            dpfsar::Dpfsa0,
8100            dpfsar::Dpfsa0,
8101            Dpfsar_SPEC,
8102            crate::common::RW,
8103        >::from_register(self, 0)
8104    }
8105
8106    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 0 to 7)"]
8107    #[inline(always)]
8108    pub fn dpfsa1(
8109        self,
8110    ) -> crate::common::RegisterField<
8111        1,
8112        0x1,
8113        1,
8114        0,
8115        dpfsar::Dpfsa1,
8116        dpfsar::Dpfsa1,
8117        Dpfsar_SPEC,
8118        crate::common::RW,
8119    > {
8120        crate::common::RegisterField::<
8121            1,
8122            0x1,
8123            1,
8124            0,
8125            dpfsar::Dpfsa1,
8126            dpfsar::Dpfsa1,
8127            Dpfsar_SPEC,
8128            crate::common::RW,
8129        >::from_register(self, 0)
8130    }
8131
8132    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 0 to 7)"]
8133    #[inline(always)]
8134    pub fn dpfsa2(
8135        self,
8136    ) -> crate::common::RegisterField<
8137        2,
8138        0x1,
8139        1,
8140        0,
8141        dpfsar::Dpfsa2,
8142        dpfsar::Dpfsa2,
8143        Dpfsar_SPEC,
8144        crate::common::RW,
8145    > {
8146        crate::common::RegisterField::<
8147            2,
8148            0x1,
8149            1,
8150            0,
8151            dpfsar::Dpfsa2,
8152            dpfsar::Dpfsa2,
8153            Dpfsar_SPEC,
8154            crate::common::RW,
8155        >::from_register(self, 0)
8156    }
8157
8158    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 0 to 7)"]
8159    #[inline(always)]
8160    pub fn dpfsa3(
8161        self,
8162    ) -> crate::common::RegisterField<
8163        3,
8164        0x1,
8165        1,
8166        0,
8167        dpfsar::Dpfsa3,
8168        dpfsar::Dpfsa3,
8169        Dpfsar_SPEC,
8170        crate::common::RW,
8171    > {
8172        crate::common::RegisterField::<
8173            3,
8174            0x1,
8175            1,
8176            0,
8177            dpfsar::Dpfsa3,
8178            dpfsar::Dpfsa3,
8179            Dpfsar_SPEC,
8180            crate::common::RW,
8181        >::from_register(self, 0)
8182    }
8183
8184    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 0 to 7)"]
8185    #[inline(always)]
8186    pub fn dpfsa4(
8187        self,
8188    ) -> crate::common::RegisterField<
8189        4,
8190        0x1,
8191        1,
8192        0,
8193        dpfsar::Dpfsa4,
8194        dpfsar::Dpfsa4,
8195        Dpfsar_SPEC,
8196        crate::common::RW,
8197    > {
8198        crate::common::RegisterField::<
8199            4,
8200            0x1,
8201            1,
8202            0,
8203            dpfsar::Dpfsa4,
8204            dpfsar::Dpfsa4,
8205            Dpfsar_SPEC,
8206            crate::common::RW,
8207        >::from_register(self, 0)
8208    }
8209
8210    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 0 to 7)"]
8211    #[inline(always)]
8212    pub fn dpfsa5(
8213        self,
8214    ) -> crate::common::RegisterField<
8215        5,
8216        0x1,
8217        1,
8218        0,
8219        dpfsar::Dpfsa5,
8220        dpfsar::Dpfsa5,
8221        Dpfsar_SPEC,
8222        crate::common::RW,
8223    > {
8224        crate::common::RegisterField::<
8225            5,
8226            0x1,
8227            1,
8228            0,
8229            dpfsar::Dpfsa5,
8230            dpfsar::Dpfsa5,
8231            Dpfsar_SPEC,
8232            crate::common::RW,
8233        >::from_register(self, 0)
8234    }
8235
8236    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 0 to 7)"]
8237    #[inline(always)]
8238    pub fn dpfsa6(
8239        self,
8240    ) -> crate::common::RegisterField<
8241        6,
8242        0x1,
8243        1,
8244        0,
8245        dpfsar::Dpfsa6,
8246        dpfsar::Dpfsa6,
8247        Dpfsar_SPEC,
8248        crate::common::RW,
8249    > {
8250        crate::common::RegisterField::<
8251            6,
8252            0x1,
8253            1,
8254            0,
8255            dpfsar::Dpfsa6,
8256            dpfsar::Dpfsa6,
8257            Dpfsar_SPEC,
8258            crate::common::RW,
8259        >::from_register(self, 0)
8260    }
8261
8262    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 0 to 7)"]
8263    #[inline(always)]
8264    pub fn dpfsa7(
8265        self,
8266    ) -> crate::common::RegisterField<
8267        7,
8268        0x1,
8269        1,
8270        0,
8271        dpfsar::Dpfsa7,
8272        dpfsar::Dpfsa7,
8273        Dpfsar_SPEC,
8274        crate::common::RW,
8275    > {
8276        crate::common::RegisterField::<
8277            7,
8278            0x1,
8279            1,
8280            0,
8281            dpfsar::Dpfsa7,
8282            dpfsar::Dpfsa7,
8283            Dpfsar_SPEC,
8284            crate::common::RW,
8285        >::from_register(self, 0)
8286    }
8287
8288    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 8 to 15)"]
8289    #[inline(always)]
8290    pub fn dpfsa08(
8291        self,
8292    ) -> crate::common::RegisterField<
8293        8,
8294        0x1,
8295        1,
8296        0,
8297        dpfsar::Dpfsa08,
8298        dpfsar::Dpfsa08,
8299        Dpfsar_SPEC,
8300        crate::common::RW,
8301    > {
8302        crate::common::RegisterField::<
8303            8,
8304            0x1,
8305            1,
8306            0,
8307            dpfsar::Dpfsa08,
8308            dpfsar::Dpfsa08,
8309            Dpfsar_SPEC,
8310            crate::common::RW,
8311        >::from_register(self, 0)
8312    }
8313
8314    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 8 to 15)"]
8315    #[inline(always)]
8316    pub fn dpfsa09(
8317        self,
8318    ) -> crate::common::RegisterField<
8319        9,
8320        0x1,
8321        1,
8322        0,
8323        dpfsar::Dpfsa09,
8324        dpfsar::Dpfsa09,
8325        Dpfsar_SPEC,
8326        crate::common::RW,
8327    > {
8328        crate::common::RegisterField::<
8329            9,
8330            0x1,
8331            1,
8332            0,
8333            dpfsar::Dpfsa09,
8334            dpfsar::Dpfsa09,
8335            Dpfsar_SPEC,
8336            crate::common::RW,
8337        >::from_register(self, 0)
8338    }
8339
8340    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 8 to 15)"]
8341    #[inline(always)]
8342    pub fn dpfsa10(
8343        self,
8344    ) -> crate::common::RegisterField<
8345        10,
8346        0x1,
8347        1,
8348        0,
8349        dpfsar::Dpfsa10,
8350        dpfsar::Dpfsa10,
8351        Dpfsar_SPEC,
8352        crate::common::RW,
8353    > {
8354        crate::common::RegisterField::<
8355            10,
8356            0x1,
8357            1,
8358            0,
8359            dpfsar::Dpfsa10,
8360            dpfsar::Dpfsa10,
8361            Dpfsar_SPEC,
8362            crate::common::RW,
8363        >::from_register(self, 0)
8364    }
8365
8366    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 8 to 15)"]
8367    #[inline(always)]
8368    pub fn dpfsa11(
8369        self,
8370    ) -> crate::common::RegisterField<
8371        11,
8372        0x1,
8373        1,
8374        0,
8375        dpfsar::Dpfsa11,
8376        dpfsar::Dpfsa11,
8377        Dpfsar_SPEC,
8378        crate::common::RW,
8379    > {
8380        crate::common::RegisterField::<
8381            11,
8382            0x1,
8383            1,
8384            0,
8385            dpfsar::Dpfsa11,
8386            dpfsar::Dpfsa11,
8387            Dpfsar_SPEC,
8388            crate::common::RW,
8389        >::from_register(self, 0)
8390    }
8391
8392    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 8 to 15)"]
8393    #[inline(always)]
8394    pub fn dpfsa12(
8395        self,
8396    ) -> crate::common::RegisterField<
8397        12,
8398        0x1,
8399        1,
8400        0,
8401        dpfsar::Dpfsa12,
8402        dpfsar::Dpfsa12,
8403        Dpfsar_SPEC,
8404        crate::common::RW,
8405    > {
8406        crate::common::RegisterField::<
8407            12,
8408            0x1,
8409            1,
8410            0,
8411            dpfsar::Dpfsa12,
8412            dpfsar::Dpfsa12,
8413            Dpfsar_SPEC,
8414            crate::common::RW,
8415        >::from_register(self, 0)
8416    }
8417
8418    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 8 to 15)"]
8419    #[inline(always)]
8420    pub fn dpfsa13(
8421        self,
8422    ) -> crate::common::RegisterField<
8423        13,
8424        0x1,
8425        1,
8426        0,
8427        dpfsar::Dpfsa13,
8428        dpfsar::Dpfsa13,
8429        Dpfsar_SPEC,
8430        crate::common::RW,
8431    > {
8432        crate::common::RegisterField::<
8433            13,
8434            0x1,
8435            1,
8436            0,
8437            dpfsar::Dpfsa13,
8438            dpfsar::Dpfsa13,
8439            Dpfsar_SPEC,
8440            crate::common::RW,
8441        >::from_register(self, 0)
8442    }
8443
8444    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 8 to 15)"]
8445    #[inline(always)]
8446    pub fn dpfsa14(
8447        self,
8448    ) -> crate::common::RegisterField<
8449        14,
8450        0x1,
8451        1,
8452        0,
8453        dpfsar::Dpfsa14,
8454        dpfsar::Dpfsa14,
8455        Dpfsar_SPEC,
8456        crate::common::RW,
8457    > {
8458        crate::common::RegisterField::<
8459            14,
8460            0x1,
8461            1,
8462            0,
8463            dpfsar::Dpfsa14,
8464            dpfsar::Dpfsa14,
8465            Dpfsar_SPEC,
8466            crate::common::RW,
8467        >::from_register(self, 0)
8468    }
8469
8470    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit n (n = 8 to 15)"]
8471    #[inline(always)]
8472    pub fn dpfsa15(
8473        self,
8474    ) -> crate::common::RegisterField<
8475        15,
8476        0x1,
8477        1,
8478        0,
8479        dpfsar::Dpfsa15,
8480        dpfsar::Dpfsa15,
8481        Dpfsar_SPEC,
8482        crate::common::RW,
8483    > {
8484        crate::common::RegisterField::<
8485            15,
8486            0x1,
8487            1,
8488            0,
8489            dpfsar::Dpfsa15,
8490            dpfsar::Dpfsa15,
8491            Dpfsar_SPEC,
8492            crate::common::RW,
8493        >::from_register(self, 0)
8494    }
8495
8496    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 16"]
8497    #[inline(always)]
8498    pub fn dpfsa16(
8499        self,
8500    ) -> crate::common::RegisterField<
8501        16,
8502        0x1,
8503        1,
8504        0,
8505        dpfsar::Dpfsa16,
8506        dpfsar::Dpfsa16,
8507        Dpfsar_SPEC,
8508        crate::common::RW,
8509    > {
8510        crate::common::RegisterField::<
8511            16,
8512            0x1,
8513            1,
8514            0,
8515            dpfsar::Dpfsa16,
8516            dpfsar::Dpfsa16,
8517            Dpfsar_SPEC,
8518            crate::common::RW,
8519        >::from_register(self, 0)
8520    }
8521
8522    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 17"]
8523    #[inline(always)]
8524    pub fn dpfsa17(
8525        self,
8526    ) -> crate::common::RegisterField<
8527        17,
8528        0x1,
8529        1,
8530        0,
8531        dpfsar::Dpfsa17,
8532        dpfsar::Dpfsa17,
8533        Dpfsar_SPEC,
8534        crate::common::RW,
8535    > {
8536        crate::common::RegisterField::<
8537            17,
8538            0x1,
8539            1,
8540            0,
8541            dpfsar::Dpfsa17,
8542            dpfsar::Dpfsa17,
8543            Dpfsar_SPEC,
8544            crate::common::RW,
8545        >::from_register(self, 0)
8546    }
8547
8548    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 18"]
8549    #[inline(always)]
8550    pub fn dpfsa18(
8551        self,
8552    ) -> crate::common::RegisterField<
8553        18,
8554        0x1,
8555        1,
8556        0,
8557        dpfsar::Dpfsa18,
8558        dpfsar::Dpfsa18,
8559        Dpfsar_SPEC,
8560        crate::common::RW,
8561    > {
8562        crate::common::RegisterField::<
8563            18,
8564            0x1,
8565            1,
8566            0,
8567            dpfsar::Dpfsa18,
8568            dpfsar::Dpfsa18,
8569            Dpfsar_SPEC,
8570            crate::common::RW,
8571        >::from_register(self, 0)
8572    }
8573
8574    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 19"]
8575    #[inline(always)]
8576    pub fn dpfsa19(
8577        self,
8578    ) -> crate::common::RegisterField<
8579        19,
8580        0x1,
8581        1,
8582        0,
8583        dpfsar::Dpfsa19,
8584        dpfsar::Dpfsa19,
8585        Dpfsar_SPEC,
8586        crate::common::RW,
8587    > {
8588        crate::common::RegisterField::<
8589            19,
8590            0x1,
8591            1,
8592            0,
8593            dpfsar::Dpfsa19,
8594            dpfsar::Dpfsa19,
8595            Dpfsar_SPEC,
8596            crate::common::RW,
8597        >::from_register(self, 0)
8598    }
8599
8600    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 20"]
8601    #[inline(always)]
8602    pub fn dpfsa20(
8603        self,
8604    ) -> crate::common::RegisterField<
8605        20,
8606        0x1,
8607        1,
8608        0,
8609        dpfsar::Dpfsa20,
8610        dpfsar::Dpfsa20,
8611        Dpfsar_SPEC,
8612        crate::common::RW,
8613    > {
8614        crate::common::RegisterField::<
8615            20,
8616            0x1,
8617            1,
8618            0,
8619            dpfsar::Dpfsa20,
8620            dpfsar::Dpfsa20,
8621            Dpfsar_SPEC,
8622            crate::common::RW,
8623        >::from_register(self, 0)
8624    }
8625
8626    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 24"]
8627    #[inline(always)]
8628    pub fn dpfsa24(
8629        self,
8630    ) -> crate::common::RegisterField<
8631        24,
8632        0x1,
8633        1,
8634        0,
8635        dpfsar::Dpfsa24,
8636        dpfsar::Dpfsa24,
8637        Dpfsar_SPEC,
8638        crate::common::RW,
8639    > {
8640        crate::common::RegisterField::<
8641            24,
8642            0x1,
8643            1,
8644            0,
8645            dpfsar::Dpfsa24,
8646            dpfsar::Dpfsa24,
8647            Dpfsar_SPEC,
8648            crate::common::RW,
8649        >::from_register(self, 0)
8650    }
8651
8652    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 26"]
8653    #[inline(always)]
8654    pub fn dpfsa26(
8655        self,
8656    ) -> crate::common::RegisterField<
8657        26,
8658        0x1,
8659        1,
8660        0,
8661        dpfsar::Dpfsa26,
8662        dpfsar::Dpfsa26,
8663        Dpfsar_SPEC,
8664        crate::common::RW,
8665    > {
8666        crate::common::RegisterField::<
8667            26,
8668            0x1,
8669            1,
8670            0,
8671            dpfsar::Dpfsa26,
8672            dpfsar::Dpfsa26,
8673            Dpfsar_SPEC,
8674            crate::common::RW,
8675        >::from_register(self, 0)
8676    }
8677
8678    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 27"]
8679    #[inline(always)]
8680    pub fn dpfsa27(
8681        self,
8682    ) -> crate::common::RegisterField<
8683        27,
8684        0x1,
8685        1,
8686        0,
8687        dpfsar::Dpfsa27,
8688        dpfsar::Dpfsa27,
8689        Dpfsar_SPEC,
8690        crate::common::RW,
8691    > {
8692        crate::common::RegisterField::<
8693            27,
8694            0x1,
8695            1,
8696            0,
8697            dpfsar::Dpfsa27,
8698            dpfsar::Dpfsa27,
8699            Dpfsar_SPEC,
8700            crate::common::RW,
8701        >::from_register(self, 0)
8702    }
8703
8704    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 29"]
8705    #[inline(always)]
8706    pub fn dpfsa29(
8707        self,
8708    ) -> crate::common::RegisterField<
8709        29,
8710        0x1,
8711        1,
8712        0,
8713        dpfsar::Dpfsa29,
8714        dpfsar::Dpfsa29,
8715        Dpfsar_SPEC,
8716        crate::common::RW,
8717    > {
8718        crate::common::RegisterField::<
8719            29,
8720            0x1,
8721            1,
8722            0,
8723            dpfsar::Dpfsa29,
8724            dpfsar::Dpfsa29,
8725            Dpfsar_SPEC,
8726            crate::common::RW,
8727        >::from_register(self, 0)
8728    }
8729
8730    #[doc = "Deep Software Standby Interrupt Factor Security Attribute bit 31"]
8731    #[inline(always)]
8732    pub fn dpfsa31(
8733        self,
8734    ) -> crate::common::RegisterField<
8735        31,
8736        0x1,
8737        1,
8738        0,
8739        dpfsar::Dpfsa31,
8740        dpfsar::Dpfsa31,
8741        Dpfsar_SPEC,
8742        crate::common::RW,
8743    > {
8744        crate::common::RegisterField::<
8745            31,
8746            0x1,
8747            1,
8748            0,
8749            dpfsar::Dpfsa31,
8750            dpfsar::Dpfsa31,
8751            Dpfsar_SPEC,
8752            crate::common::RW,
8753        >::from_register(self, 0)
8754    }
8755}
8756impl ::core::default::Default for Dpfsar {
8757    #[inline(always)]
8758    fn default() -> Dpfsar {
8759        <crate::RegValueT<Dpfsar_SPEC> as RegisterValue<_>>::new(0)
8760    }
8761}
8762pub mod dpfsar {
8763
8764    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8765    pub struct Dpfsa0_SPEC;
8766    pub type Dpfsa0 = crate::EnumBitfieldStruct<u8, Dpfsa0_SPEC>;
8767    impl Dpfsa0 {
8768        #[doc = "Secure"]
8769        pub const _0: Self = Self::new(0);
8770
8771        #[doc = "Non-secure"]
8772        pub const _1: Self = Self::new(1);
8773    }
8774    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8775    pub struct Dpfsa1_SPEC;
8776    pub type Dpfsa1 = crate::EnumBitfieldStruct<u8, Dpfsa1_SPEC>;
8777    impl Dpfsa1 {
8778        #[doc = "Secure"]
8779        pub const _0: Self = Self::new(0);
8780
8781        #[doc = "Non-secure"]
8782        pub const _1: Self = Self::new(1);
8783    }
8784    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8785    pub struct Dpfsa2_SPEC;
8786    pub type Dpfsa2 = crate::EnumBitfieldStruct<u8, Dpfsa2_SPEC>;
8787    impl Dpfsa2 {
8788        #[doc = "Secure"]
8789        pub const _0: Self = Self::new(0);
8790
8791        #[doc = "Non-secure"]
8792        pub const _1: Self = Self::new(1);
8793    }
8794    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8795    pub struct Dpfsa3_SPEC;
8796    pub type Dpfsa3 = crate::EnumBitfieldStruct<u8, Dpfsa3_SPEC>;
8797    impl Dpfsa3 {
8798        #[doc = "Secure"]
8799        pub const _0: Self = Self::new(0);
8800
8801        #[doc = "Non-secure"]
8802        pub const _1: Self = Self::new(1);
8803    }
8804    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8805    pub struct Dpfsa4_SPEC;
8806    pub type Dpfsa4 = crate::EnumBitfieldStruct<u8, Dpfsa4_SPEC>;
8807    impl Dpfsa4 {
8808        #[doc = "Secure"]
8809        pub const _0: Self = Self::new(0);
8810
8811        #[doc = "Non-secure"]
8812        pub const _1: Self = Self::new(1);
8813    }
8814    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8815    pub struct Dpfsa5_SPEC;
8816    pub type Dpfsa5 = crate::EnumBitfieldStruct<u8, Dpfsa5_SPEC>;
8817    impl Dpfsa5 {
8818        #[doc = "Secure"]
8819        pub const _0: Self = Self::new(0);
8820
8821        #[doc = "Non-secure"]
8822        pub const _1: Self = Self::new(1);
8823    }
8824    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8825    pub struct Dpfsa6_SPEC;
8826    pub type Dpfsa6 = crate::EnumBitfieldStruct<u8, Dpfsa6_SPEC>;
8827    impl Dpfsa6 {
8828        #[doc = "Secure"]
8829        pub const _0: Self = Self::new(0);
8830
8831        #[doc = "Non-secure"]
8832        pub const _1: Self = Self::new(1);
8833    }
8834    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8835    pub struct Dpfsa7_SPEC;
8836    pub type Dpfsa7 = crate::EnumBitfieldStruct<u8, Dpfsa7_SPEC>;
8837    impl Dpfsa7 {
8838        #[doc = "Secure"]
8839        pub const _0: Self = Self::new(0);
8840
8841        #[doc = "Non-secure"]
8842        pub const _1: Self = Self::new(1);
8843    }
8844    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8845    pub struct Dpfsa08_SPEC;
8846    pub type Dpfsa08 = crate::EnumBitfieldStruct<u8, Dpfsa08_SPEC>;
8847    impl Dpfsa08 {
8848        #[doc = "Secure"]
8849        pub const _0: Self = Self::new(0);
8850
8851        #[doc = "Non-secure"]
8852        pub const _1: Self = Self::new(1);
8853    }
8854    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8855    pub struct Dpfsa09_SPEC;
8856    pub type Dpfsa09 = crate::EnumBitfieldStruct<u8, Dpfsa09_SPEC>;
8857    impl Dpfsa09 {
8858        #[doc = "Secure"]
8859        pub const _0: Self = Self::new(0);
8860
8861        #[doc = "Non-secure"]
8862        pub const _1: Self = Self::new(1);
8863    }
8864    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8865    pub struct Dpfsa10_SPEC;
8866    pub type Dpfsa10 = crate::EnumBitfieldStruct<u8, Dpfsa10_SPEC>;
8867    impl Dpfsa10 {
8868        #[doc = "Secure"]
8869        pub const _0: Self = Self::new(0);
8870
8871        #[doc = "Non-secure"]
8872        pub const _1: Self = Self::new(1);
8873    }
8874    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8875    pub struct Dpfsa11_SPEC;
8876    pub type Dpfsa11 = crate::EnumBitfieldStruct<u8, Dpfsa11_SPEC>;
8877    impl Dpfsa11 {
8878        #[doc = "Secure"]
8879        pub const _0: Self = Self::new(0);
8880
8881        #[doc = "Non-secure"]
8882        pub const _1: Self = Self::new(1);
8883    }
8884    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8885    pub struct Dpfsa12_SPEC;
8886    pub type Dpfsa12 = crate::EnumBitfieldStruct<u8, Dpfsa12_SPEC>;
8887    impl Dpfsa12 {
8888        #[doc = "Secure"]
8889        pub const _0: Self = Self::new(0);
8890
8891        #[doc = "Non-secure"]
8892        pub const _1: Self = Self::new(1);
8893    }
8894    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8895    pub struct Dpfsa13_SPEC;
8896    pub type Dpfsa13 = crate::EnumBitfieldStruct<u8, Dpfsa13_SPEC>;
8897    impl Dpfsa13 {
8898        #[doc = "Secure"]
8899        pub const _0: Self = Self::new(0);
8900
8901        #[doc = "Non-secure"]
8902        pub const _1: Self = Self::new(1);
8903    }
8904    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8905    pub struct Dpfsa14_SPEC;
8906    pub type Dpfsa14 = crate::EnumBitfieldStruct<u8, Dpfsa14_SPEC>;
8907    impl Dpfsa14 {
8908        #[doc = "Secure"]
8909        pub const _0: Self = Self::new(0);
8910
8911        #[doc = "Non-secure"]
8912        pub const _1: Self = Self::new(1);
8913    }
8914    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8915    pub struct Dpfsa15_SPEC;
8916    pub type Dpfsa15 = crate::EnumBitfieldStruct<u8, Dpfsa15_SPEC>;
8917    impl Dpfsa15 {
8918        #[doc = "Secure"]
8919        pub const _0: Self = Self::new(0);
8920
8921        #[doc = "Non-secure"]
8922        pub const _1: Self = Self::new(1);
8923    }
8924    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8925    pub struct Dpfsa16_SPEC;
8926    pub type Dpfsa16 = crate::EnumBitfieldStruct<u8, Dpfsa16_SPEC>;
8927    impl Dpfsa16 {
8928        #[doc = "Secure"]
8929        pub const _0: Self = Self::new(0);
8930
8931        #[doc = "Non-secure"]
8932        pub const _1: Self = Self::new(1);
8933    }
8934    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8935    pub struct Dpfsa17_SPEC;
8936    pub type Dpfsa17 = crate::EnumBitfieldStruct<u8, Dpfsa17_SPEC>;
8937    impl Dpfsa17 {
8938        #[doc = "Secure"]
8939        pub const _0: Self = Self::new(0);
8940
8941        #[doc = "Non-secure"]
8942        pub const _1: Self = Self::new(1);
8943    }
8944    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8945    pub struct Dpfsa18_SPEC;
8946    pub type Dpfsa18 = crate::EnumBitfieldStruct<u8, Dpfsa18_SPEC>;
8947    impl Dpfsa18 {
8948        #[doc = "Secure"]
8949        pub const _0: Self = Self::new(0);
8950
8951        #[doc = "Non-secure"]
8952        pub const _1: Self = Self::new(1);
8953    }
8954    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8955    pub struct Dpfsa19_SPEC;
8956    pub type Dpfsa19 = crate::EnumBitfieldStruct<u8, Dpfsa19_SPEC>;
8957    impl Dpfsa19 {
8958        #[doc = "Secure"]
8959        pub const _0: Self = Self::new(0);
8960
8961        #[doc = "Non-secure"]
8962        pub const _1: Self = Self::new(1);
8963    }
8964    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8965    pub struct Dpfsa20_SPEC;
8966    pub type Dpfsa20 = crate::EnumBitfieldStruct<u8, Dpfsa20_SPEC>;
8967    impl Dpfsa20 {
8968        #[doc = "Secure"]
8969        pub const _0: Self = Self::new(0);
8970
8971        #[doc = "Non-secure"]
8972        pub const _1: Self = Self::new(1);
8973    }
8974    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8975    pub struct Dpfsa24_SPEC;
8976    pub type Dpfsa24 = crate::EnumBitfieldStruct<u8, Dpfsa24_SPEC>;
8977    impl Dpfsa24 {
8978        #[doc = "Secure"]
8979        pub const _0: Self = Self::new(0);
8980
8981        #[doc = "Non-secure"]
8982        pub const _1: Self = Self::new(1);
8983    }
8984    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8985    pub struct Dpfsa26_SPEC;
8986    pub type Dpfsa26 = crate::EnumBitfieldStruct<u8, Dpfsa26_SPEC>;
8987    impl Dpfsa26 {
8988        #[doc = "Secure"]
8989        pub const _0: Self = Self::new(0);
8990
8991        #[doc = "Non-secure"]
8992        pub const _1: Self = Self::new(1);
8993    }
8994    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
8995    pub struct Dpfsa27_SPEC;
8996    pub type Dpfsa27 = crate::EnumBitfieldStruct<u8, Dpfsa27_SPEC>;
8997    impl Dpfsa27 {
8998        #[doc = "Secure"]
8999        pub const _0: Self = Self::new(0);
9000
9001        #[doc = "Non-secure"]
9002        pub const _1: Self = Self::new(1);
9003    }
9004    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9005    pub struct Dpfsa29_SPEC;
9006    pub type Dpfsa29 = crate::EnumBitfieldStruct<u8, Dpfsa29_SPEC>;
9007    impl Dpfsa29 {
9008        #[doc = "Secure"]
9009        pub const _0: Self = Self::new(0);
9010
9011        #[doc = "Non-secure"]
9012        pub const _1: Self = Self::new(1);
9013    }
9014    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9015    pub struct Dpfsa31_SPEC;
9016    pub type Dpfsa31 = crate::EnumBitfieldStruct<u8, Dpfsa31_SPEC>;
9017    impl Dpfsa31 {
9018        #[doc = "Secure"]
9019        pub const _0: Self = Self::new(0);
9020
9021        #[doc = "Non-secure"]
9022        pub const _1: Self = Self::new(1);
9023    }
9024}
9025#[doc(hidden)]
9026#[derive(Copy, Clone, Eq, PartialEq)]
9027pub struct Rscsar_SPEC;
9028impl crate::sealed::RegSpec for Rscsar_SPEC {
9029    type DataType = u32;
9030}
9031
9032#[doc = "RAM Standby Control Security Attribution Register"]
9033pub type Rscsar = crate::RegValueT<Rscsar_SPEC>;
9034
9035impl Rscsar {
9036    #[doc = "Unnecessary Circuit Control Security Attribution bit n (n = 0 to 1)"]
9037    #[inline(always)]
9038    pub fn rscsa0(
9039        self,
9040    ) -> crate::common::RegisterField<
9041        0,
9042        0x1,
9043        1,
9044        0,
9045        rscsar::Rscsa0,
9046        rscsar::Rscsa0,
9047        Rscsar_SPEC,
9048        crate::common::RW,
9049    > {
9050        crate::common::RegisterField::<
9051            0,
9052            0x1,
9053            1,
9054            0,
9055            rscsar::Rscsa0,
9056            rscsar::Rscsa0,
9057            Rscsar_SPEC,
9058            crate::common::RW,
9059        >::from_register(self, 0)
9060    }
9061
9062    #[doc = "Unnecessary Circuit Control Security Attribution bit n (n = 0 to 1)"]
9063    #[inline(always)]
9064    pub fn rscsa1(
9065        self,
9066    ) -> crate::common::RegisterField<
9067        1,
9068        0x1,
9069        1,
9070        0,
9071        rscsar::Rscsa1,
9072        rscsar::Rscsa1,
9073        Rscsar_SPEC,
9074        crate::common::RW,
9075    > {
9076        crate::common::RegisterField::<
9077            1,
9078            0x1,
9079            1,
9080            0,
9081            rscsar::Rscsa1,
9082            rscsar::Rscsa1,
9083            Rscsar_SPEC,
9084            crate::common::RW,
9085        >::from_register(self, 0)
9086    }
9087
9088    #[doc = "RAM Standby Control Security Attribute bit n (n = 2 to 6)"]
9089    #[inline(always)]
9090    pub fn rscsa2(
9091        self,
9092    ) -> crate::common::RegisterField<
9093        2,
9094        0x1,
9095        1,
9096        0,
9097        rscsar::Rscsa2,
9098        rscsar::Rscsa2,
9099        Rscsar_SPEC,
9100        crate::common::RW,
9101    > {
9102        crate::common::RegisterField::<
9103            2,
9104            0x1,
9105            1,
9106            0,
9107            rscsar::Rscsa2,
9108            rscsar::Rscsa2,
9109            Rscsar_SPEC,
9110            crate::common::RW,
9111        >::from_register(self, 0)
9112    }
9113
9114    #[doc = "RAM Standby Control Security Attribute bit n (n = 2 to 6)"]
9115    #[inline(always)]
9116    pub fn rscsa3(
9117        self,
9118    ) -> crate::common::RegisterField<
9119        3,
9120        0x1,
9121        1,
9122        0,
9123        rscsar::Rscsa3,
9124        rscsar::Rscsa3,
9125        Rscsar_SPEC,
9126        crate::common::RW,
9127    > {
9128        crate::common::RegisterField::<
9129            3,
9130            0x1,
9131            1,
9132            0,
9133            rscsar::Rscsa3,
9134            rscsar::Rscsa3,
9135            Rscsar_SPEC,
9136            crate::common::RW,
9137        >::from_register(self, 0)
9138    }
9139
9140    #[doc = "RAM Standby Control Security Attribute bit n (n = 2 to 6)"]
9141    #[inline(always)]
9142    pub fn rscsa4(
9143        self,
9144    ) -> crate::common::RegisterField<
9145        4,
9146        0x1,
9147        1,
9148        0,
9149        rscsar::Rscsa4,
9150        rscsar::Rscsa4,
9151        Rscsar_SPEC,
9152        crate::common::RW,
9153    > {
9154        crate::common::RegisterField::<
9155            4,
9156            0x1,
9157            1,
9158            0,
9159            rscsar::Rscsa4,
9160            rscsar::Rscsa4,
9161            Rscsar_SPEC,
9162            crate::common::RW,
9163        >::from_register(self, 0)
9164    }
9165
9166    #[doc = "RAM Standby Control Security Attribute bit n (n = 2 to 6)"]
9167    #[inline(always)]
9168    pub fn rscsa5(
9169        self,
9170    ) -> crate::common::RegisterField<
9171        5,
9172        0x1,
9173        1,
9174        0,
9175        rscsar::Rscsa5,
9176        rscsar::Rscsa5,
9177        Rscsar_SPEC,
9178        crate::common::RW,
9179    > {
9180        crate::common::RegisterField::<
9181            5,
9182            0x1,
9183            1,
9184            0,
9185            rscsar::Rscsa5,
9186            rscsar::Rscsa5,
9187            Rscsar_SPEC,
9188            crate::common::RW,
9189        >::from_register(self, 0)
9190    }
9191
9192    #[doc = "RAM Standby Control Security Attribute bit n (n = 2 to 6)"]
9193    #[inline(always)]
9194    pub fn rscsa6(
9195        self,
9196    ) -> crate::common::RegisterField<
9197        6,
9198        0x1,
9199        1,
9200        0,
9201        rscsar::Rscsa6,
9202        rscsar::Rscsa6,
9203        Rscsar_SPEC,
9204        crate::common::RW,
9205    > {
9206        crate::common::RegisterField::<
9207            6,
9208            0x1,
9209            1,
9210            0,
9211            rscsar::Rscsa6,
9212            rscsar::Rscsa6,
9213            Rscsar_SPEC,
9214            crate::common::RW,
9215        >::from_register(self, 0)
9216    }
9217
9218    #[doc = "RAM Standby Control Security Attribute bit n (n = 16)"]
9219    #[inline(always)]
9220    pub fn rscsa16(
9221        self,
9222    ) -> crate::common::RegisterField<
9223        16,
9224        0x1,
9225        1,
9226        0,
9227        rscsar::Rscsa16,
9228        rscsar::Rscsa16,
9229        Rscsar_SPEC,
9230        crate::common::RW,
9231    > {
9232        crate::common::RegisterField::<
9233            16,
9234            0x1,
9235            1,
9236            0,
9237            rscsar::Rscsa16,
9238            rscsar::Rscsa16,
9239            Rscsar_SPEC,
9240            crate::common::RW,
9241        >::from_register(self, 0)
9242    }
9243}
9244impl ::core::default::Default for Rscsar {
9245    #[inline(always)]
9246    fn default() -> Rscsar {
9247        <crate::RegValueT<Rscsar_SPEC> as RegisterValue<_>>::new(0)
9248    }
9249}
9250pub mod rscsar {
9251
9252    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9253    pub struct Rscsa0_SPEC;
9254    pub type Rscsa0 = crate::EnumBitfieldStruct<u8, Rscsa0_SPEC>;
9255    impl Rscsa0 {
9256        #[doc = "Secure"]
9257        pub const _0: Self = Self::new(0);
9258
9259        #[doc = "Non-secure"]
9260        pub const _1: Self = Self::new(1);
9261    }
9262    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9263    pub struct Rscsa1_SPEC;
9264    pub type Rscsa1 = crate::EnumBitfieldStruct<u8, Rscsa1_SPEC>;
9265    impl Rscsa1 {
9266        #[doc = "Secure"]
9267        pub const _0: Self = Self::new(0);
9268
9269        #[doc = "Non-secure"]
9270        pub const _1: Self = Self::new(1);
9271    }
9272    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9273    pub struct Rscsa2_SPEC;
9274    pub type Rscsa2 = crate::EnumBitfieldStruct<u8, Rscsa2_SPEC>;
9275    impl Rscsa2 {
9276        #[doc = "Secure"]
9277        pub const _0: Self = Self::new(0);
9278
9279        #[doc = "Non-secure"]
9280        pub const _1: Self = Self::new(1);
9281    }
9282    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9283    pub struct Rscsa3_SPEC;
9284    pub type Rscsa3 = crate::EnumBitfieldStruct<u8, Rscsa3_SPEC>;
9285    impl Rscsa3 {
9286        #[doc = "Secure"]
9287        pub const _0: Self = Self::new(0);
9288
9289        #[doc = "Non-secure"]
9290        pub const _1: Self = Self::new(1);
9291    }
9292    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9293    pub struct Rscsa4_SPEC;
9294    pub type Rscsa4 = crate::EnumBitfieldStruct<u8, Rscsa4_SPEC>;
9295    impl Rscsa4 {
9296        #[doc = "Secure"]
9297        pub const _0: Self = Self::new(0);
9298
9299        #[doc = "Non-secure"]
9300        pub const _1: Self = Self::new(1);
9301    }
9302    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9303    pub struct Rscsa5_SPEC;
9304    pub type Rscsa5 = crate::EnumBitfieldStruct<u8, Rscsa5_SPEC>;
9305    impl Rscsa5 {
9306        #[doc = "Secure"]
9307        pub const _0: Self = Self::new(0);
9308
9309        #[doc = "Non-secure"]
9310        pub const _1: Self = Self::new(1);
9311    }
9312    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9313    pub struct Rscsa6_SPEC;
9314    pub type Rscsa6 = crate::EnumBitfieldStruct<u8, Rscsa6_SPEC>;
9315    impl Rscsa6 {
9316        #[doc = "Secure"]
9317        pub const _0: Self = Self::new(0);
9318
9319        #[doc = "Non-secure"]
9320        pub const _1: Self = Self::new(1);
9321    }
9322    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9323    pub struct Rscsa16_SPEC;
9324    pub type Rscsa16 = crate::EnumBitfieldStruct<u8, Rscsa16_SPEC>;
9325    impl Rscsa16 {
9326        #[doc = "Secure"]
9327        pub const _0: Self = Self::new(0);
9328
9329        #[doc = "Non-secure"]
9330        pub const _1: Self = Self::new(1);
9331    }
9332}
9333#[doc(hidden)]
9334#[derive(Copy, Clone, Eq, PartialEq)]
9335pub struct PrcrS_SPEC;
9336impl crate::sealed::RegSpec for PrcrS_SPEC {
9337    type DataType = u16;
9338}
9339
9340#[doc = "Protect Register for Secure (PRCR_S)"]
9341pub type PrcrS = crate::RegValueT<PrcrS_SPEC>;
9342
9343impl PrcrS {
9344    #[doc = "Enable writing to the registers related to the clock generation circuit"]
9345    #[inline(always)]
9346    pub fn prc0(
9347        self,
9348    ) -> crate::common::RegisterField<
9349        0,
9350        0x1,
9351        1,
9352        0,
9353        prcr_s::Prc0,
9354        prcr_s::Prc0,
9355        PrcrS_SPEC,
9356        crate::common::RW,
9357    > {
9358        crate::common::RegisterField::<
9359            0,
9360            0x1,
9361            1,
9362            0,
9363            prcr_s::Prc0,
9364            prcr_s::Prc0,
9365            PrcrS_SPEC,
9366            crate::common::RW,
9367        >::from_register(self, 0)
9368    }
9369
9370    #[doc = "Enable writing to the registers related to the low power modes, and the battery backup function"]
9371    #[inline(always)]
9372    pub fn prc1(
9373        self,
9374    ) -> crate::common::RegisterField<
9375        1,
9376        0x1,
9377        1,
9378        0,
9379        prcr_s::Prc1,
9380        prcr_s::Prc1,
9381        PrcrS_SPEC,
9382        crate::common::RW,
9383    > {
9384        crate::common::RegisterField::<
9385            1,
9386            0x1,
9387            1,
9388            0,
9389            prcr_s::Prc1,
9390            prcr_s::Prc1,
9391            PrcrS_SPEC,
9392            crate::common::RW,
9393        >::from_register(self, 0)
9394    }
9395
9396    #[doc = "Enable writing to the registers related to the PVD"]
9397    #[inline(always)]
9398    pub fn prc3(
9399        self,
9400    ) -> crate::common::RegisterField<
9401        3,
9402        0x1,
9403        1,
9404        0,
9405        prcr_s::Prc3,
9406        prcr_s::Prc3,
9407        PrcrS_SPEC,
9408        crate::common::RW,
9409    > {
9410        crate::common::RegisterField::<
9411            3,
9412            0x1,
9413            1,
9414            0,
9415            prcr_s::Prc3,
9416            prcr_s::Prc3,
9417            PrcrS_SPEC,
9418            crate::common::RW,
9419        >::from_register(self, 0)
9420    }
9421
9422    #[inline(always)]
9423    pub fn prc4(
9424        self,
9425    ) -> crate::common::RegisterField<
9426        4,
9427        0x1,
9428        1,
9429        0,
9430        prcr_s::Prc4,
9431        prcr_s::Prc4,
9432        PrcrS_SPEC,
9433        crate::common::RW,
9434    > {
9435        crate::common::RegisterField::<
9436            4,
9437            0x1,
9438            1,
9439            0,
9440            prcr_s::Prc4,
9441            prcr_s::Prc4,
9442            PrcrS_SPEC,
9443            crate::common::RW,
9444        >::from_register(self, 0)
9445    }
9446
9447    #[inline(always)]
9448    pub fn prc5(
9449        self,
9450    ) -> crate::common::RegisterField<
9451        5,
9452        0x1,
9453        1,
9454        0,
9455        prcr_s::Prc5,
9456        prcr_s::Prc5,
9457        PrcrS_SPEC,
9458        crate::common::RW,
9459    > {
9460        crate::common::RegisterField::<
9461            5,
9462            0x1,
9463            1,
9464            0,
9465            prcr_s::Prc5,
9466            prcr_s::Prc5,
9467            PrcrS_SPEC,
9468            crate::common::RW,
9469        >::from_register(self, 0)
9470    }
9471
9472    #[doc = "0xA5: Enables writing to the PRCR_S register."]
9473    #[inline(always)]
9474    pub fn prkey(
9475        self,
9476    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, PrcrS_SPEC, crate::common::W> {
9477        crate::common::RegisterField::<8,0xff,1,0,u8,u8,PrcrS_SPEC,crate::common::W>::from_register(self,0)
9478    }
9479}
9480impl ::core::default::Default for PrcrS {
9481    #[inline(always)]
9482    fn default() -> PrcrS {
9483        <crate::RegValueT<PrcrS_SPEC> as RegisterValue<_>>::new(0)
9484    }
9485}
9486pub mod prcr_s {
9487
9488    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9489    pub struct Prc0_SPEC;
9490    pub type Prc0 = crate::EnumBitfieldStruct<u8, Prc0_SPEC>;
9491    impl Prc0 {
9492        #[doc = "Disable writes"]
9493        pub const _0: Self = Self::new(0);
9494
9495        #[doc = "Enable writes"]
9496        pub const _1: Self = Self::new(1);
9497    }
9498    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9499    pub struct Prc1_SPEC;
9500    pub type Prc1 = crate::EnumBitfieldStruct<u8, Prc1_SPEC>;
9501    impl Prc1 {
9502        #[doc = "Disable writes"]
9503        pub const _0: Self = Self::new(0);
9504
9505        #[doc = "Enable writes"]
9506        pub const _1: Self = Self::new(1);
9507    }
9508    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9509    pub struct Prc3_SPEC;
9510    pub type Prc3 = crate::EnumBitfieldStruct<u8, Prc3_SPEC>;
9511    impl Prc3 {
9512        #[doc = "Disable writes"]
9513        pub const _0: Self = Self::new(0);
9514
9515        #[doc = "Enable writes"]
9516        pub const _1: Self = Self::new(1);
9517    }
9518    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9519    pub struct Prc4_SPEC;
9520    pub type Prc4 = crate::EnumBitfieldStruct<u8, Prc4_SPEC>;
9521    impl Prc4 {
9522        #[doc = "Disable writes"]
9523        pub const _0: Self = Self::new(0);
9524
9525        #[doc = "Enable writes"]
9526        pub const _1: Self = Self::new(1);
9527    }
9528    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9529    pub struct Prc5_SPEC;
9530    pub type Prc5 = crate::EnumBitfieldStruct<u8, Prc5_SPEC>;
9531    impl Prc5 {
9532        #[doc = "Disable writes"]
9533        pub const _0: Self = Self::new(0);
9534
9535        #[doc = "Enable writes"]
9536        pub const _1: Self = Self::new(1);
9537    }
9538}
9539#[doc(hidden)]
9540#[derive(Copy, Clone, Eq, PartialEq)]
9541pub struct Lococr_SPEC;
9542impl crate::sealed::RegSpec for Lococr_SPEC {
9543    type DataType = u8;
9544}
9545
9546#[doc = "Low-Speed On-Chip Oscillator Control Register"]
9547pub type Lococr = crate::RegValueT<Lococr_SPEC>;
9548
9549impl Lococr {
9550    #[doc = "LOCO Stop"]
9551    #[inline(always)]
9552    pub fn lcstp(
9553        self,
9554    ) -> crate::common::RegisterField<
9555        0,
9556        0x1,
9557        1,
9558        0,
9559        lococr::Lcstp,
9560        lococr::Lcstp,
9561        Lococr_SPEC,
9562        crate::common::RW,
9563    > {
9564        crate::common::RegisterField::<
9565            0,
9566            0x1,
9567            1,
9568            0,
9569            lococr::Lcstp,
9570            lococr::Lcstp,
9571            Lococr_SPEC,
9572            crate::common::RW,
9573        >::from_register(self, 0)
9574    }
9575}
9576impl ::core::default::Default for Lococr {
9577    #[inline(always)]
9578    fn default() -> Lococr {
9579        <crate::RegValueT<Lococr_SPEC> as RegisterValue<_>>::new(0)
9580    }
9581}
9582pub mod lococr {
9583
9584    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9585    pub struct Lcstp_SPEC;
9586    pub type Lcstp = crate::EnumBitfieldStruct<u8, Lcstp_SPEC>;
9587    impl Lcstp {
9588        #[doc = "Operate the LOCO clock"]
9589        pub const _0: Self = Self::new(0);
9590
9591        #[doc = "Stop the LOCO clock"]
9592        pub const _1: Self = Self::new(1);
9593    }
9594}
9595#[doc(hidden)]
9596#[derive(Copy, Clone, Eq, PartialEq)]
9597pub struct Locoutcr_SPEC;
9598impl crate::sealed::RegSpec for Locoutcr_SPEC {
9599    type DataType = u8;
9600}
9601
9602#[doc = "LOCO User Trimming Control Register"]
9603pub type Locoutcr = crate::RegValueT<Locoutcr_SPEC>;
9604
9605impl Locoutcr {
9606    #[doc = "LOCO User Trimming"]
9607    #[inline(always)]
9608    pub fn locoutrm(
9609        self,
9610    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Locoutcr_SPEC, crate::common::RW> {
9611        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Locoutcr_SPEC,crate::common::RW>::from_register(self,0)
9612    }
9613}
9614impl ::core::default::Default for Locoutcr {
9615    #[inline(always)]
9616    fn default() -> Locoutcr {
9617        <crate::RegValueT<Locoutcr_SPEC> as RegisterValue<_>>::new(0)
9618    }
9619}
9620
9621#[doc(hidden)]
9622#[derive(Copy, Clone, Eq, PartialEq)]
9623pub struct Dpsbycr_SPEC;
9624impl crate::sealed::RegSpec for Dpsbycr_SPEC {
9625    type DataType = u8;
9626}
9627
9628#[doc = "Deep Software Standby Control Register"]
9629pub type Dpsbycr = crate::RegValueT<Dpsbycr_SPEC>;
9630
9631impl Dpsbycr {
9632    #[inline(always)]
9633    pub fn dcssmode(
9634        self,
9635    ) -> crate::common::RegisterField<
9636        2,
9637        0x1,
9638        1,
9639        0,
9640        dpsbycr::Dcssmode,
9641        dpsbycr::Dcssmode,
9642        Dpsbycr_SPEC,
9643        crate::common::RW,
9644    > {
9645        crate::common::RegisterField::<
9646            2,
9647            0x1,
9648            1,
9649            0,
9650            dpsbycr::Dcssmode,
9651            dpsbycr::Dcssmode,
9652            Dpsbycr_SPEC,
9653            crate::common::RW,
9654        >::from_register(self, 0)
9655    }
9656
9657    #[doc = "Standby SRAM Retention"]
9658    #[inline(always)]
9659    pub fn srkeep(
9660        self,
9661    ) -> crate::common::RegisterField<
9662        4,
9663        0x1,
9664        1,
9665        0,
9666        dpsbycr::Srkeep,
9667        dpsbycr::Srkeep,
9668        Dpsbycr_SPEC,
9669        crate::common::RW,
9670    > {
9671        crate::common::RegisterField::<
9672            4,
9673            0x1,
9674            1,
9675            0,
9676            dpsbycr::Srkeep,
9677            dpsbycr::Srkeep,
9678            Dpsbycr_SPEC,
9679            crate::common::RW,
9680        >::from_register(self, 0)
9681    }
9682
9683    #[doc = "I/O Port Rentention"]
9684    #[inline(always)]
9685    pub fn iokeep(
9686        self,
9687    ) -> crate::common::RegisterField<
9688        6,
9689        0x1,
9690        1,
9691        0,
9692        dpsbycr::Iokeep,
9693        dpsbycr::Iokeep,
9694        Dpsbycr_SPEC,
9695        crate::common::RW,
9696    > {
9697        crate::common::RegisterField::<
9698            6,
9699            0x1,
9700            1,
9701            0,
9702            dpsbycr::Iokeep,
9703            dpsbycr::Iokeep,
9704            Dpsbycr_SPEC,
9705            crate::common::RW,
9706        >::from_register(self, 0)
9707    }
9708}
9709impl ::core::default::Default for Dpsbycr {
9710    #[inline(always)]
9711    fn default() -> Dpsbycr {
9712        <crate::RegValueT<Dpsbycr_SPEC> as RegisterValue<_>>::new(16)
9713    }
9714}
9715pub mod dpsbycr {
9716
9717    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9718    pub struct Dcssmode_SPEC;
9719    pub type Dcssmode = crate::EnumBitfieldStruct<u8, Dcssmode_SPEC>;
9720    impl Dcssmode {
9721        #[doc = "When the Deep Software Standby mode is canceled, the time required to recover is the standard time."]
9722        pub const _0: Self = Self::new(0);
9723
9724        #[doc = "When the Deep Software Standby mode is canceled, the time required to recover is shortened."]
9725        pub const _1: Self = Self::new(1);
9726    }
9727    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9728    pub struct Srkeep_SPEC;
9729    pub type Srkeep = crate::EnumBitfieldStruct<u8, Srkeep_SPEC>;
9730    impl Srkeep {
9731        #[doc = "When entering the Software Standby mode or the Deep Software Standby mode 1, the contents of Standby SRAM are not kept."]
9732        pub const _0: Self = Self::new(0);
9733
9734        #[doc = "When entering the Software Standby mode or the Deep Software Standby mode 1, the contents of Standby SRAM are kept."]
9735        pub const _1: Self = Self::new(1);
9736    }
9737    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9738    pub struct Iokeep_SPEC;
9739    pub type Iokeep = crate::EnumBitfieldStruct<u8, Iokeep_SPEC>;
9740    impl Iokeep {
9741        #[doc = "When the Deep Software Standby mode is canceled, the I/O ports are in the reset state."]
9742        pub const _0: Self = Self::new(0);
9743
9744        #[doc = "When the Deep Software Standby mode is canceled, the I/O ports are in the same state as in the Deep Software Standby mode."]
9745        pub const _1: Self = Self::new(1);
9746    }
9747}
9748#[doc(hidden)]
9749#[derive(Copy, Clone, Eq, PartialEq)]
9750pub struct Dpswcr_SPEC;
9751impl crate::sealed::RegSpec for Dpswcr_SPEC {
9752    type DataType = u8;
9753}
9754
9755#[doc = "Deep Software Standby Wait Control Register"]
9756pub type Dpswcr = crate::RegValueT<Dpswcr_SPEC>;
9757
9758impl Dpswcr {
9759    #[doc = "Deep Software Wait Standby Time Setting Bit"]
9760    #[inline(always)]
9761    pub fn wtsts(
9762        self,
9763    ) -> crate::common::RegisterField<
9764        0,
9765        0xff,
9766        1,
9767        0,
9768        dpswcr::Wtsts,
9769        dpswcr::Wtsts,
9770        Dpswcr_SPEC,
9771        crate::common::RW,
9772    > {
9773        crate::common::RegisterField::<
9774            0,
9775            0xff,
9776            1,
9777            0,
9778            dpswcr::Wtsts,
9779            dpswcr::Wtsts,
9780            Dpswcr_SPEC,
9781            crate::common::RW,
9782        >::from_register(self, 0)
9783    }
9784}
9785impl ::core::default::Default for Dpswcr {
9786    #[inline(always)]
9787    fn default() -> Dpswcr {
9788        <crate::RegValueT<Dpswcr_SPEC> as RegisterValue<_>>::new(11)
9789    }
9790}
9791pub mod dpswcr {
9792
9793    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
9794    pub struct Wtsts_SPEC;
9795    pub type Wtsts = crate::EnumBitfieldStruct<u8, Wtsts_SPEC>;
9796    impl Wtsts {
9797        #[doc = "Wait cycle for fast recovery"]
9798        pub const _0_X_0_B: Self = Self::new(11);
9799
9800        #[doc = "Wait cycle for slow recovery"]
9801        pub const _0_X_9_A: Self = Self::new(154);
9802
9803        #[doc = "Setting prohibited"]
9804        pub const OTHERS: Self = Self::new(0);
9805    }
9806}
9807#[doc(hidden)]
9808#[derive(Copy, Clone, Eq, PartialEq)]
9809pub struct Dpsier0_SPEC;
9810impl crate::sealed::RegSpec for Dpsier0_SPEC {
9811    type DataType = u8;
9812}
9813
9814#[doc = "Deep Software Standby Interrupt Enable Register 0"]
9815pub type Dpsier0 = crate::RegValueT<Dpsier0_SPEC>;
9816
9817impl Dpsier0 {
9818    #[doc = "IRQ0-DS Pin Enable"]
9819    #[inline(always)]
9820    pub fn dirq0e(
9821        self,
9822    ) -> crate::common::RegisterField<
9823        0,
9824        0x1,
9825        1,
9826        0,
9827        dpsier0::Dirq0E,
9828        dpsier0::Dirq0E,
9829        Dpsier0_SPEC,
9830        crate::common::RW,
9831    > {
9832        crate::common::RegisterField::<
9833            0,
9834            0x1,
9835            1,
9836            0,
9837            dpsier0::Dirq0E,
9838            dpsier0::Dirq0E,
9839            Dpsier0_SPEC,
9840            crate::common::RW,
9841        >::from_register(self, 0)
9842    }
9843
9844    #[doc = "IRQ1-DS Pin Enable"]
9845    #[inline(always)]
9846    pub fn dirq1e(
9847        self,
9848    ) -> crate::common::RegisterField<
9849        1,
9850        0x1,
9851        1,
9852        0,
9853        dpsier0::Dirq1E,
9854        dpsier0::Dirq1E,
9855        Dpsier0_SPEC,
9856        crate::common::RW,
9857    > {
9858        crate::common::RegisterField::<
9859            1,
9860            0x1,
9861            1,
9862            0,
9863            dpsier0::Dirq1E,
9864            dpsier0::Dirq1E,
9865            Dpsier0_SPEC,
9866            crate::common::RW,
9867        >::from_register(self, 0)
9868    }
9869
9870    #[doc = "IRQ2-DS Pin Enable"]
9871    #[inline(always)]
9872    pub fn dirq2e(
9873        self,
9874    ) -> crate::common::RegisterField<
9875        2,
9876        0x1,
9877        1,
9878        0,
9879        dpsier0::Dirq2E,
9880        dpsier0::Dirq2E,
9881        Dpsier0_SPEC,
9882        crate::common::RW,
9883    > {
9884        crate::common::RegisterField::<
9885            2,
9886            0x1,
9887            1,
9888            0,
9889            dpsier0::Dirq2E,
9890            dpsier0::Dirq2E,
9891            Dpsier0_SPEC,
9892            crate::common::RW,
9893        >::from_register(self, 0)
9894    }
9895
9896    #[doc = "IRQ3-DS Pin Enable"]
9897    #[inline(always)]
9898    pub fn dirq3e(
9899        self,
9900    ) -> crate::common::RegisterField<
9901        3,
9902        0x1,
9903        1,
9904        0,
9905        dpsier0::Dirq3E,
9906        dpsier0::Dirq3E,
9907        Dpsier0_SPEC,
9908        crate::common::RW,
9909    > {
9910        crate::common::RegisterField::<
9911            3,
9912            0x1,
9913            1,
9914            0,
9915            dpsier0::Dirq3E,
9916            dpsier0::Dirq3E,
9917            Dpsier0_SPEC,
9918            crate::common::RW,
9919        >::from_register(self, 0)
9920    }
9921
9922    #[doc = "IRQ4-DS Pin Enable"]
9923    #[inline(always)]
9924    pub fn dirq4e(
9925        self,
9926    ) -> crate::common::RegisterField<
9927        4,
9928        0x1,
9929        1,
9930        0,
9931        dpsier0::Dirq4E,
9932        dpsier0::Dirq4E,
9933        Dpsier0_SPEC,
9934        crate::common::RW,
9935    > {
9936        crate::common::RegisterField::<
9937            4,
9938            0x1,
9939            1,
9940            0,
9941            dpsier0::Dirq4E,
9942            dpsier0::Dirq4E,
9943            Dpsier0_SPEC,
9944            crate::common::RW,
9945        >::from_register(self, 0)
9946    }
9947
9948    #[doc = "IRQ5-DS Pin Enable"]
9949    #[inline(always)]
9950    pub fn dirq5e(
9951        self,
9952    ) -> crate::common::RegisterField<
9953        5,
9954        0x1,
9955        1,
9956        0,
9957        dpsier0::Dirq5E,
9958        dpsier0::Dirq5E,
9959        Dpsier0_SPEC,
9960        crate::common::RW,
9961    > {
9962        crate::common::RegisterField::<
9963            5,
9964            0x1,
9965            1,
9966            0,
9967            dpsier0::Dirq5E,
9968            dpsier0::Dirq5E,
9969            Dpsier0_SPEC,
9970            crate::common::RW,
9971        >::from_register(self, 0)
9972    }
9973
9974    #[doc = "IRQ6-DS Pin Enable"]
9975    #[inline(always)]
9976    pub fn dirq6e(
9977        self,
9978    ) -> crate::common::RegisterField<
9979        6,
9980        0x1,
9981        1,
9982        0,
9983        dpsier0::Dirq6E,
9984        dpsier0::Dirq6E,
9985        Dpsier0_SPEC,
9986        crate::common::RW,
9987    > {
9988        crate::common::RegisterField::<
9989            6,
9990            0x1,
9991            1,
9992            0,
9993            dpsier0::Dirq6E,
9994            dpsier0::Dirq6E,
9995            Dpsier0_SPEC,
9996            crate::common::RW,
9997        >::from_register(self, 0)
9998    }
9999
10000    #[doc = "IRQ7-DS Pin Enable"]
10001    #[inline(always)]
10002    pub fn dirq7e(
10003        self,
10004    ) -> crate::common::RegisterField<
10005        7,
10006        0x1,
10007        1,
10008        0,
10009        dpsier0::Dirq7E,
10010        dpsier0::Dirq7E,
10011        Dpsier0_SPEC,
10012        crate::common::RW,
10013    > {
10014        crate::common::RegisterField::<
10015            7,
10016            0x1,
10017            1,
10018            0,
10019            dpsier0::Dirq7E,
10020            dpsier0::Dirq7E,
10021            Dpsier0_SPEC,
10022            crate::common::RW,
10023        >::from_register(self, 0)
10024    }
10025}
10026impl ::core::default::Default for Dpsier0 {
10027    #[inline(always)]
10028    fn default() -> Dpsier0 {
10029        <crate::RegValueT<Dpsier0_SPEC> as RegisterValue<_>>::new(0)
10030    }
10031}
10032pub mod dpsier0 {
10033
10034    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10035    pub struct Dirq0E_SPEC;
10036    pub type Dirq0E = crate::EnumBitfieldStruct<u8, Dirq0E_SPEC>;
10037    impl Dirq0E {
10038        #[doc = "Canceling Deep Software Standby mode is disabled"]
10039        pub const _0: Self = Self::new(0);
10040
10041        #[doc = "Canceling Deep Software Standby mode is enabled"]
10042        pub const _1: Self = Self::new(1);
10043    }
10044    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10045    pub struct Dirq1E_SPEC;
10046    pub type Dirq1E = crate::EnumBitfieldStruct<u8, Dirq1E_SPEC>;
10047    impl Dirq1E {
10048        #[doc = "Canceling Deep Software Standby mode is disabled"]
10049        pub const _0: Self = Self::new(0);
10050
10051        #[doc = "Canceling Deep Software Standby mode is enabled"]
10052        pub const _1: Self = Self::new(1);
10053    }
10054    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10055    pub struct Dirq2E_SPEC;
10056    pub type Dirq2E = crate::EnumBitfieldStruct<u8, Dirq2E_SPEC>;
10057    impl Dirq2E {
10058        #[doc = "Canceling Deep Software Standby mode is disabled"]
10059        pub const _0: Self = Self::new(0);
10060
10061        #[doc = "Canceling Deep Software Standby mode is enabled"]
10062        pub const _1: Self = Self::new(1);
10063    }
10064    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10065    pub struct Dirq3E_SPEC;
10066    pub type Dirq3E = crate::EnumBitfieldStruct<u8, Dirq3E_SPEC>;
10067    impl Dirq3E {
10068        #[doc = "Canceling Deep Software Standby mode is disabled"]
10069        pub const _0: Self = Self::new(0);
10070
10071        #[doc = "Canceling Deep Software Standby mode is enabled"]
10072        pub const _1: Self = Self::new(1);
10073    }
10074    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10075    pub struct Dirq4E_SPEC;
10076    pub type Dirq4E = crate::EnumBitfieldStruct<u8, Dirq4E_SPEC>;
10077    impl Dirq4E {
10078        #[doc = "Canceling Deep Software Standby mode is disabled"]
10079        pub const _0: Self = Self::new(0);
10080
10081        #[doc = "Canceling Deep Software Standby mode is enabled"]
10082        pub const _1: Self = Self::new(1);
10083    }
10084    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10085    pub struct Dirq5E_SPEC;
10086    pub type Dirq5E = crate::EnumBitfieldStruct<u8, Dirq5E_SPEC>;
10087    impl Dirq5E {
10088        #[doc = "Canceling Deep Software Standby mode is disabled"]
10089        pub const _0: Self = Self::new(0);
10090
10091        #[doc = "Canceling Deep Software Standby mode is enabled"]
10092        pub const _1: Self = Self::new(1);
10093    }
10094    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10095    pub struct Dirq6E_SPEC;
10096    pub type Dirq6E = crate::EnumBitfieldStruct<u8, Dirq6E_SPEC>;
10097    impl Dirq6E {
10098        #[doc = "Canceling Deep Software Standby mode is disabled"]
10099        pub const _0: Self = Self::new(0);
10100
10101        #[doc = "Canceling Deep Software Standby mode is enabled"]
10102        pub const _1: Self = Self::new(1);
10103    }
10104    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10105    pub struct Dirq7E_SPEC;
10106    pub type Dirq7E = crate::EnumBitfieldStruct<u8, Dirq7E_SPEC>;
10107    impl Dirq7E {
10108        #[doc = "Canceling Deep Software Standby mode is disabled"]
10109        pub const _0: Self = Self::new(0);
10110
10111        #[doc = "Canceling Deep Software Standby mode is enabled"]
10112        pub const _1: Self = Self::new(1);
10113    }
10114}
10115#[doc(hidden)]
10116#[derive(Copy, Clone, Eq, PartialEq)]
10117pub struct Dpsier1_SPEC;
10118impl crate::sealed::RegSpec for Dpsier1_SPEC {
10119    type DataType = u8;
10120}
10121
10122#[doc = "Deep Software Standby Interrupt Enable Register 1"]
10123pub type Dpsier1 = crate::RegValueT<Dpsier1_SPEC>;
10124
10125impl Dpsier1 {
10126    #[doc = "IRQ8-DS Pin Enable"]
10127    #[inline(always)]
10128    pub fn dirq8e(
10129        self,
10130    ) -> crate::common::RegisterField<
10131        0,
10132        0x1,
10133        1,
10134        0,
10135        dpsier1::Dirq8E,
10136        dpsier1::Dirq8E,
10137        Dpsier1_SPEC,
10138        crate::common::RW,
10139    > {
10140        crate::common::RegisterField::<
10141            0,
10142            0x1,
10143            1,
10144            0,
10145            dpsier1::Dirq8E,
10146            dpsier1::Dirq8E,
10147            Dpsier1_SPEC,
10148            crate::common::RW,
10149        >::from_register(self, 0)
10150    }
10151
10152    #[doc = "IRQ9-DS Pin Enable"]
10153    #[inline(always)]
10154    pub fn dirq9e(
10155        self,
10156    ) -> crate::common::RegisterField<
10157        1,
10158        0x1,
10159        1,
10160        0,
10161        dpsier1::Dirq9E,
10162        dpsier1::Dirq9E,
10163        Dpsier1_SPEC,
10164        crate::common::RW,
10165    > {
10166        crate::common::RegisterField::<
10167            1,
10168            0x1,
10169            1,
10170            0,
10171            dpsier1::Dirq9E,
10172            dpsier1::Dirq9E,
10173            Dpsier1_SPEC,
10174            crate::common::RW,
10175        >::from_register(self, 0)
10176    }
10177
10178    #[doc = "IRQ10-DS Pin Enable"]
10179    #[inline(always)]
10180    pub fn dirq10e(
10181        self,
10182    ) -> crate::common::RegisterField<
10183        2,
10184        0x1,
10185        1,
10186        0,
10187        dpsier1::Dirq10E,
10188        dpsier1::Dirq10E,
10189        Dpsier1_SPEC,
10190        crate::common::RW,
10191    > {
10192        crate::common::RegisterField::<
10193            2,
10194            0x1,
10195            1,
10196            0,
10197            dpsier1::Dirq10E,
10198            dpsier1::Dirq10E,
10199            Dpsier1_SPEC,
10200            crate::common::RW,
10201        >::from_register(self, 0)
10202    }
10203
10204    #[doc = "IRQ11-DS Pin Enable"]
10205    #[inline(always)]
10206    pub fn dirq11e(
10207        self,
10208    ) -> crate::common::RegisterField<
10209        3,
10210        0x1,
10211        1,
10212        0,
10213        dpsier1::Dirq11E,
10214        dpsier1::Dirq11E,
10215        Dpsier1_SPEC,
10216        crate::common::RW,
10217    > {
10218        crate::common::RegisterField::<
10219            3,
10220            0x1,
10221            1,
10222            0,
10223            dpsier1::Dirq11E,
10224            dpsier1::Dirq11E,
10225            Dpsier1_SPEC,
10226            crate::common::RW,
10227        >::from_register(self, 0)
10228    }
10229
10230    #[doc = "IRQ12-DS Pin Enable"]
10231    #[inline(always)]
10232    pub fn dirq12e(
10233        self,
10234    ) -> crate::common::RegisterField<
10235        4,
10236        0x1,
10237        1,
10238        0,
10239        dpsier1::Dirq12E,
10240        dpsier1::Dirq12E,
10241        Dpsier1_SPEC,
10242        crate::common::RW,
10243    > {
10244        crate::common::RegisterField::<
10245            4,
10246            0x1,
10247            1,
10248            0,
10249            dpsier1::Dirq12E,
10250            dpsier1::Dirq12E,
10251            Dpsier1_SPEC,
10252            crate::common::RW,
10253        >::from_register(self, 0)
10254    }
10255
10256    #[doc = "IRQ13-DS Pin Enable"]
10257    #[inline(always)]
10258    pub fn dirq13e(
10259        self,
10260    ) -> crate::common::RegisterField<
10261        5,
10262        0x1,
10263        1,
10264        0,
10265        dpsier1::Dirq13E,
10266        dpsier1::Dirq13E,
10267        Dpsier1_SPEC,
10268        crate::common::RW,
10269    > {
10270        crate::common::RegisterField::<
10271            5,
10272            0x1,
10273            1,
10274            0,
10275            dpsier1::Dirq13E,
10276            dpsier1::Dirq13E,
10277            Dpsier1_SPEC,
10278            crate::common::RW,
10279        >::from_register(self, 0)
10280    }
10281
10282    #[doc = "IRQ14-DS Pin Enable"]
10283    #[inline(always)]
10284    pub fn dirq14e(
10285        self,
10286    ) -> crate::common::RegisterField<
10287        6,
10288        0x1,
10289        1,
10290        0,
10291        dpsier1::Dirq14E,
10292        dpsier1::Dirq14E,
10293        Dpsier1_SPEC,
10294        crate::common::RW,
10295    > {
10296        crate::common::RegisterField::<
10297            6,
10298            0x1,
10299            1,
10300            0,
10301            dpsier1::Dirq14E,
10302            dpsier1::Dirq14E,
10303            Dpsier1_SPEC,
10304            crate::common::RW,
10305        >::from_register(self, 0)
10306    }
10307
10308    #[doc = "IRQ15-DS Pin Enable"]
10309    #[inline(always)]
10310    pub fn dirq15e(
10311        self,
10312    ) -> crate::common::RegisterField<
10313        7,
10314        0x1,
10315        1,
10316        0,
10317        dpsier1::Dirq15E,
10318        dpsier1::Dirq15E,
10319        Dpsier1_SPEC,
10320        crate::common::RW,
10321    > {
10322        crate::common::RegisterField::<
10323            7,
10324            0x1,
10325            1,
10326            0,
10327            dpsier1::Dirq15E,
10328            dpsier1::Dirq15E,
10329            Dpsier1_SPEC,
10330            crate::common::RW,
10331        >::from_register(self, 0)
10332    }
10333}
10334impl ::core::default::Default for Dpsier1 {
10335    #[inline(always)]
10336    fn default() -> Dpsier1 {
10337        <crate::RegValueT<Dpsier1_SPEC> as RegisterValue<_>>::new(0)
10338    }
10339}
10340pub mod dpsier1 {
10341
10342    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10343    pub struct Dirq8E_SPEC;
10344    pub type Dirq8E = crate::EnumBitfieldStruct<u8, Dirq8E_SPEC>;
10345    impl Dirq8E {
10346        #[doc = "Canceling Deep Software Standby mode is disabled"]
10347        pub const _0: Self = Self::new(0);
10348
10349        #[doc = "Canceling Deep Software Standby mode is enabled"]
10350        pub const _1: Self = Self::new(1);
10351    }
10352    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10353    pub struct Dirq9E_SPEC;
10354    pub type Dirq9E = crate::EnumBitfieldStruct<u8, Dirq9E_SPEC>;
10355    impl Dirq9E {
10356        #[doc = "Canceling Deep Software Standby mode is disabled"]
10357        pub const _0: Self = Self::new(0);
10358
10359        #[doc = "Canceling Deep Software Standby mode is enabled"]
10360        pub const _1: Self = Self::new(1);
10361    }
10362    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10363    pub struct Dirq10E_SPEC;
10364    pub type Dirq10E = crate::EnumBitfieldStruct<u8, Dirq10E_SPEC>;
10365    impl Dirq10E {
10366        #[doc = "Canceling Deep Software Standby mode is disabled"]
10367        pub const _0: Self = Self::new(0);
10368
10369        #[doc = "Canceling Deep Software Standby mode is enabled"]
10370        pub const _1: Self = Self::new(1);
10371    }
10372    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10373    pub struct Dirq11E_SPEC;
10374    pub type Dirq11E = crate::EnumBitfieldStruct<u8, Dirq11E_SPEC>;
10375    impl Dirq11E {
10376        #[doc = "Canceling Deep Software Standby mode is disabled"]
10377        pub const _0: Self = Self::new(0);
10378
10379        #[doc = "Canceling Deep Software Standby mode is enabled"]
10380        pub const _1: Self = Self::new(1);
10381    }
10382    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10383    pub struct Dirq12E_SPEC;
10384    pub type Dirq12E = crate::EnumBitfieldStruct<u8, Dirq12E_SPEC>;
10385    impl Dirq12E {
10386        #[doc = "Canceling Deep Software Standby mode is disabled"]
10387        pub const _0: Self = Self::new(0);
10388
10389        #[doc = "Canceling Deep Software Standby mode is enabled"]
10390        pub const _1: Self = Self::new(1);
10391    }
10392    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10393    pub struct Dirq13E_SPEC;
10394    pub type Dirq13E = crate::EnumBitfieldStruct<u8, Dirq13E_SPEC>;
10395    impl Dirq13E {
10396        #[doc = "Canceling Deep Software Standby mode is disabled"]
10397        pub const _0: Self = Self::new(0);
10398
10399        #[doc = "Canceling Deep Software Standby mode is enabled"]
10400        pub const _1: Self = Self::new(1);
10401    }
10402    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10403    pub struct Dirq14E_SPEC;
10404    pub type Dirq14E = crate::EnumBitfieldStruct<u8, Dirq14E_SPEC>;
10405    impl Dirq14E {
10406        #[doc = "Canceling Deep Software Standby mode is disabled"]
10407        pub const _0: Self = Self::new(0);
10408
10409        #[doc = "Canceling Deep Software Standby mode is enabled"]
10410        pub const _1: Self = Self::new(1);
10411    }
10412    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10413    pub struct Dirq15E_SPEC;
10414    pub type Dirq15E = crate::EnumBitfieldStruct<u8, Dirq15E_SPEC>;
10415    impl Dirq15E {
10416        #[doc = "Canceling Deep Software Standby mode is disabled"]
10417        pub const _0: Self = Self::new(0);
10418
10419        #[doc = "Canceling Deep Software Standby mode is enabled"]
10420        pub const _1: Self = Self::new(1);
10421    }
10422}
10423#[doc(hidden)]
10424#[derive(Copy, Clone, Eq, PartialEq)]
10425pub struct Dpsier2_SPEC;
10426impl crate::sealed::RegSpec for Dpsier2_SPEC {
10427    type DataType = u8;
10428}
10429
10430#[doc = "Deep Software Standby Interrupt Enable Register 2"]
10431pub type Dpsier2 = crate::RegValueT<Dpsier2_SPEC>;
10432
10433impl Dpsier2 {
10434    #[doc = "PVD1 Deep Software Standby Cancel Signal Enable"]
10435    #[inline(always)]
10436    pub fn dpvd1ie(
10437        self,
10438    ) -> crate::common::RegisterField<
10439        0,
10440        0x1,
10441        1,
10442        0,
10443        dpsier2::Dpvd1Ie,
10444        dpsier2::Dpvd1Ie,
10445        Dpsier2_SPEC,
10446        crate::common::RW,
10447    > {
10448        crate::common::RegisterField::<
10449            0,
10450            0x1,
10451            1,
10452            0,
10453            dpsier2::Dpvd1Ie,
10454            dpsier2::Dpvd1Ie,
10455            Dpsier2_SPEC,
10456            crate::common::RW,
10457        >::from_register(self, 0)
10458    }
10459
10460    #[doc = "PVD2 Deep Software Standby Cancel Signal Enable"]
10461    #[inline(always)]
10462    pub fn dpvd2ie(
10463        self,
10464    ) -> crate::common::RegisterField<
10465        1,
10466        0x1,
10467        1,
10468        0,
10469        dpsier2::Dpvd2Ie,
10470        dpsier2::Dpvd2Ie,
10471        Dpsier2_SPEC,
10472        crate::common::RW,
10473    > {
10474        crate::common::RegisterField::<
10475            1,
10476            0x1,
10477            1,
10478            0,
10479            dpsier2::Dpvd2Ie,
10480            dpsier2::Dpvd2Ie,
10481            Dpsier2_SPEC,
10482            crate::common::RW,
10483        >::from_register(self, 0)
10484    }
10485
10486    #[doc = "RTC Interval interrupt Deep Software Standby Cancel Signal Enable"]
10487    #[inline(always)]
10488    pub fn drtciie(
10489        self,
10490    ) -> crate::common::RegisterField<
10491        2,
10492        0x1,
10493        1,
10494        0,
10495        dpsier2::Drtciie,
10496        dpsier2::Drtciie,
10497        Dpsier2_SPEC,
10498        crate::common::RW,
10499    > {
10500        crate::common::RegisterField::<
10501            2,
10502            0x1,
10503            1,
10504            0,
10505            dpsier2::Drtciie,
10506            dpsier2::Drtciie,
10507            Dpsier2_SPEC,
10508            crate::common::RW,
10509        >::from_register(self, 0)
10510    }
10511
10512    #[doc = "RTC Alarm interrupt Deep Software Standby Cancel Signal Enable"]
10513    #[inline(always)]
10514    pub fn drtcaie(
10515        self,
10516    ) -> crate::common::RegisterField<
10517        3,
10518        0x1,
10519        1,
10520        0,
10521        dpsier2::Drtcaie,
10522        dpsier2::Drtcaie,
10523        Dpsier2_SPEC,
10524        crate::common::RW,
10525    > {
10526        crate::common::RegisterField::<
10527            3,
10528            0x1,
10529            1,
10530            0,
10531            dpsier2::Drtcaie,
10532            dpsier2::Drtcaie,
10533            Dpsier2_SPEC,
10534            crate::common::RW,
10535        >::from_register(self, 0)
10536    }
10537
10538    #[doc = "NMI Pin Deep Software Standby Cancel Signal Enable"]
10539    #[inline(always)]
10540    pub fn dnmie(
10541        self,
10542    ) -> crate::common::RegisterField<
10543        4,
10544        0x1,
10545        1,
10546        0,
10547        dpsier2::Dnmie,
10548        dpsier2::Dnmie,
10549        Dpsier2_SPEC,
10550        crate::common::RW,
10551    > {
10552        crate::common::RegisterField::<
10553            4,
10554            0x1,
10555            1,
10556            0,
10557            dpsier2::Dnmie,
10558            dpsier2::Dnmie,
10559            Dpsier2_SPEC,
10560            crate::common::RW,
10561        >::from_register(self, 0)
10562    }
10563}
10564impl ::core::default::Default for Dpsier2 {
10565    #[inline(always)]
10566    fn default() -> Dpsier2 {
10567        <crate::RegValueT<Dpsier2_SPEC> as RegisterValue<_>>::new(0)
10568    }
10569}
10570pub mod dpsier2 {
10571
10572    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10573    pub struct Dpvd1Ie_SPEC;
10574    pub type Dpvd1Ie = crate::EnumBitfieldStruct<u8, Dpvd1Ie_SPEC>;
10575    impl Dpvd1Ie {
10576        #[doc = "Canceling Deep Software Standby mode is disabled"]
10577        pub const _0: Self = Self::new(0);
10578
10579        #[doc = "Canceling Deep Software Standby mode is enabled"]
10580        pub const _1: Self = Self::new(1);
10581    }
10582    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10583    pub struct Dpvd2Ie_SPEC;
10584    pub type Dpvd2Ie = crate::EnumBitfieldStruct<u8, Dpvd2Ie_SPEC>;
10585    impl Dpvd2Ie {
10586        #[doc = "Canceling Deep Software Standby mode is disabled"]
10587        pub const _0: Self = Self::new(0);
10588
10589        #[doc = "Canceling Deep Software Standby mode is enabled"]
10590        pub const _1: Self = Self::new(1);
10591    }
10592    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10593    pub struct Drtciie_SPEC;
10594    pub type Drtciie = crate::EnumBitfieldStruct<u8, Drtciie_SPEC>;
10595    impl Drtciie {
10596        #[doc = "Canceling Deep Software Standby mode is disabled"]
10597        pub const _0: Self = Self::new(0);
10598
10599        #[doc = "Canceling Deep Software Standby mode is enabled"]
10600        pub const _1: Self = Self::new(1);
10601    }
10602    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10603    pub struct Drtcaie_SPEC;
10604    pub type Drtcaie = crate::EnumBitfieldStruct<u8, Drtcaie_SPEC>;
10605    impl Drtcaie {
10606        #[doc = "Canceling Deep Software Standby mode is disabled"]
10607        pub const _0: Self = Self::new(0);
10608
10609        #[doc = "Canceling Deep Software Standby mode is enabled"]
10610        pub const _1: Self = Self::new(1);
10611    }
10612    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10613    pub struct Dnmie_SPEC;
10614    pub type Dnmie = crate::EnumBitfieldStruct<u8, Dnmie_SPEC>;
10615    impl Dnmie {
10616        #[doc = "Canceling Deep Software Standby mode is disabled"]
10617        pub const _0: Self = Self::new(0);
10618
10619        #[doc = "Canceling Deep Software Standby mode is enabled"]
10620        pub const _1: Self = Self::new(1);
10621    }
10622}
10623#[doc(hidden)]
10624#[derive(Copy, Clone, Eq, PartialEq)]
10625pub struct Dpsier3_SPEC;
10626impl crate::sealed::RegSpec for Dpsier3_SPEC {
10627    type DataType = u8;
10628}
10629
10630#[doc = "Deep Software Standby Interrupt Enable Register 3"]
10631pub type Dpsier3 = crate::RegValueT<Dpsier3_SPEC>;
10632
10633impl Dpsier3 {
10634    #[doc = "USBFS Suspend/Resume Deep Software Standby Cancel Signal Enable"]
10635    #[inline(always)]
10636    pub fn dusbfsie(
10637        self,
10638    ) -> crate::common::RegisterField<
10639        0,
10640        0x1,
10641        1,
10642        0,
10643        dpsier3::Dusbfsie,
10644        dpsier3::Dusbfsie,
10645        Dpsier3_SPEC,
10646        crate::common::RW,
10647    > {
10648        crate::common::RegisterField::<
10649            0,
10650            0x1,
10651            1,
10652            0,
10653            dpsier3::Dusbfsie,
10654            dpsier3::Dusbfsie,
10655            Dpsier3_SPEC,
10656            crate::common::RW,
10657        >::from_register(self, 0)
10658    }
10659
10660    #[doc = "ULPT0 Overflow Deep Software Standby Cancel Signal Enable"]
10661    #[inline(always)]
10662    pub fn dulpt0ie(
10663        self,
10664    ) -> crate::common::RegisterField<
10665        2,
10666        0x1,
10667        1,
10668        0,
10669        dpsier3::Dulpt0Ie,
10670        dpsier3::Dulpt0Ie,
10671        Dpsier3_SPEC,
10672        crate::common::RW,
10673    > {
10674        crate::common::RegisterField::<
10675            2,
10676            0x1,
10677            1,
10678            0,
10679            dpsier3::Dulpt0Ie,
10680            dpsier3::Dulpt0Ie,
10681            Dpsier3_SPEC,
10682            crate::common::RW,
10683        >::from_register(self, 0)
10684    }
10685
10686    #[doc = "ULPT1 Overflow Deep Software Standby Cancel Signal Enable"]
10687    #[inline(always)]
10688    pub fn dulpt1ie(
10689        self,
10690    ) -> crate::common::RegisterField<
10691        3,
10692        0x1,
10693        1,
10694        0,
10695        dpsier3::Dulpt1Ie,
10696        dpsier3::Dulpt1Ie,
10697        Dpsier3_SPEC,
10698        crate::common::RW,
10699    > {
10700        crate::common::RegisterField::<
10701            3,
10702            0x1,
10703            1,
10704            0,
10705            dpsier3::Dulpt1Ie,
10706            dpsier3::Dulpt1Ie,
10707            Dpsier3_SPEC,
10708            crate::common::RW,
10709        >::from_register(self, 0)
10710    }
10711
10712    #[doc = "IWDT Underflow Deep Software Standby Cancel Signal Enable"]
10713    #[inline(always)]
10714    pub fn diwdtie(
10715        self,
10716    ) -> crate::common::RegisterField<
10717        5,
10718        0x1,
10719        1,
10720        0,
10721        dpsier3::Diwdtie,
10722        dpsier3::Diwdtie,
10723        Dpsier3_SPEC,
10724        crate::common::RW,
10725    > {
10726        crate::common::RegisterField::<
10727            5,
10728            0x1,
10729            1,
10730            0,
10731            dpsier3::Diwdtie,
10732            dpsier3::Diwdtie,
10733            Dpsier3_SPEC,
10734            crate::common::RW,
10735        >::from_register(self, 0)
10736    }
10737
10738    #[doc = "VBATT Tamper Detection Deep Software Standby Cancel Signal Enable"]
10739    #[inline(always)]
10740    pub fn dvbattadie(
10741        self,
10742    ) -> crate::common::RegisterField<
10743        7,
10744        0x1,
10745        1,
10746        0,
10747        dpsier3::Dvbattadie,
10748        dpsier3::Dvbattadie,
10749        Dpsier3_SPEC,
10750        crate::common::RW,
10751    > {
10752        crate::common::RegisterField::<
10753            7,
10754            0x1,
10755            1,
10756            0,
10757            dpsier3::Dvbattadie,
10758            dpsier3::Dvbattadie,
10759            Dpsier3_SPEC,
10760            crate::common::RW,
10761        >::from_register(self, 0)
10762    }
10763}
10764impl ::core::default::Default for Dpsier3 {
10765    #[inline(always)]
10766    fn default() -> Dpsier3 {
10767        <crate::RegValueT<Dpsier3_SPEC> as RegisterValue<_>>::new(0)
10768    }
10769}
10770pub mod dpsier3 {
10771
10772    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10773    pub struct Dusbfsie_SPEC;
10774    pub type Dusbfsie = crate::EnumBitfieldStruct<u8, Dusbfsie_SPEC>;
10775    impl Dusbfsie {
10776        #[doc = "Canceling Deep Software Standby mode is disabled"]
10777        pub const _0: Self = Self::new(0);
10778
10779        #[doc = "Canceling Deep Software Standby mode is enabled"]
10780        pub const _1: Self = Self::new(1);
10781    }
10782    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10783    pub struct Dulpt0Ie_SPEC;
10784    pub type Dulpt0Ie = crate::EnumBitfieldStruct<u8, Dulpt0Ie_SPEC>;
10785    impl Dulpt0Ie {
10786        #[doc = "Canceling Deep Software Standby mode is disabled"]
10787        pub const _0: Self = Self::new(0);
10788
10789        #[doc = "Canceling Deep Software Standby mode is enabled"]
10790        pub const _1: Self = Self::new(1);
10791    }
10792    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10793    pub struct Dulpt1Ie_SPEC;
10794    pub type Dulpt1Ie = crate::EnumBitfieldStruct<u8, Dulpt1Ie_SPEC>;
10795    impl Dulpt1Ie {
10796        #[doc = "Canceling Deep Software Standby mode is disabled"]
10797        pub const _0: Self = Self::new(0);
10798
10799        #[doc = "Canceling Deep Software Standby mode is enabled"]
10800        pub const _1: Self = Self::new(1);
10801    }
10802    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10803    pub struct Diwdtie_SPEC;
10804    pub type Diwdtie = crate::EnumBitfieldStruct<u8, Diwdtie_SPEC>;
10805    impl Diwdtie {
10806        #[doc = "Canceling Deep Software Standby mode is disabled"]
10807        pub const _0: Self = Self::new(0);
10808
10809        #[doc = "Canceling Deep Software Standby mode is enabled"]
10810        pub const _1: Self = Self::new(1);
10811    }
10812    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
10813    pub struct Dvbattadie_SPEC;
10814    pub type Dvbattadie = crate::EnumBitfieldStruct<u8, Dvbattadie_SPEC>;
10815    impl Dvbattadie {
10816        #[doc = "Canceling Deep Software Standby mode is disabled"]
10817        pub const _0: Self = Self::new(0);
10818
10819        #[doc = "Canceling Deep Software Standby mode is enabled"]
10820        pub const _1: Self = Self::new(1);
10821    }
10822}
10823#[doc(hidden)]
10824#[derive(Copy, Clone, Eq, PartialEq)]
10825pub struct Dpsifr0_SPEC;
10826impl crate::sealed::RegSpec for Dpsifr0_SPEC {
10827    type DataType = u8;
10828}
10829
10830#[doc = "Deep Software Standby Interrupt Flag Register 0"]
10831pub type Dpsifr0 = crate::RegValueT<Dpsifr0_SPEC>;
10832
10833impl Dpsifr0 {
10834    #[doc = "IRQ0-DS Pin Deep Software Standby Cancel Flag"]
10835    #[inline(always)]
10836    pub fn dirq0f(
10837        self,
10838    ) -> crate::common::RegisterField<
10839        0,
10840        0x1,
10841        1,
10842        0,
10843        dpsifr0::Dirq0F,
10844        dpsifr0::Dirq0F,
10845        Dpsifr0_SPEC,
10846        crate::common::RW,
10847    > {
10848        crate::common::RegisterField::<
10849            0,
10850            0x1,
10851            1,
10852            0,
10853            dpsifr0::Dirq0F,
10854            dpsifr0::Dirq0F,
10855            Dpsifr0_SPEC,
10856            crate::common::RW,
10857        >::from_register(self, 0)
10858    }
10859
10860    #[doc = "IRQ1-DS Pin Deep Software Standby Cancel Flag"]
10861    #[inline(always)]
10862    pub fn dirq1f(
10863        self,
10864    ) -> crate::common::RegisterField<
10865        1,
10866        0x1,
10867        1,
10868        0,
10869        dpsifr0::Dirq1F,
10870        dpsifr0::Dirq1F,
10871        Dpsifr0_SPEC,
10872        crate::common::RW,
10873    > {
10874        crate::common::RegisterField::<
10875            1,
10876            0x1,
10877            1,
10878            0,
10879            dpsifr0::Dirq1F,
10880            dpsifr0::Dirq1F,
10881            Dpsifr0_SPEC,
10882            crate::common::RW,
10883        >::from_register(self, 0)
10884    }
10885
10886    #[doc = "IRQ2-DS Pin Deep Software Standby Cancel Flag"]
10887    #[inline(always)]
10888    pub fn dirq2f(
10889        self,
10890    ) -> crate::common::RegisterField<
10891        2,
10892        0x1,
10893        1,
10894        0,
10895        dpsifr0::Dirq2F,
10896        dpsifr0::Dirq2F,
10897        Dpsifr0_SPEC,
10898        crate::common::RW,
10899    > {
10900        crate::common::RegisterField::<
10901            2,
10902            0x1,
10903            1,
10904            0,
10905            dpsifr0::Dirq2F,
10906            dpsifr0::Dirq2F,
10907            Dpsifr0_SPEC,
10908            crate::common::RW,
10909        >::from_register(self, 0)
10910    }
10911
10912    #[doc = "IRQ3-DS Pin Deep Software Standby Cancel Flag"]
10913    #[inline(always)]
10914    pub fn dirq3f(
10915        self,
10916    ) -> crate::common::RegisterField<
10917        3,
10918        0x1,
10919        1,
10920        0,
10921        dpsifr0::Dirq3F,
10922        dpsifr0::Dirq3F,
10923        Dpsifr0_SPEC,
10924        crate::common::RW,
10925    > {
10926        crate::common::RegisterField::<
10927            3,
10928            0x1,
10929            1,
10930            0,
10931            dpsifr0::Dirq3F,
10932            dpsifr0::Dirq3F,
10933            Dpsifr0_SPEC,
10934            crate::common::RW,
10935        >::from_register(self, 0)
10936    }
10937
10938    #[doc = "IRQ4-DS Pin Deep Software Standby Cancel Flag"]
10939    #[inline(always)]
10940    pub fn dirq4f(
10941        self,
10942    ) -> crate::common::RegisterField<
10943        4,
10944        0x1,
10945        1,
10946        0,
10947        dpsifr0::Dirq4F,
10948        dpsifr0::Dirq4F,
10949        Dpsifr0_SPEC,
10950        crate::common::RW,
10951    > {
10952        crate::common::RegisterField::<
10953            4,
10954            0x1,
10955            1,
10956            0,
10957            dpsifr0::Dirq4F,
10958            dpsifr0::Dirq4F,
10959            Dpsifr0_SPEC,
10960            crate::common::RW,
10961        >::from_register(self, 0)
10962    }
10963
10964    #[doc = "IRQ5-DS Pin Deep Software Standby Cancel Flag"]
10965    #[inline(always)]
10966    pub fn dirq5f(
10967        self,
10968    ) -> crate::common::RegisterField<
10969        5,
10970        0x1,
10971        1,
10972        0,
10973        dpsifr0::Dirq5F,
10974        dpsifr0::Dirq5F,
10975        Dpsifr0_SPEC,
10976        crate::common::RW,
10977    > {
10978        crate::common::RegisterField::<
10979            5,
10980            0x1,
10981            1,
10982            0,
10983            dpsifr0::Dirq5F,
10984            dpsifr0::Dirq5F,
10985            Dpsifr0_SPEC,
10986            crate::common::RW,
10987        >::from_register(self, 0)
10988    }
10989
10990    #[doc = "IRQ6-DS Pin Deep Software Standby Cancel Flag"]
10991    #[inline(always)]
10992    pub fn dirq6f(
10993        self,
10994    ) -> crate::common::RegisterField<
10995        6,
10996        0x1,
10997        1,
10998        0,
10999        dpsifr0::Dirq6F,
11000        dpsifr0::Dirq6F,
11001        Dpsifr0_SPEC,
11002        crate::common::RW,
11003    > {
11004        crate::common::RegisterField::<
11005            6,
11006            0x1,
11007            1,
11008            0,
11009            dpsifr0::Dirq6F,
11010            dpsifr0::Dirq6F,
11011            Dpsifr0_SPEC,
11012            crate::common::RW,
11013        >::from_register(self, 0)
11014    }
11015
11016    #[doc = "IRQ7-DS Pin Deep Software Standby Cancel Flag"]
11017    #[inline(always)]
11018    pub fn dirq7f(
11019        self,
11020    ) -> crate::common::RegisterField<
11021        7,
11022        0x1,
11023        1,
11024        0,
11025        dpsifr0::Dirq7F,
11026        dpsifr0::Dirq7F,
11027        Dpsifr0_SPEC,
11028        crate::common::RW,
11029    > {
11030        crate::common::RegisterField::<
11031            7,
11032            0x1,
11033            1,
11034            0,
11035            dpsifr0::Dirq7F,
11036            dpsifr0::Dirq7F,
11037            Dpsifr0_SPEC,
11038            crate::common::RW,
11039        >::from_register(self, 0)
11040    }
11041}
11042impl ::core::default::Default for Dpsifr0 {
11043    #[inline(always)]
11044    fn default() -> Dpsifr0 {
11045        <crate::RegValueT<Dpsifr0_SPEC> as RegisterValue<_>>::new(0)
11046    }
11047}
11048pub mod dpsifr0 {
11049
11050    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11051    pub struct Dirq0F_SPEC;
11052    pub type Dirq0F = crate::EnumBitfieldStruct<u8, Dirq0F_SPEC>;
11053    impl Dirq0F {
11054        #[doc = "The cancel request is not generated"]
11055        pub const _0: Self = Self::new(0);
11056
11057        #[doc = "The cancel request is generated"]
11058        pub const _1: Self = Self::new(1);
11059    }
11060    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11061    pub struct Dirq1F_SPEC;
11062    pub type Dirq1F = crate::EnumBitfieldStruct<u8, Dirq1F_SPEC>;
11063    impl Dirq1F {
11064        #[doc = "The cancel request is not generated"]
11065        pub const _0: Self = Self::new(0);
11066
11067        #[doc = "The cancel request is generated"]
11068        pub const _1: Self = Self::new(1);
11069    }
11070    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11071    pub struct Dirq2F_SPEC;
11072    pub type Dirq2F = crate::EnumBitfieldStruct<u8, Dirq2F_SPEC>;
11073    impl Dirq2F {
11074        #[doc = "The cancel request is not generated"]
11075        pub const _0: Self = Self::new(0);
11076
11077        #[doc = "The cancel request is generated"]
11078        pub const _1: Self = Self::new(1);
11079    }
11080    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11081    pub struct Dirq3F_SPEC;
11082    pub type Dirq3F = crate::EnumBitfieldStruct<u8, Dirq3F_SPEC>;
11083    impl Dirq3F {
11084        #[doc = "The cancel request is not generated"]
11085        pub const _0: Self = Self::new(0);
11086
11087        #[doc = "The cancel request is generated"]
11088        pub const _1: Self = Self::new(1);
11089    }
11090    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11091    pub struct Dirq4F_SPEC;
11092    pub type Dirq4F = crate::EnumBitfieldStruct<u8, Dirq4F_SPEC>;
11093    impl Dirq4F {
11094        #[doc = "The cancel request is not generated"]
11095        pub const _0: Self = Self::new(0);
11096
11097        #[doc = "The cancel request is generated"]
11098        pub const _1: Self = Self::new(1);
11099    }
11100    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11101    pub struct Dirq5F_SPEC;
11102    pub type Dirq5F = crate::EnumBitfieldStruct<u8, Dirq5F_SPEC>;
11103    impl Dirq5F {
11104        #[doc = "The cancel request is not generated"]
11105        pub const _0: Self = Self::new(0);
11106
11107        #[doc = "The cancel request is generated"]
11108        pub const _1: Self = Self::new(1);
11109    }
11110    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11111    pub struct Dirq6F_SPEC;
11112    pub type Dirq6F = crate::EnumBitfieldStruct<u8, Dirq6F_SPEC>;
11113    impl Dirq6F {
11114        #[doc = "The cancel request is not generated"]
11115        pub const _0: Self = Self::new(0);
11116
11117        #[doc = "The cancel request is generated"]
11118        pub const _1: Self = Self::new(1);
11119    }
11120    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11121    pub struct Dirq7F_SPEC;
11122    pub type Dirq7F = crate::EnumBitfieldStruct<u8, Dirq7F_SPEC>;
11123    impl Dirq7F {
11124        #[doc = "The cancel request is not generated"]
11125        pub const _0: Self = Self::new(0);
11126
11127        #[doc = "The cancel request is generated"]
11128        pub const _1: Self = Self::new(1);
11129    }
11130}
11131#[doc(hidden)]
11132#[derive(Copy, Clone, Eq, PartialEq)]
11133pub struct Dpsifr1_SPEC;
11134impl crate::sealed::RegSpec for Dpsifr1_SPEC {
11135    type DataType = u8;
11136}
11137
11138#[doc = "Deep Software Standby Interrupt Flag Register 1"]
11139pub type Dpsifr1 = crate::RegValueT<Dpsifr1_SPEC>;
11140
11141impl Dpsifr1 {
11142    #[doc = "IRQ8-DS Pin Deep Software Standby Cancel Flag"]
11143    #[inline(always)]
11144    pub fn dirq8f(
11145        self,
11146    ) -> crate::common::RegisterField<
11147        0,
11148        0x1,
11149        1,
11150        0,
11151        dpsifr1::Dirq8F,
11152        dpsifr1::Dirq8F,
11153        Dpsifr1_SPEC,
11154        crate::common::RW,
11155    > {
11156        crate::common::RegisterField::<
11157            0,
11158            0x1,
11159            1,
11160            0,
11161            dpsifr1::Dirq8F,
11162            dpsifr1::Dirq8F,
11163            Dpsifr1_SPEC,
11164            crate::common::RW,
11165        >::from_register(self, 0)
11166    }
11167
11168    #[doc = "IRQ9-DS Pin Deep Software Standby Cancel Flag"]
11169    #[inline(always)]
11170    pub fn dirq9f(
11171        self,
11172    ) -> crate::common::RegisterField<
11173        1,
11174        0x1,
11175        1,
11176        0,
11177        dpsifr1::Dirq9F,
11178        dpsifr1::Dirq9F,
11179        Dpsifr1_SPEC,
11180        crate::common::RW,
11181    > {
11182        crate::common::RegisterField::<
11183            1,
11184            0x1,
11185            1,
11186            0,
11187            dpsifr1::Dirq9F,
11188            dpsifr1::Dirq9F,
11189            Dpsifr1_SPEC,
11190            crate::common::RW,
11191        >::from_register(self, 0)
11192    }
11193
11194    #[doc = "IRQ10-DS Pin Deep Software Standby Cancel Flag"]
11195    #[inline(always)]
11196    pub fn dirq10f(
11197        self,
11198    ) -> crate::common::RegisterField<
11199        2,
11200        0x1,
11201        1,
11202        0,
11203        dpsifr1::Dirq10F,
11204        dpsifr1::Dirq10F,
11205        Dpsifr1_SPEC,
11206        crate::common::RW,
11207    > {
11208        crate::common::RegisterField::<
11209            2,
11210            0x1,
11211            1,
11212            0,
11213            dpsifr1::Dirq10F,
11214            dpsifr1::Dirq10F,
11215            Dpsifr1_SPEC,
11216            crate::common::RW,
11217        >::from_register(self, 0)
11218    }
11219
11220    #[doc = "IRQ11-DS Pin Deep Software Standby Cancel Flag"]
11221    #[inline(always)]
11222    pub fn dirq11f(
11223        self,
11224    ) -> crate::common::RegisterField<
11225        3,
11226        0x1,
11227        1,
11228        0,
11229        dpsifr1::Dirq11F,
11230        dpsifr1::Dirq11F,
11231        Dpsifr1_SPEC,
11232        crate::common::RW,
11233    > {
11234        crate::common::RegisterField::<
11235            3,
11236            0x1,
11237            1,
11238            0,
11239            dpsifr1::Dirq11F,
11240            dpsifr1::Dirq11F,
11241            Dpsifr1_SPEC,
11242            crate::common::RW,
11243        >::from_register(self, 0)
11244    }
11245
11246    #[doc = "IRQ12-DS Pin Deep Software Standby Cancel Flag"]
11247    #[inline(always)]
11248    pub fn dirq12f(
11249        self,
11250    ) -> crate::common::RegisterField<
11251        4,
11252        0x1,
11253        1,
11254        0,
11255        dpsifr1::Dirq12F,
11256        dpsifr1::Dirq12F,
11257        Dpsifr1_SPEC,
11258        crate::common::RW,
11259    > {
11260        crate::common::RegisterField::<
11261            4,
11262            0x1,
11263            1,
11264            0,
11265            dpsifr1::Dirq12F,
11266            dpsifr1::Dirq12F,
11267            Dpsifr1_SPEC,
11268            crate::common::RW,
11269        >::from_register(self, 0)
11270    }
11271
11272    #[doc = "IRQ13-DS Pin Deep Software Standby Cancel Flag"]
11273    #[inline(always)]
11274    pub fn dirq13f(
11275        self,
11276    ) -> crate::common::RegisterField<
11277        5,
11278        0x1,
11279        1,
11280        0,
11281        dpsifr1::Dirq13F,
11282        dpsifr1::Dirq13F,
11283        Dpsifr1_SPEC,
11284        crate::common::RW,
11285    > {
11286        crate::common::RegisterField::<
11287            5,
11288            0x1,
11289            1,
11290            0,
11291            dpsifr1::Dirq13F,
11292            dpsifr1::Dirq13F,
11293            Dpsifr1_SPEC,
11294            crate::common::RW,
11295        >::from_register(self, 0)
11296    }
11297
11298    #[doc = "IRQ14-DS Pin Deep Software Standby Cancel Flag"]
11299    #[inline(always)]
11300    pub fn dirq14f(
11301        self,
11302    ) -> crate::common::RegisterField<
11303        6,
11304        0x1,
11305        1,
11306        0,
11307        dpsifr1::Dirq14F,
11308        dpsifr1::Dirq14F,
11309        Dpsifr1_SPEC,
11310        crate::common::RW,
11311    > {
11312        crate::common::RegisterField::<
11313            6,
11314            0x1,
11315            1,
11316            0,
11317            dpsifr1::Dirq14F,
11318            dpsifr1::Dirq14F,
11319            Dpsifr1_SPEC,
11320            crate::common::RW,
11321        >::from_register(self, 0)
11322    }
11323
11324    #[doc = "IRQ15-DS Pin Deep Software Standby Cancel Flag"]
11325    #[inline(always)]
11326    pub fn dirq15f(
11327        self,
11328    ) -> crate::common::RegisterField<
11329        7,
11330        0x1,
11331        1,
11332        0,
11333        dpsifr1::Dirq15F,
11334        dpsifr1::Dirq15F,
11335        Dpsifr1_SPEC,
11336        crate::common::RW,
11337    > {
11338        crate::common::RegisterField::<
11339            7,
11340            0x1,
11341            1,
11342            0,
11343            dpsifr1::Dirq15F,
11344            dpsifr1::Dirq15F,
11345            Dpsifr1_SPEC,
11346            crate::common::RW,
11347        >::from_register(self, 0)
11348    }
11349}
11350impl ::core::default::Default for Dpsifr1 {
11351    #[inline(always)]
11352    fn default() -> Dpsifr1 {
11353        <crate::RegValueT<Dpsifr1_SPEC> as RegisterValue<_>>::new(0)
11354    }
11355}
11356pub mod dpsifr1 {
11357
11358    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11359    pub struct Dirq8F_SPEC;
11360    pub type Dirq8F = crate::EnumBitfieldStruct<u8, Dirq8F_SPEC>;
11361    impl Dirq8F {
11362        #[doc = "The cancel request is not generated"]
11363        pub const _0: Self = Self::new(0);
11364
11365        #[doc = "The cancel request is generated"]
11366        pub const _1: Self = Self::new(1);
11367    }
11368    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11369    pub struct Dirq9F_SPEC;
11370    pub type Dirq9F = crate::EnumBitfieldStruct<u8, Dirq9F_SPEC>;
11371    impl Dirq9F {
11372        #[doc = "The cancel request is not generated"]
11373        pub const _0: Self = Self::new(0);
11374
11375        #[doc = "The cancel request is generated"]
11376        pub const _1: Self = Self::new(1);
11377    }
11378    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11379    pub struct Dirq10F_SPEC;
11380    pub type Dirq10F = crate::EnumBitfieldStruct<u8, Dirq10F_SPEC>;
11381    impl Dirq10F {
11382        #[doc = "The cancel request is not generated"]
11383        pub const _0: Self = Self::new(0);
11384
11385        #[doc = "The cancel request is generated"]
11386        pub const _1: Self = Self::new(1);
11387    }
11388    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11389    pub struct Dirq11F_SPEC;
11390    pub type Dirq11F = crate::EnumBitfieldStruct<u8, Dirq11F_SPEC>;
11391    impl Dirq11F {
11392        #[doc = "The cancel request is not generated"]
11393        pub const _0: Self = Self::new(0);
11394
11395        #[doc = "The cancel request is generated"]
11396        pub const _1: Self = Self::new(1);
11397    }
11398    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11399    pub struct Dirq12F_SPEC;
11400    pub type Dirq12F = crate::EnumBitfieldStruct<u8, Dirq12F_SPEC>;
11401    impl Dirq12F {
11402        #[doc = "The cancel request is not generated"]
11403        pub const _0: Self = Self::new(0);
11404
11405        #[doc = "The cancel request is generated"]
11406        pub const _1: Self = Self::new(1);
11407    }
11408    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11409    pub struct Dirq13F_SPEC;
11410    pub type Dirq13F = crate::EnumBitfieldStruct<u8, Dirq13F_SPEC>;
11411    impl Dirq13F {
11412        #[doc = "The cancel request is not generated"]
11413        pub const _0: Self = Self::new(0);
11414
11415        #[doc = "The cancel request is generated"]
11416        pub const _1: Self = Self::new(1);
11417    }
11418    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11419    pub struct Dirq14F_SPEC;
11420    pub type Dirq14F = crate::EnumBitfieldStruct<u8, Dirq14F_SPEC>;
11421    impl Dirq14F {
11422        #[doc = "The cancel request is not generated"]
11423        pub const _0: Self = Self::new(0);
11424
11425        #[doc = "The cancel request is generated"]
11426        pub const _1: Self = Self::new(1);
11427    }
11428    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11429    pub struct Dirq15F_SPEC;
11430    pub type Dirq15F = crate::EnumBitfieldStruct<u8, Dirq15F_SPEC>;
11431    impl Dirq15F {
11432        #[doc = "The cancel request is not generated"]
11433        pub const _0: Self = Self::new(0);
11434
11435        #[doc = "The cancel request is generated"]
11436        pub const _1: Self = Self::new(1);
11437    }
11438}
11439#[doc(hidden)]
11440#[derive(Copy, Clone, Eq, PartialEq)]
11441pub struct Dpsifr2_SPEC;
11442impl crate::sealed::RegSpec for Dpsifr2_SPEC {
11443    type DataType = u8;
11444}
11445
11446#[doc = "Deep Software Standby Interrupt Flag Register 2"]
11447pub type Dpsifr2 = crate::RegValueT<Dpsifr2_SPEC>;
11448
11449impl Dpsifr2 {
11450    #[doc = "PVD1 Deep Software Standby Cancel Flag"]
11451    #[inline(always)]
11452    pub fn dpvd1if(
11453        self,
11454    ) -> crate::common::RegisterField<
11455        0,
11456        0x1,
11457        1,
11458        0,
11459        dpsifr2::Dpvd1If,
11460        dpsifr2::Dpvd1If,
11461        Dpsifr2_SPEC,
11462        crate::common::RW,
11463    > {
11464        crate::common::RegisterField::<
11465            0,
11466            0x1,
11467            1,
11468            0,
11469            dpsifr2::Dpvd1If,
11470            dpsifr2::Dpvd1If,
11471            Dpsifr2_SPEC,
11472            crate::common::RW,
11473        >::from_register(self, 0)
11474    }
11475
11476    #[doc = "PVD2 Deep Software Standby Cancel Flag"]
11477    #[inline(always)]
11478    pub fn dpvd2if(
11479        self,
11480    ) -> crate::common::RegisterField<
11481        1,
11482        0x1,
11483        1,
11484        0,
11485        dpsifr2::Dpvd2If,
11486        dpsifr2::Dpvd2If,
11487        Dpsifr2_SPEC,
11488        crate::common::RW,
11489    > {
11490        crate::common::RegisterField::<
11491            1,
11492            0x1,
11493            1,
11494            0,
11495            dpsifr2::Dpvd2If,
11496            dpsifr2::Dpvd2If,
11497            Dpsifr2_SPEC,
11498            crate::common::RW,
11499        >::from_register(self, 0)
11500    }
11501
11502    #[doc = "RTC Interval Interrupt Deep Software Standby Cancel Flag"]
11503    #[inline(always)]
11504    pub fn drtciif(
11505        self,
11506    ) -> crate::common::RegisterField<
11507        2,
11508        0x1,
11509        1,
11510        0,
11511        dpsifr2::Drtciif,
11512        dpsifr2::Drtciif,
11513        Dpsifr2_SPEC,
11514        crate::common::RW,
11515    > {
11516        crate::common::RegisterField::<
11517            2,
11518            0x1,
11519            1,
11520            0,
11521            dpsifr2::Drtciif,
11522            dpsifr2::Drtciif,
11523            Dpsifr2_SPEC,
11524            crate::common::RW,
11525        >::from_register(self, 0)
11526    }
11527
11528    #[doc = "RTC Alarm Interrupt Deep Software Standby Cancel Flag"]
11529    #[inline(always)]
11530    pub fn drtcaif(
11531        self,
11532    ) -> crate::common::RegisterField<
11533        3,
11534        0x1,
11535        1,
11536        0,
11537        dpsifr2::Drtcaif,
11538        dpsifr2::Drtcaif,
11539        Dpsifr2_SPEC,
11540        crate::common::RW,
11541    > {
11542        crate::common::RegisterField::<
11543            3,
11544            0x1,
11545            1,
11546            0,
11547            dpsifr2::Drtcaif,
11548            dpsifr2::Drtcaif,
11549            Dpsifr2_SPEC,
11550            crate::common::RW,
11551        >::from_register(self, 0)
11552    }
11553
11554    #[doc = "NMI Pin Deep Software Standby Cancel Flag"]
11555    #[inline(always)]
11556    pub fn dnmif(
11557        self,
11558    ) -> crate::common::RegisterField<
11559        4,
11560        0x1,
11561        1,
11562        0,
11563        dpsifr2::Dnmif,
11564        dpsifr2::Dnmif,
11565        Dpsifr2_SPEC,
11566        crate::common::RW,
11567    > {
11568        crate::common::RegisterField::<
11569            4,
11570            0x1,
11571            1,
11572            0,
11573            dpsifr2::Dnmif,
11574            dpsifr2::Dnmif,
11575            Dpsifr2_SPEC,
11576            crate::common::RW,
11577        >::from_register(self, 0)
11578    }
11579}
11580impl ::core::default::Default for Dpsifr2 {
11581    #[inline(always)]
11582    fn default() -> Dpsifr2 {
11583        <crate::RegValueT<Dpsifr2_SPEC> as RegisterValue<_>>::new(0)
11584    }
11585}
11586pub mod dpsifr2 {
11587
11588    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11589    pub struct Dpvd1If_SPEC;
11590    pub type Dpvd1If = crate::EnumBitfieldStruct<u8, Dpvd1If_SPEC>;
11591    impl Dpvd1If {
11592        #[doc = "The cancel request is not generated"]
11593        pub const _0: Self = Self::new(0);
11594
11595        #[doc = "The cancel request is generated"]
11596        pub const _1: Self = Self::new(1);
11597    }
11598    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11599    pub struct Dpvd2If_SPEC;
11600    pub type Dpvd2If = crate::EnumBitfieldStruct<u8, Dpvd2If_SPEC>;
11601    impl Dpvd2If {
11602        #[doc = "The cancel request is not generated"]
11603        pub const _0: Self = Self::new(0);
11604
11605        #[doc = "The cancel request is generated"]
11606        pub const _1: Self = Self::new(1);
11607    }
11608    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11609    pub struct Drtciif_SPEC;
11610    pub type Drtciif = crate::EnumBitfieldStruct<u8, Drtciif_SPEC>;
11611    impl Drtciif {
11612        #[doc = "The cancel request is not generated"]
11613        pub const _0: Self = Self::new(0);
11614
11615        #[doc = "The cancel request is generated"]
11616        pub const _1: Self = Self::new(1);
11617    }
11618    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11619    pub struct Drtcaif_SPEC;
11620    pub type Drtcaif = crate::EnumBitfieldStruct<u8, Drtcaif_SPEC>;
11621    impl Drtcaif {
11622        #[doc = "The cancel request is not generated"]
11623        pub const _0: Self = Self::new(0);
11624
11625        #[doc = "The cancel request is generated"]
11626        pub const _1: Self = Self::new(1);
11627    }
11628    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11629    pub struct Dnmif_SPEC;
11630    pub type Dnmif = crate::EnumBitfieldStruct<u8, Dnmif_SPEC>;
11631    impl Dnmif {
11632        #[doc = "The cancel request is not generated"]
11633        pub const _0: Self = Self::new(0);
11634
11635        #[doc = "The cancel request is generated"]
11636        pub const _1: Self = Self::new(1);
11637    }
11638}
11639#[doc(hidden)]
11640#[derive(Copy, Clone, Eq, PartialEq)]
11641pub struct Dpsifr3_SPEC;
11642impl crate::sealed::RegSpec for Dpsifr3_SPEC {
11643    type DataType = u8;
11644}
11645
11646#[doc = "Deep Software Standby Interrupt Flag Register 3"]
11647pub type Dpsifr3 = crate::RegValueT<Dpsifr3_SPEC>;
11648
11649impl Dpsifr3 {
11650    #[doc = "USBFS Suspend/Resume Deep Software Standby Cancel Flag"]
11651    #[inline(always)]
11652    pub fn dusbfsif(
11653        self,
11654    ) -> crate::common::RegisterField<
11655        0,
11656        0x1,
11657        1,
11658        0,
11659        dpsifr3::Dusbfsif,
11660        dpsifr3::Dusbfsif,
11661        Dpsifr3_SPEC,
11662        crate::common::RW,
11663    > {
11664        crate::common::RegisterField::<
11665            0,
11666            0x1,
11667            1,
11668            0,
11669            dpsifr3::Dusbfsif,
11670            dpsifr3::Dusbfsif,
11671            Dpsifr3_SPEC,
11672            crate::common::RW,
11673        >::from_register(self, 0)
11674    }
11675
11676    #[doc = "ULPT0 Overflow Deep Software Standby Cancel Flag"]
11677    #[inline(always)]
11678    pub fn dulpt0if(
11679        self,
11680    ) -> crate::common::RegisterField<
11681        2,
11682        0x1,
11683        1,
11684        0,
11685        dpsifr3::Dulpt0If,
11686        dpsifr3::Dulpt0If,
11687        Dpsifr3_SPEC,
11688        crate::common::RW,
11689    > {
11690        crate::common::RegisterField::<
11691            2,
11692            0x1,
11693            1,
11694            0,
11695            dpsifr3::Dulpt0If,
11696            dpsifr3::Dulpt0If,
11697            Dpsifr3_SPEC,
11698            crate::common::RW,
11699        >::from_register(self, 0)
11700    }
11701
11702    #[doc = "ULPT1 Overflow Deep Software Standby Cancel Flag"]
11703    #[inline(always)]
11704    pub fn dulpt1if(
11705        self,
11706    ) -> crate::common::RegisterField<
11707        3,
11708        0x1,
11709        1,
11710        0,
11711        dpsifr3::Dulpt1If,
11712        dpsifr3::Dulpt1If,
11713        Dpsifr3_SPEC,
11714        crate::common::RW,
11715    > {
11716        crate::common::RegisterField::<
11717            3,
11718            0x1,
11719            1,
11720            0,
11721            dpsifr3::Dulpt1If,
11722            dpsifr3::Dulpt1If,
11723            Dpsifr3_SPEC,
11724            crate::common::RW,
11725        >::from_register(self, 0)
11726    }
11727
11728    #[doc = "IWDT Underflow Deep Software Standby Cancel Flag"]
11729    #[inline(always)]
11730    pub fn diwdtif(
11731        self,
11732    ) -> crate::common::RegisterField<
11733        5,
11734        0x1,
11735        1,
11736        0,
11737        dpsifr3::Diwdtif,
11738        dpsifr3::Diwdtif,
11739        Dpsifr3_SPEC,
11740        crate::common::RW,
11741    > {
11742        crate::common::RegisterField::<
11743            5,
11744            0x1,
11745            1,
11746            0,
11747            dpsifr3::Diwdtif,
11748            dpsifr3::Diwdtif,
11749            Dpsifr3_SPEC,
11750            crate::common::RW,
11751        >::from_register(self, 0)
11752    }
11753
11754    #[doc = "VBATT Tamper Detection Deep Software Standby Cancel Flag"]
11755    #[inline(always)]
11756    pub fn dvbattadif(
11757        self,
11758    ) -> crate::common::RegisterField<
11759        7,
11760        0x1,
11761        1,
11762        0,
11763        dpsifr3::Dvbattadif,
11764        dpsifr3::Dvbattadif,
11765        Dpsifr3_SPEC,
11766        crate::common::RW,
11767    > {
11768        crate::common::RegisterField::<
11769            7,
11770            0x1,
11771            1,
11772            0,
11773            dpsifr3::Dvbattadif,
11774            dpsifr3::Dvbattadif,
11775            Dpsifr3_SPEC,
11776            crate::common::RW,
11777        >::from_register(self, 0)
11778    }
11779}
11780impl ::core::default::Default for Dpsifr3 {
11781    #[inline(always)]
11782    fn default() -> Dpsifr3 {
11783        <crate::RegValueT<Dpsifr3_SPEC> as RegisterValue<_>>::new(0)
11784    }
11785}
11786pub mod dpsifr3 {
11787
11788    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11789    pub struct Dusbfsif_SPEC;
11790    pub type Dusbfsif = crate::EnumBitfieldStruct<u8, Dusbfsif_SPEC>;
11791    impl Dusbfsif {
11792        #[doc = "The cancel request is not generated"]
11793        pub const _0: Self = Self::new(0);
11794
11795        #[doc = "The cancel request is generated"]
11796        pub const _1: Self = Self::new(1);
11797    }
11798    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11799    pub struct Dulpt0If_SPEC;
11800    pub type Dulpt0If = crate::EnumBitfieldStruct<u8, Dulpt0If_SPEC>;
11801    impl Dulpt0If {
11802        #[doc = "The cancel request is not generated"]
11803        pub const _0: Self = Self::new(0);
11804
11805        #[doc = "The cancel request is generated"]
11806        pub const _1: Self = Self::new(1);
11807    }
11808    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11809    pub struct Dulpt1If_SPEC;
11810    pub type Dulpt1If = crate::EnumBitfieldStruct<u8, Dulpt1If_SPEC>;
11811    impl Dulpt1If {
11812        #[doc = "The cancel request is not generated"]
11813        pub const _0: Self = Self::new(0);
11814
11815        #[doc = "The cancel request is generated"]
11816        pub const _1: Self = Self::new(1);
11817    }
11818    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11819    pub struct Diwdtif_SPEC;
11820    pub type Diwdtif = crate::EnumBitfieldStruct<u8, Diwdtif_SPEC>;
11821    impl Diwdtif {
11822        #[doc = "The cancel request is not generated"]
11823        pub const _0: Self = Self::new(0);
11824
11825        #[doc = "The cancel request is generated"]
11826        pub const _1: Self = Self::new(1);
11827    }
11828    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
11829    pub struct Dvbattadif_SPEC;
11830    pub type Dvbattadif = crate::EnumBitfieldStruct<u8, Dvbattadif_SPEC>;
11831    impl Dvbattadif {
11832        #[doc = "The cancel request is not generated"]
11833        pub const _0: Self = Self::new(0);
11834
11835        #[doc = "The cancel request is generated"]
11836        pub const _1: Self = Self::new(1);
11837    }
11838}
11839#[doc(hidden)]
11840#[derive(Copy, Clone, Eq, PartialEq)]
11841pub struct Dpsiegr0_SPEC;
11842impl crate::sealed::RegSpec for Dpsiegr0_SPEC {
11843    type DataType = u8;
11844}
11845
11846#[doc = "Deep Software Standby Interrupt Edge Register 0"]
11847pub type Dpsiegr0 = crate::RegValueT<Dpsiegr0_SPEC>;
11848
11849impl Dpsiegr0 {
11850    #[doc = "IRQ0-DS Pin Edge Select"]
11851    #[inline(always)]
11852    pub fn dirq0eg(
11853        self,
11854    ) -> crate::common::RegisterField<
11855        0,
11856        0x1,
11857        1,
11858        0,
11859        dpsiegr0::Dirq0Eg,
11860        dpsiegr0::Dirq0Eg,
11861        Dpsiegr0_SPEC,
11862        crate::common::RW,
11863    > {
11864        crate::common::RegisterField::<
11865            0,
11866            0x1,
11867            1,
11868            0,
11869            dpsiegr0::Dirq0Eg,
11870            dpsiegr0::Dirq0Eg,
11871            Dpsiegr0_SPEC,
11872            crate::common::RW,
11873        >::from_register(self, 0)
11874    }
11875
11876    #[doc = "IRQ1-DS Pin Edge Select"]
11877    #[inline(always)]
11878    pub fn dirq1eg(
11879        self,
11880    ) -> crate::common::RegisterField<
11881        1,
11882        0x1,
11883        1,
11884        0,
11885        dpsiegr0::Dirq1Eg,
11886        dpsiegr0::Dirq1Eg,
11887        Dpsiegr0_SPEC,
11888        crate::common::RW,
11889    > {
11890        crate::common::RegisterField::<
11891            1,
11892            0x1,
11893            1,
11894            0,
11895            dpsiegr0::Dirq1Eg,
11896            dpsiegr0::Dirq1Eg,
11897            Dpsiegr0_SPEC,
11898            crate::common::RW,
11899        >::from_register(self, 0)
11900    }
11901
11902    #[doc = "IRQ2-DS Pin Edge Select"]
11903    #[inline(always)]
11904    pub fn dirq2eg(
11905        self,
11906    ) -> crate::common::RegisterField<
11907        2,
11908        0x1,
11909        1,
11910        0,
11911        dpsiegr0::Dirq2Eg,
11912        dpsiegr0::Dirq2Eg,
11913        Dpsiegr0_SPEC,
11914        crate::common::RW,
11915    > {
11916        crate::common::RegisterField::<
11917            2,
11918            0x1,
11919            1,
11920            0,
11921            dpsiegr0::Dirq2Eg,
11922            dpsiegr0::Dirq2Eg,
11923            Dpsiegr0_SPEC,
11924            crate::common::RW,
11925        >::from_register(self, 0)
11926    }
11927
11928    #[doc = "IRQ3-DS Pin Edge Select"]
11929    #[inline(always)]
11930    pub fn dirq3eg(
11931        self,
11932    ) -> crate::common::RegisterField<
11933        3,
11934        0x1,
11935        1,
11936        0,
11937        dpsiegr0::Dirq3Eg,
11938        dpsiegr0::Dirq3Eg,
11939        Dpsiegr0_SPEC,
11940        crate::common::RW,
11941    > {
11942        crate::common::RegisterField::<
11943            3,
11944            0x1,
11945            1,
11946            0,
11947            dpsiegr0::Dirq3Eg,
11948            dpsiegr0::Dirq3Eg,
11949            Dpsiegr0_SPEC,
11950            crate::common::RW,
11951        >::from_register(self, 0)
11952    }
11953
11954    #[doc = "IRQ4-DS Pin Edge Select"]
11955    #[inline(always)]
11956    pub fn dirq4eg(
11957        self,
11958    ) -> crate::common::RegisterField<
11959        4,
11960        0x1,
11961        1,
11962        0,
11963        dpsiegr0::Dirq4Eg,
11964        dpsiegr0::Dirq4Eg,
11965        Dpsiegr0_SPEC,
11966        crate::common::RW,
11967    > {
11968        crate::common::RegisterField::<
11969            4,
11970            0x1,
11971            1,
11972            0,
11973            dpsiegr0::Dirq4Eg,
11974            dpsiegr0::Dirq4Eg,
11975            Dpsiegr0_SPEC,
11976            crate::common::RW,
11977        >::from_register(self, 0)
11978    }
11979
11980    #[doc = "IRQ5-DS Pin Edge Select"]
11981    #[inline(always)]
11982    pub fn dirq5eg(
11983        self,
11984    ) -> crate::common::RegisterField<
11985        5,
11986        0x1,
11987        1,
11988        0,
11989        dpsiegr0::Dirq5Eg,
11990        dpsiegr0::Dirq5Eg,
11991        Dpsiegr0_SPEC,
11992        crate::common::RW,
11993    > {
11994        crate::common::RegisterField::<
11995            5,
11996            0x1,
11997            1,
11998            0,
11999            dpsiegr0::Dirq5Eg,
12000            dpsiegr0::Dirq5Eg,
12001            Dpsiegr0_SPEC,
12002            crate::common::RW,
12003        >::from_register(self, 0)
12004    }
12005
12006    #[doc = "IRQ6-DS Pin Edge Select"]
12007    #[inline(always)]
12008    pub fn dirq6eg(
12009        self,
12010    ) -> crate::common::RegisterField<
12011        6,
12012        0x1,
12013        1,
12014        0,
12015        dpsiegr0::Dirq6Eg,
12016        dpsiegr0::Dirq6Eg,
12017        Dpsiegr0_SPEC,
12018        crate::common::RW,
12019    > {
12020        crate::common::RegisterField::<
12021            6,
12022            0x1,
12023            1,
12024            0,
12025            dpsiegr0::Dirq6Eg,
12026            dpsiegr0::Dirq6Eg,
12027            Dpsiegr0_SPEC,
12028            crate::common::RW,
12029        >::from_register(self, 0)
12030    }
12031
12032    #[doc = "IRQ7-DS Pin Edge Select"]
12033    #[inline(always)]
12034    pub fn dirq7eg(
12035        self,
12036    ) -> crate::common::RegisterField<
12037        7,
12038        0x1,
12039        1,
12040        0,
12041        dpsiegr0::Dirq7Eg,
12042        dpsiegr0::Dirq7Eg,
12043        Dpsiegr0_SPEC,
12044        crate::common::RW,
12045    > {
12046        crate::common::RegisterField::<
12047            7,
12048            0x1,
12049            1,
12050            0,
12051            dpsiegr0::Dirq7Eg,
12052            dpsiegr0::Dirq7Eg,
12053            Dpsiegr0_SPEC,
12054            crate::common::RW,
12055        >::from_register(self, 0)
12056    }
12057}
12058impl ::core::default::Default for Dpsiegr0 {
12059    #[inline(always)]
12060    fn default() -> Dpsiegr0 {
12061        <crate::RegValueT<Dpsiegr0_SPEC> as RegisterValue<_>>::new(0)
12062    }
12063}
12064pub mod dpsiegr0 {
12065
12066    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12067    pub struct Dirq0Eg_SPEC;
12068    pub type Dirq0Eg = crate::EnumBitfieldStruct<u8, Dirq0Eg_SPEC>;
12069    impl Dirq0Eg {
12070        #[doc = "A cancel request is generated at a falling edge"]
12071        pub const _0: Self = Self::new(0);
12072
12073        #[doc = "A cancel request is generated at a rising edge"]
12074        pub const _1: Self = Self::new(1);
12075    }
12076    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12077    pub struct Dirq1Eg_SPEC;
12078    pub type Dirq1Eg = crate::EnumBitfieldStruct<u8, Dirq1Eg_SPEC>;
12079    impl Dirq1Eg {
12080        #[doc = "A cancel request is generated at a falling edge"]
12081        pub const _0: Self = Self::new(0);
12082
12083        #[doc = "A cancel request is generated at a rising edge"]
12084        pub const _1: Self = Self::new(1);
12085    }
12086    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12087    pub struct Dirq2Eg_SPEC;
12088    pub type Dirq2Eg = crate::EnumBitfieldStruct<u8, Dirq2Eg_SPEC>;
12089    impl Dirq2Eg {
12090        #[doc = "A cancel request is generated at a falling edge"]
12091        pub const _0: Self = Self::new(0);
12092
12093        #[doc = "A cancel request is generated at a rising edge"]
12094        pub const _1: Self = Self::new(1);
12095    }
12096    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12097    pub struct Dirq3Eg_SPEC;
12098    pub type Dirq3Eg = crate::EnumBitfieldStruct<u8, Dirq3Eg_SPEC>;
12099    impl Dirq3Eg {
12100        #[doc = "A cancel request is generated at a falling edge"]
12101        pub const _0: Self = Self::new(0);
12102
12103        #[doc = "A cancel request is generated at a rising edge"]
12104        pub const _1: Self = Self::new(1);
12105    }
12106    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12107    pub struct Dirq4Eg_SPEC;
12108    pub type Dirq4Eg = crate::EnumBitfieldStruct<u8, Dirq4Eg_SPEC>;
12109    impl Dirq4Eg {
12110        #[doc = "A cancel request is generated at a falling edge"]
12111        pub const _0: Self = Self::new(0);
12112
12113        #[doc = "A cancel request is generated at a rising edge"]
12114        pub const _1: Self = Self::new(1);
12115    }
12116    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12117    pub struct Dirq5Eg_SPEC;
12118    pub type Dirq5Eg = crate::EnumBitfieldStruct<u8, Dirq5Eg_SPEC>;
12119    impl Dirq5Eg {
12120        #[doc = "A cancel request is generated at a falling edge"]
12121        pub const _0: Self = Self::new(0);
12122
12123        #[doc = "A cancel request is generated at a rising edge"]
12124        pub const _1: Self = Self::new(1);
12125    }
12126    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12127    pub struct Dirq6Eg_SPEC;
12128    pub type Dirq6Eg = crate::EnumBitfieldStruct<u8, Dirq6Eg_SPEC>;
12129    impl Dirq6Eg {
12130        #[doc = "A cancel request is generated at a falling edge"]
12131        pub const _0: Self = Self::new(0);
12132
12133        #[doc = "A cancel request is generated at a rising edge"]
12134        pub const _1: Self = Self::new(1);
12135    }
12136    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12137    pub struct Dirq7Eg_SPEC;
12138    pub type Dirq7Eg = crate::EnumBitfieldStruct<u8, Dirq7Eg_SPEC>;
12139    impl Dirq7Eg {
12140        #[doc = "A cancel request is generated at a falling edge"]
12141        pub const _0: Self = Self::new(0);
12142
12143        #[doc = "A cancel request is generated at a rising edge"]
12144        pub const _1: Self = Self::new(1);
12145    }
12146}
12147#[doc(hidden)]
12148#[derive(Copy, Clone, Eq, PartialEq)]
12149pub struct Dpsiegr1_SPEC;
12150impl crate::sealed::RegSpec for Dpsiegr1_SPEC {
12151    type DataType = u8;
12152}
12153
12154#[doc = "Deep Software Standby Interrupt Edge Register 1"]
12155pub type Dpsiegr1 = crate::RegValueT<Dpsiegr1_SPEC>;
12156
12157impl Dpsiegr1 {
12158    #[doc = "IRQ8-DS Pin Edge Select"]
12159    #[inline(always)]
12160    pub fn dirq8eg(
12161        self,
12162    ) -> crate::common::RegisterField<
12163        0,
12164        0x1,
12165        1,
12166        0,
12167        dpsiegr1::Dirq8Eg,
12168        dpsiegr1::Dirq8Eg,
12169        Dpsiegr1_SPEC,
12170        crate::common::RW,
12171    > {
12172        crate::common::RegisterField::<
12173            0,
12174            0x1,
12175            1,
12176            0,
12177            dpsiegr1::Dirq8Eg,
12178            dpsiegr1::Dirq8Eg,
12179            Dpsiegr1_SPEC,
12180            crate::common::RW,
12181        >::from_register(self, 0)
12182    }
12183
12184    #[doc = "IRQ9-DS Pin Edge Select"]
12185    #[inline(always)]
12186    pub fn dirq9eg(
12187        self,
12188    ) -> crate::common::RegisterField<
12189        1,
12190        0x1,
12191        1,
12192        0,
12193        dpsiegr1::Dirq9Eg,
12194        dpsiegr1::Dirq9Eg,
12195        Dpsiegr1_SPEC,
12196        crate::common::RW,
12197    > {
12198        crate::common::RegisterField::<
12199            1,
12200            0x1,
12201            1,
12202            0,
12203            dpsiegr1::Dirq9Eg,
12204            dpsiegr1::Dirq9Eg,
12205            Dpsiegr1_SPEC,
12206            crate::common::RW,
12207        >::from_register(self, 0)
12208    }
12209
12210    #[doc = "IRQ10-DS Pin Edge Select"]
12211    #[inline(always)]
12212    pub fn dirq10eg(
12213        self,
12214    ) -> crate::common::RegisterField<
12215        2,
12216        0x1,
12217        1,
12218        0,
12219        dpsiegr1::Dirq10Eg,
12220        dpsiegr1::Dirq10Eg,
12221        Dpsiegr1_SPEC,
12222        crate::common::RW,
12223    > {
12224        crate::common::RegisterField::<
12225            2,
12226            0x1,
12227            1,
12228            0,
12229            dpsiegr1::Dirq10Eg,
12230            dpsiegr1::Dirq10Eg,
12231            Dpsiegr1_SPEC,
12232            crate::common::RW,
12233        >::from_register(self, 0)
12234    }
12235
12236    #[doc = "IRQ11-DS Pin Edge Select"]
12237    #[inline(always)]
12238    pub fn dirq11eg(
12239        self,
12240    ) -> crate::common::RegisterField<
12241        3,
12242        0x1,
12243        1,
12244        0,
12245        dpsiegr1::Dirq11Eg,
12246        dpsiegr1::Dirq11Eg,
12247        Dpsiegr1_SPEC,
12248        crate::common::RW,
12249    > {
12250        crate::common::RegisterField::<
12251            3,
12252            0x1,
12253            1,
12254            0,
12255            dpsiegr1::Dirq11Eg,
12256            dpsiegr1::Dirq11Eg,
12257            Dpsiegr1_SPEC,
12258            crate::common::RW,
12259        >::from_register(self, 0)
12260    }
12261
12262    #[doc = "IRQ12-DS Pin Edge Select"]
12263    #[inline(always)]
12264    pub fn dirq12eg(
12265        self,
12266    ) -> crate::common::RegisterField<
12267        4,
12268        0x1,
12269        1,
12270        0,
12271        dpsiegr1::Dirq12Eg,
12272        dpsiegr1::Dirq12Eg,
12273        Dpsiegr1_SPEC,
12274        crate::common::RW,
12275    > {
12276        crate::common::RegisterField::<
12277            4,
12278            0x1,
12279            1,
12280            0,
12281            dpsiegr1::Dirq12Eg,
12282            dpsiegr1::Dirq12Eg,
12283            Dpsiegr1_SPEC,
12284            crate::common::RW,
12285        >::from_register(self, 0)
12286    }
12287
12288    #[doc = "IRQ13-DS Pin Edge Select"]
12289    #[inline(always)]
12290    pub fn dirq13eg(
12291        self,
12292    ) -> crate::common::RegisterField<
12293        5,
12294        0x1,
12295        1,
12296        0,
12297        dpsiegr1::Dirq13Eg,
12298        dpsiegr1::Dirq13Eg,
12299        Dpsiegr1_SPEC,
12300        crate::common::RW,
12301    > {
12302        crate::common::RegisterField::<
12303            5,
12304            0x1,
12305            1,
12306            0,
12307            dpsiegr1::Dirq13Eg,
12308            dpsiegr1::Dirq13Eg,
12309            Dpsiegr1_SPEC,
12310            crate::common::RW,
12311        >::from_register(self, 0)
12312    }
12313
12314    #[doc = "IRQ14-DS Pin Edge Select"]
12315    #[inline(always)]
12316    pub fn dirq14eg(
12317        self,
12318    ) -> crate::common::RegisterField<
12319        6,
12320        0x1,
12321        1,
12322        0,
12323        dpsiegr1::Dirq14Eg,
12324        dpsiegr1::Dirq14Eg,
12325        Dpsiegr1_SPEC,
12326        crate::common::RW,
12327    > {
12328        crate::common::RegisterField::<
12329            6,
12330            0x1,
12331            1,
12332            0,
12333            dpsiegr1::Dirq14Eg,
12334            dpsiegr1::Dirq14Eg,
12335            Dpsiegr1_SPEC,
12336            crate::common::RW,
12337        >::from_register(self, 0)
12338    }
12339
12340    #[doc = "IRQ15-DS Pin Edge Select"]
12341    #[inline(always)]
12342    pub fn dirq15eg(
12343        self,
12344    ) -> crate::common::RegisterField<
12345        7,
12346        0x1,
12347        1,
12348        0,
12349        dpsiegr1::Dirq15Eg,
12350        dpsiegr1::Dirq15Eg,
12351        Dpsiegr1_SPEC,
12352        crate::common::RW,
12353    > {
12354        crate::common::RegisterField::<
12355            7,
12356            0x1,
12357            1,
12358            0,
12359            dpsiegr1::Dirq15Eg,
12360            dpsiegr1::Dirq15Eg,
12361            Dpsiegr1_SPEC,
12362            crate::common::RW,
12363        >::from_register(self, 0)
12364    }
12365}
12366impl ::core::default::Default for Dpsiegr1 {
12367    #[inline(always)]
12368    fn default() -> Dpsiegr1 {
12369        <crate::RegValueT<Dpsiegr1_SPEC> as RegisterValue<_>>::new(0)
12370    }
12371}
12372pub mod dpsiegr1 {
12373
12374    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12375    pub struct Dirq8Eg_SPEC;
12376    pub type Dirq8Eg = crate::EnumBitfieldStruct<u8, Dirq8Eg_SPEC>;
12377    impl Dirq8Eg {
12378        #[doc = "A cancel request is generated at a falling edge."]
12379        pub const _0: Self = Self::new(0);
12380
12381        #[doc = "A cancel request is generated at a rising edge."]
12382        pub const _1: Self = Self::new(1);
12383    }
12384    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12385    pub struct Dirq9Eg_SPEC;
12386    pub type Dirq9Eg = crate::EnumBitfieldStruct<u8, Dirq9Eg_SPEC>;
12387    impl Dirq9Eg {
12388        #[doc = "A cancel request is generated at a falling edge."]
12389        pub const _0: Self = Self::new(0);
12390
12391        #[doc = "A cancel request is generated at a rising edge."]
12392        pub const _1: Self = Self::new(1);
12393    }
12394    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12395    pub struct Dirq10Eg_SPEC;
12396    pub type Dirq10Eg = crate::EnumBitfieldStruct<u8, Dirq10Eg_SPEC>;
12397    impl Dirq10Eg {
12398        #[doc = "A cancel request is generated at a falling edge."]
12399        pub const _0: Self = Self::new(0);
12400
12401        #[doc = "A cancel request is generated at a rising edge"]
12402        pub const _1: Self = Self::new(1);
12403    }
12404    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12405    pub struct Dirq11Eg_SPEC;
12406    pub type Dirq11Eg = crate::EnumBitfieldStruct<u8, Dirq11Eg_SPEC>;
12407    impl Dirq11Eg {
12408        #[doc = "A cancel request is generated at a falling edge."]
12409        pub const _0: Self = Self::new(0);
12410
12411        #[doc = "A cancel request is generated at a rising edge."]
12412        pub const _1: Self = Self::new(1);
12413    }
12414    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12415    pub struct Dirq12Eg_SPEC;
12416    pub type Dirq12Eg = crate::EnumBitfieldStruct<u8, Dirq12Eg_SPEC>;
12417    impl Dirq12Eg {
12418        #[doc = "A cancel request is generated at a falling edge."]
12419        pub const _0: Self = Self::new(0);
12420
12421        #[doc = "A cancel request is generated at a rising edge."]
12422        pub const _1: Self = Self::new(1);
12423    }
12424    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12425    pub struct Dirq13Eg_SPEC;
12426    pub type Dirq13Eg = crate::EnumBitfieldStruct<u8, Dirq13Eg_SPEC>;
12427    impl Dirq13Eg {
12428        #[doc = "A cancel request is generated at a falling edge."]
12429        pub const _0: Self = Self::new(0);
12430
12431        #[doc = "A cancel request is generated at a rising edge."]
12432        pub const _1: Self = Self::new(1);
12433    }
12434    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12435    pub struct Dirq14Eg_SPEC;
12436    pub type Dirq14Eg = crate::EnumBitfieldStruct<u8, Dirq14Eg_SPEC>;
12437    impl Dirq14Eg {
12438        #[doc = "A cancel request is generated at a falling edge."]
12439        pub const _0: Self = Self::new(0);
12440
12441        #[doc = "A cancel request is generated at a rising edge."]
12442        pub const _1: Self = Self::new(1);
12443    }
12444    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12445    pub struct Dirq15Eg_SPEC;
12446    pub type Dirq15Eg = crate::EnumBitfieldStruct<u8, Dirq15Eg_SPEC>;
12447    impl Dirq15Eg {
12448        #[doc = "A cancel request is generated at a falling edge."]
12449        pub const _0: Self = Self::new(0);
12450
12451        #[doc = "A cancel request is generated at a rising edge."]
12452        pub const _1: Self = Self::new(1);
12453    }
12454}
12455#[doc(hidden)]
12456#[derive(Copy, Clone, Eq, PartialEq)]
12457pub struct Dpsiegr2_SPEC;
12458impl crate::sealed::RegSpec for Dpsiegr2_SPEC {
12459    type DataType = u8;
12460}
12461
12462#[doc = "Deep Software Standby Interrupt Edge Register 2"]
12463pub type Dpsiegr2 = crate::RegValueT<Dpsiegr2_SPEC>;
12464
12465impl Dpsiegr2 {
12466    #[doc = "PVD1 Edge Select"]
12467    #[inline(always)]
12468    pub fn dpvd1eg(
12469        self,
12470    ) -> crate::common::RegisterField<
12471        0,
12472        0x1,
12473        1,
12474        0,
12475        dpsiegr2::Dpvd1Eg,
12476        dpsiegr2::Dpvd1Eg,
12477        Dpsiegr2_SPEC,
12478        crate::common::RW,
12479    > {
12480        crate::common::RegisterField::<
12481            0,
12482            0x1,
12483            1,
12484            0,
12485            dpsiegr2::Dpvd1Eg,
12486            dpsiegr2::Dpvd1Eg,
12487            Dpsiegr2_SPEC,
12488            crate::common::RW,
12489        >::from_register(self, 0)
12490    }
12491
12492    #[doc = "PVD2 Edge Select"]
12493    #[inline(always)]
12494    pub fn dpvd2eg(
12495        self,
12496    ) -> crate::common::RegisterField<
12497        1,
12498        0x1,
12499        1,
12500        0,
12501        dpsiegr2::Dpvd2Eg,
12502        dpsiegr2::Dpvd2Eg,
12503        Dpsiegr2_SPEC,
12504        crate::common::RW,
12505    > {
12506        crate::common::RegisterField::<
12507            1,
12508            0x1,
12509            1,
12510            0,
12511            dpsiegr2::Dpvd2Eg,
12512            dpsiegr2::Dpvd2Eg,
12513            Dpsiegr2_SPEC,
12514            crate::common::RW,
12515        >::from_register(self, 0)
12516    }
12517
12518    #[doc = "NMI Pin Edge Select"]
12519    #[inline(always)]
12520    pub fn dnmieg(
12521        self,
12522    ) -> crate::common::RegisterField<
12523        4,
12524        0x1,
12525        1,
12526        0,
12527        dpsiegr2::Dnmieg,
12528        dpsiegr2::Dnmieg,
12529        Dpsiegr2_SPEC,
12530        crate::common::RW,
12531    > {
12532        crate::common::RegisterField::<
12533            4,
12534            0x1,
12535            1,
12536            0,
12537            dpsiegr2::Dnmieg,
12538            dpsiegr2::Dnmieg,
12539            Dpsiegr2_SPEC,
12540            crate::common::RW,
12541        >::from_register(self, 0)
12542    }
12543}
12544impl ::core::default::Default for Dpsiegr2 {
12545    #[inline(always)]
12546    fn default() -> Dpsiegr2 {
12547        <crate::RegValueT<Dpsiegr2_SPEC> as RegisterValue<_>>::new(0)
12548    }
12549}
12550pub mod dpsiegr2 {
12551
12552    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12553    pub struct Dpvd1Eg_SPEC;
12554    pub type Dpvd1Eg = crate::EnumBitfieldStruct<u8, Dpvd1Eg_SPEC>;
12555    impl Dpvd1Eg {
12556        #[doc = "A cancel request is generated when VCC < Vdet1 (fall) is detected"]
12557        pub const _0: Self = Self::new(0);
12558
12559        #[doc = "A cancel request is generated when VCC ≥ Vdet1 (rise) is detected"]
12560        pub const _1: Self = Self::new(1);
12561    }
12562    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12563    pub struct Dpvd2Eg_SPEC;
12564    pub type Dpvd2Eg = crate::EnumBitfieldStruct<u8, Dpvd2Eg_SPEC>;
12565    impl Dpvd2Eg {
12566        #[doc = "A cancel request is generated when VCC < Vdet2 (fall) is detected"]
12567        pub const _0: Self = Self::new(0);
12568
12569        #[doc = "A cancel request is generated when VCC ≥ Vdet2 (rise) is detected"]
12570        pub const _1: Self = Self::new(1);
12571    }
12572    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12573    pub struct Dnmieg_SPEC;
12574    pub type Dnmieg = crate::EnumBitfieldStruct<u8, Dnmieg_SPEC>;
12575    impl Dnmieg {
12576        #[doc = "A cancel request is generated at a falling edge"]
12577        pub const _0: Self = Self::new(0);
12578
12579        #[doc = "A cancel request is generated at a rising edge"]
12580        pub const _1: Self = Self::new(1);
12581    }
12582}
12583#[doc(hidden)]
12584#[derive(Copy, Clone, Eq, PartialEq)]
12585pub struct Syocdcr_SPEC;
12586impl crate::sealed::RegSpec for Syocdcr_SPEC {
12587    type DataType = u8;
12588}
12589
12590#[doc = "System Control OCD Control Register"]
12591pub type Syocdcr = crate::RegValueT<Syocdcr_SPEC>;
12592
12593impl Syocdcr {
12594    #[doc = "Debugger Enable bit"]
12595    #[inline(always)]
12596    pub fn dbgen(
12597        self,
12598    ) -> crate::common::RegisterField<
12599        7,
12600        0x1,
12601        1,
12602        0,
12603        syocdcr::Dbgen,
12604        syocdcr::Dbgen,
12605        Syocdcr_SPEC,
12606        crate::common::RW,
12607    > {
12608        crate::common::RegisterField::<
12609            7,
12610            0x1,
12611            1,
12612            0,
12613            syocdcr::Dbgen,
12614            syocdcr::Dbgen,
12615            Syocdcr_SPEC,
12616            crate::common::RW,
12617        >::from_register(self, 0)
12618    }
12619}
12620impl ::core::default::Default for Syocdcr {
12621    #[inline(always)]
12622    fn default() -> Syocdcr {
12623        <crate::RegValueT<Syocdcr_SPEC> as RegisterValue<_>>::new(128)
12624    }
12625}
12626pub mod syocdcr {
12627
12628    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12629    pub struct Dbgen_SPEC;
12630    pub type Dbgen = crate::EnumBitfieldStruct<u8, Dbgen_SPEC>;
12631    impl Dbgen {
12632        #[doc = "On-chip debugger is disabled"]
12633        pub const _0: Self = Self::new(0);
12634
12635        #[doc = "On-chip debugger is enabled"]
12636        pub const _1: Self = Self::new(1);
12637    }
12638}
12639#[doc(hidden)]
12640#[derive(Copy, Clone, Eq, PartialEq)]
12641pub struct Rstsr0_SPEC;
12642impl crate::sealed::RegSpec for Rstsr0_SPEC {
12643    type DataType = u8;
12644}
12645
12646#[doc = "Reset Status Register 0"]
12647pub type Rstsr0 = crate::RegValueT<Rstsr0_SPEC>;
12648
12649impl Rstsr0 {
12650    #[doc = "Power-On Reset Detect Flag"]
12651    #[inline(always)]
12652    pub fn porf(
12653        self,
12654    ) -> crate::common::RegisterField<
12655        0,
12656        0x1,
12657        1,
12658        0,
12659        rstsr0::Porf,
12660        rstsr0::Porf,
12661        Rstsr0_SPEC,
12662        crate::common::RW,
12663    > {
12664        crate::common::RegisterField::<
12665            0,
12666            0x1,
12667            1,
12668            0,
12669            rstsr0::Porf,
12670            rstsr0::Porf,
12671            Rstsr0_SPEC,
12672            crate::common::RW,
12673        >::from_register(self, 0)
12674    }
12675
12676    #[doc = "Voltage Monitor 0 Reset Detect Flag"]
12677    #[inline(always)]
12678    pub fn pvd0rf(
12679        self,
12680    ) -> crate::common::RegisterField<
12681        1,
12682        0x1,
12683        1,
12684        0,
12685        rstsr0::Pvd0Rf,
12686        rstsr0::Pvd0Rf,
12687        Rstsr0_SPEC,
12688        crate::common::RW,
12689    > {
12690        crate::common::RegisterField::<
12691            1,
12692            0x1,
12693            1,
12694            0,
12695            rstsr0::Pvd0Rf,
12696            rstsr0::Pvd0Rf,
12697            Rstsr0_SPEC,
12698            crate::common::RW,
12699        >::from_register(self, 0)
12700    }
12701
12702    #[doc = "Voltage Monitor 1 Reset Detect Flag"]
12703    #[inline(always)]
12704    pub fn pvd1rf(
12705        self,
12706    ) -> crate::common::RegisterField<
12707        2,
12708        0x1,
12709        1,
12710        0,
12711        rstsr0::Pvd1Rf,
12712        rstsr0::Pvd1Rf,
12713        Rstsr0_SPEC,
12714        crate::common::RW,
12715    > {
12716        crate::common::RegisterField::<
12717            2,
12718            0x1,
12719            1,
12720            0,
12721            rstsr0::Pvd1Rf,
12722            rstsr0::Pvd1Rf,
12723            Rstsr0_SPEC,
12724            crate::common::RW,
12725        >::from_register(self, 0)
12726    }
12727
12728    #[doc = "Voltage Monitor 2 Reset Detect Flag"]
12729    #[inline(always)]
12730    pub fn pvd2rf(
12731        self,
12732    ) -> crate::common::RegisterField<
12733        3,
12734        0x1,
12735        1,
12736        0,
12737        rstsr0::Pvd2Rf,
12738        rstsr0::Pvd2Rf,
12739        Rstsr0_SPEC,
12740        crate::common::RW,
12741    > {
12742        crate::common::RegisterField::<
12743            3,
12744            0x1,
12745            1,
12746            0,
12747            rstsr0::Pvd2Rf,
12748            rstsr0::Pvd2Rf,
12749            Rstsr0_SPEC,
12750            crate::common::RW,
12751        >::from_register(self, 0)
12752    }
12753
12754    #[doc = "Deep Software Standby Reset Flag"]
12755    #[inline(always)]
12756    pub fn dpsrstf(
12757        self,
12758    ) -> crate::common::RegisterField<
12759        7,
12760        0x1,
12761        1,
12762        0,
12763        rstsr0::Dpsrstf,
12764        rstsr0::Dpsrstf,
12765        Rstsr0_SPEC,
12766        crate::common::RW,
12767    > {
12768        crate::common::RegisterField::<
12769            7,
12770            0x1,
12771            1,
12772            0,
12773            rstsr0::Dpsrstf,
12774            rstsr0::Dpsrstf,
12775            Rstsr0_SPEC,
12776            crate::common::RW,
12777        >::from_register(self, 0)
12778    }
12779}
12780impl ::core::default::Default for Rstsr0 {
12781    #[inline(always)]
12782    fn default() -> Rstsr0 {
12783        <crate::RegValueT<Rstsr0_SPEC> as RegisterValue<_>>::new(0)
12784    }
12785}
12786pub mod rstsr0 {
12787
12788    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12789    pub struct Porf_SPEC;
12790    pub type Porf = crate::EnumBitfieldStruct<u8, Porf_SPEC>;
12791    impl Porf {
12792        #[doc = "Power-on reset not detected"]
12793        pub const _0: Self = Self::new(0);
12794
12795        #[doc = "Power-on reset detected"]
12796        pub const _1: Self = Self::new(1);
12797    }
12798    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12799    pub struct Pvd0Rf_SPEC;
12800    pub type Pvd0Rf = crate::EnumBitfieldStruct<u8, Pvd0Rf_SPEC>;
12801    impl Pvd0Rf {
12802        #[doc = "Voltage monitor 0 reset not detected"]
12803        pub const _0: Self = Self::new(0);
12804
12805        #[doc = "Voltage monitor 0 reset detected"]
12806        pub const _1: Self = Self::new(1);
12807    }
12808    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12809    pub struct Pvd1Rf_SPEC;
12810    pub type Pvd1Rf = crate::EnumBitfieldStruct<u8, Pvd1Rf_SPEC>;
12811    impl Pvd1Rf {
12812        #[doc = "Voltage monitor 1 reset not detected"]
12813        pub const _0: Self = Self::new(0);
12814
12815        #[doc = "Voltage monitor 1 reset detected"]
12816        pub const _1: Self = Self::new(1);
12817    }
12818    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12819    pub struct Pvd2Rf_SPEC;
12820    pub type Pvd2Rf = crate::EnumBitfieldStruct<u8, Pvd2Rf_SPEC>;
12821    impl Pvd2Rf {
12822        #[doc = "Voltage monitor 2 reset not detected"]
12823        pub const _0: Self = Self::new(0);
12824
12825        #[doc = "Voltage monitor 2 reset detected"]
12826        pub const _1: Self = Self::new(1);
12827    }
12828    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12829    pub struct Dpsrstf_SPEC;
12830    pub type Dpsrstf = crate::EnumBitfieldStruct<u8, Dpsrstf_SPEC>;
12831    impl Dpsrstf {
12832        #[doc = "Deep Software Standby mode cancellation not requested by an interrupt or a reset."]
12833        pub const _0: Self = Self::new(0);
12834
12835        #[doc = "Deep Software Standby mode cancellation requested by an interrupt or a reset."]
12836        pub const _1: Self = Self::new(1);
12837    }
12838}
12839#[doc(hidden)]
12840#[derive(Copy, Clone, Eq, PartialEq)]
12841pub struct Rstsr2_SPEC;
12842impl crate::sealed::RegSpec for Rstsr2_SPEC {
12843    type DataType = u8;
12844}
12845
12846#[doc = "Reset Status Register 2"]
12847pub type Rstsr2 = crate::RegValueT<Rstsr2_SPEC>;
12848
12849impl Rstsr2 {
12850    #[doc = "Cold/Warm Start Determination Flag"]
12851    #[inline(always)]
12852    pub fn cwsf(
12853        self,
12854    ) -> crate::common::RegisterField<
12855        0,
12856        0x1,
12857        1,
12858        0,
12859        rstsr2::Cwsf,
12860        rstsr2::Cwsf,
12861        Rstsr2_SPEC,
12862        crate::common::RW,
12863    > {
12864        crate::common::RegisterField::<
12865            0,
12866            0x1,
12867            1,
12868            0,
12869            rstsr2::Cwsf,
12870            rstsr2::Cwsf,
12871            Rstsr2_SPEC,
12872            crate::common::RW,
12873        >::from_register(self, 0)
12874    }
12875}
12876impl ::core::default::Default for Rstsr2 {
12877    #[inline(always)]
12878    fn default() -> Rstsr2 {
12879        <crate::RegValueT<Rstsr2_SPEC> as RegisterValue<_>>::new(0)
12880    }
12881}
12882pub mod rstsr2 {
12883
12884    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12885    pub struct Cwsf_SPEC;
12886    pub type Cwsf = crate::EnumBitfieldStruct<u8, Cwsf_SPEC>;
12887    impl Cwsf {
12888        #[doc = "Cold start"]
12889        pub const _0: Self = Self::new(0);
12890
12891        #[doc = "Warm start"]
12892        pub const _1: Self = Self::new(1);
12893    }
12894}
12895#[doc(hidden)]
12896#[derive(Copy, Clone, Eq, PartialEq)]
12897pub struct Momcr_SPEC;
12898impl crate::sealed::RegSpec for Momcr_SPEC {
12899    type DataType = u8;
12900}
12901
12902#[doc = "Main Clock Oscillator Mode Oscillation Control Register"]
12903pub type Momcr = crate::RegValueT<Momcr_SPEC>;
12904
12905impl Momcr {
12906    #[doc = "Main Clock Oscillator Drive Capability 0 Switching"]
12907    #[inline(always)]
12908    pub fn modrv0(
12909        self,
12910    ) -> crate::common::RegisterField<
12911        1,
12912        0x7,
12913        1,
12914        0,
12915        momcr::Modrv0,
12916        momcr::Modrv0,
12917        Momcr_SPEC,
12918        crate::common::RW,
12919    > {
12920        crate::common::RegisterField::<
12921            1,
12922            0x7,
12923            1,
12924            0,
12925            momcr::Modrv0,
12926            momcr::Modrv0,
12927            Momcr_SPEC,
12928            crate::common::RW,
12929        >::from_register(self, 0)
12930    }
12931
12932    #[doc = "Main Clock Oscillator Switching"]
12933    #[inline(always)]
12934    pub fn mosel(
12935        self,
12936    ) -> crate::common::RegisterField<
12937        6,
12938        0x1,
12939        1,
12940        0,
12941        momcr::Mosel,
12942        momcr::Mosel,
12943        Momcr_SPEC,
12944        crate::common::RW,
12945    > {
12946        crate::common::RegisterField::<
12947            6,
12948            0x1,
12949            1,
12950            0,
12951            momcr::Mosel,
12952            momcr::Mosel,
12953            Momcr_SPEC,
12954            crate::common::RW,
12955        >::from_register(self, 0)
12956    }
12957}
12958impl ::core::default::Default for Momcr {
12959    #[inline(always)]
12960    fn default() -> Momcr {
12961        <crate::RegValueT<Momcr_SPEC> as RegisterValue<_>>::new(26)
12962    }
12963}
12964pub mod momcr {
12965
12966    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12967    pub struct Modrv0_SPEC;
12968    pub type Modrv0 = crate::EnumBitfieldStruct<u8, Modrv0_SPEC>;
12969    impl Modrv0 {
12970        #[doc = "8 MHz"]
12971        pub const _000: Self = Self::new(0);
12972
12973        #[doc = "8 MHz to 24 MHz"]
12974        pub const _011: Self = Self::new(3);
12975
12976        #[doc = "8 MHz to 48 MHz"]
12977        pub const _101: Self = Self::new(5);
12978
12979        #[doc = "Setting prohibited"]
12980        pub const OTHERS: Self = Self::new(0);
12981    }
12982    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
12983    pub struct Mosel_SPEC;
12984    pub type Mosel = crate::EnumBitfieldStruct<u8, Mosel_SPEC>;
12985    impl Mosel {
12986        #[doc = "Resonator"]
12987        pub const _0: Self = Self::new(0);
12988
12989        #[doc = "External clock input"]
12990        pub const _1: Self = Self::new(1);
12991    }
12992}
12993#[doc(hidden)]
12994#[derive(Copy, Clone, Eq, PartialEq)]
12995pub struct Fwepror_SPEC;
12996impl crate::sealed::RegSpec for Fwepror_SPEC {
12997    type DataType = u8;
12998}
12999
13000#[doc = "Flash P/E Protect Register"]
13001pub type Fwepror = crate::RegValueT<Fwepror_SPEC>;
13002
13003impl Fwepror {
13004    #[doc = "Flash Programming and Erasure"]
13005    #[inline(always)]
13006    pub fn flwe(
13007        self,
13008    ) -> crate::common::RegisterField<
13009        0,
13010        0x3,
13011        1,
13012        0,
13013        fwepror::Flwe,
13014        fwepror::Flwe,
13015        Fwepror_SPEC,
13016        crate::common::RW,
13017    > {
13018        crate::common::RegisterField::<
13019            0,
13020            0x3,
13021            1,
13022            0,
13023            fwepror::Flwe,
13024            fwepror::Flwe,
13025            Fwepror_SPEC,
13026            crate::common::RW,
13027        >::from_register(self, 0)
13028    }
13029}
13030impl ::core::default::Default for Fwepror {
13031    #[inline(always)]
13032    fn default() -> Fwepror {
13033        <crate::RegValueT<Fwepror_SPEC> as RegisterValue<_>>::new(2)
13034    }
13035}
13036pub mod fwepror {
13037
13038    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13039    pub struct Flwe_SPEC;
13040    pub type Flwe = crate::EnumBitfieldStruct<u8, Flwe_SPEC>;
13041    impl Flwe {
13042        #[doc = "Prohibits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
13043        pub const _00: Self = Self::new(0);
13044
13045        #[doc = "Permits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
13046        pub const _01: Self = Self::new(1);
13047
13048        #[doc = "Prohibits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
13049        pub const _10: Self = Self::new(2);
13050
13051        #[doc = "Prohibits Program, Block Erase, Multi Block Erase, Blank Check, and Configuration set command processing."]
13052        pub const _11: Self = Self::new(3);
13053    }
13054}
13055#[doc(hidden)]
13056#[derive(Copy, Clone, Eq, PartialEq)]
13057pub struct Pvdcmpcr_SPEC;
13058impl crate::sealed::RegSpec for Pvdcmpcr_SPEC {
13059    type DataType = u8;
13060}
13061
13062#[doc = "Voltage Monitor %s Comparator Control Register"]
13063pub type Pvdcmpcr = crate::RegValueT<Pvdcmpcr_SPEC>;
13064
13065impl Pvdcmpcr {
13066    #[doc = "Detection Voltage m Level Select"]
13067    #[inline(always)]
13068    pub fn pvdlvl(
13069        self,
13070    ) -> crate::common::RegisterField<
13071        0,
13072        0x1f,
13073        1,
13074        0,
13075        pvdcmpcr::Pvdlvl,
13076        pvdcmpcr::Pvdlvl,
13077        Pvdcmpcr_SPEC,
13078        crate::common::RW,
13079    > {
13080        crate::common::RegisterField::<
13081            0,
13082            0x1f,
13083            1,
13084            0,
13085            pvdcmpcr::Pvdlvl,
13086            pvdcmpcr::Pvdlvl,
13087            Pvdcmpcr_SPEC,
13088            crate::common::RW,
13089        >::from_register(self, 0)
13090    }
13091
13092    #[doc = "Voltage Detection m Enable"]
13093    #[inline(always)]
13094    pub fn pvde(
13095        self,
13096    ) -> crate::common::RegisterField<
13097        7,
13098        0x1,
13099        1,
13100        0,
13101        pvdcmpcr::Pvde,
13102        pvdcmpcr::Pvde,
13103        Pvdcmpcr_SPEC,
13104        crate::common::RW,
13105    > {
13106        crate::common::RegisterField::<
13107            7,
13108            0x1,
13109            1,
13110            0,
13111            pvdcmpcr::Pvde,
13112            pvdcmpcr::Pvde,
13113            Pvdcmpcr_SPEC,
13114            crate::common::RW,
13115        >::from_register(self, 0)
13116    }
13117}
13118impl ::core::default::Default for Pvdcmpcr {
13119    #[inline(always)]
13120    fn default() -> Pvdcmpcr {
13121        <crate::RegValueT<Pvdcmpcr_SPEC> as RegisterValue<_>>::new(15)
13122    }
13123}
13124pub mod pvdcmpcr {
13125
13126    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13127    pub struct Pvdlvl_SPEC;
13128    pub type Pvdlvl = crate::EnumBitfieldStruct<u8, Pvdlvl_SPEC>;
13129    impl Pvdlvl {
13130        #[doc = "3.86 V (Vdetm_3)"]
13131        pub const _0_X_03: Self = Self::new(3);
13132
13133        #[doc = "3.14 V (Vdetm_4)"]
13134        pub const _0_X_04: Self = Self::new(4);
13135
13136        #[doc = "3.10 V (Vdetm_5)"]
13137        pub const _0_X_05: Self = Self::new(5);
13138
13139        #[doc = "3.08 V (Vdetm_6)"]
13140        pub const _0_X_06: Self = Self::new(6);
13141
13142        #[doc = "2.85 V (Vdetm_7)"]
13143        pub const _0_X_07: Self = Self::new(7);
13144
13145        #[doc = "2.83 V (Vdetm_8)"]
13146        pub const _0_X_08: Self = Self::new(8);
13147
13148        #[doc = "2.80 V (Vdetm_9)"]
13149        pub const _0_X_09: Self = Self::new(9);
13150
13151        #[doc = "2.62V (Vdetm_10)"]
13152        pub const _0_X_0_A: Self = Self::new(10);
13153
13154        #[doc = "2.33V (Vdetm_11)"]
13155        pub const _0_X_0_B: Self = Self::new(11);
13156
13157        #[doc = "1.90V (Vdetm_12)"]
13158        pub const _0_X_0_C: Self = Self::new(12);
13159
13160        #[doc = "1.86V (Vdetm_13)"]
13161        pub const _0_X_0_D: Self = Self::new(13);
13162
13163        #[doc = "1.74V (Vdetm_14)"]
13164        pub const _0_X_0_E: Self = Self::new(14);
13165
13166        #[doc = "1.71V (Vdetm_15)"]
13167        pub const _0_X_0_F: Self = Self::new(15);
13168
13169        #[doc = "Setting prohibited"]
13170        pub const OTHERS: Self = Self::new(0);
13171    }
13172    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13173    pub struct Pvde_SPEC;
13174    pub type Pvde = crate::EnumBitfieldStruct<u8, Pvde_SPEC>;
13175    impl Pvde {
13176        #[doc = "Voltage detection m circuit disabled"]
13177        pub const _0: Self = Self::new(0);
13178
13179        #[doc = "Voltage detection m circuit enabled"]
13180        pub const _1: Self = Self::new(1);
13181    }
13182}
13183#[doc(hidden)]
13184#[derive(Copy, Clone, Eq, PartialEq)]
13185pub struct Pvdcr0_SPEC;
13186impl crate::sealed::RegSpec for Pvdcr0_SPEC {
13187    type DataType = u8;
13188}
13189
13190#[doc = "Voltage Monitor %s Circuit Control Register 0"]
13191pub type Pvdcr0 = crate::RegValueT<Pvdcr0_SPEC>;
13192
13193impl Pvdcr0 {
13194    #[doc = "Voltage Monitor m Interrupt/Reset Enable"]
13195    #[inline(always)]
13196    pub fn rie(
13197        self,
13198    ) -> crate::common::RegisterField<
13199        0,
13200        0x1,
13201        1,
13202        0,
13203        pvdcr0::Rie,
13204        pvdcr0::Rie,
13205        Pvdcr0_SPEC,
13206        crate::common::RW,
13207    > {
13208        crate::common::RegisterField::<
13209            0,
13210            0x1,
13211            1,
13212            0,
13213            pvdcr0::Rie,
13214            pvdcr0::Rie,
13215            Pvdcr0_SPEC,
13216            crate::common::RW,
13217        >::from_register(self, 0)
13218    }
13219
13220    #[doc = "Voltage monitor m Digital Filter Disabled Mode Select"]
13221    #[inline(always)]
13222    pub fn dfdis(
13223        self,
13224    ) -> crate::common::RegisterField<
13225        1,
13226        0x1,
13227        1,
13228        0,
13229        pvdcr0::Dfdis,
13230        pvdcr0::Dfdis,
13231        Pvdcr0_SPEC,
13232        crate::common::RW,
13233    > {
13234        crate::common::RegisterField::<
13235            1,
13236            0x1,
13237            1,
13238            0,
13239            pvdcr0::Dfdis,
13240            pvdcr0::Dfdis,
13241            Pvdcr0_SPEC,
13242            crate::common::RW,
13243        >::from_register(self, 0)
13244    }
13245
13246    #[doc = "Voltage Monitor m Circuit Comparison Result Output Enable"]
13247    #[inline(always)]
13248    pub fn cmpe(
13249        self,
13250    ) -> crate::common::RegisterField<
13251        2,
13252        0x1,
13253        1,
13254        0,
13255        pvdcr0::Cmpe,
13256        pvdcr0::Cmpe,
13257        Pvdcr0_SPEC,
13258        crate::common::RW,
13259    > {
13260        crate::common::RegisterField::<
13261            2,
13262            0x1,
13263            1,
13264            0,
13265            pvdcr0::Cmpe,
13266            pvdcr0::Cmpe,
13267            Pvdcr0_SPEC,
13268            crate::common::RW,
13269        >::from_register(self, 0)
13270    }
13271
13272    #[doc = "Sampling Clock Select"]
13273    #[inline(always)]
13274    pub fn fsamp(
13275        self,
13276    ) -> crate::common::RegisterField<
13277        4,
13278        0x3,
13279        1,
13280        0,
13281        pvdcr0::Fsamp,
13282        pvdcr0::Fsamp,
13283        Pvdcr0_SPEC,
13284        crate::common::RW,
13285    > {
13286        crate::common::RegisterField::<
13287            4,
13288            0x3,
13289            1,
13290            0,
13291            pvdcr0::Fsamp,
13292            pvdcr0::Fsamp,
13293            Pvdcr0_SPEC,
13294            crate::common::RW,
13295        >::from_register(self, 0)
13296    }
13297
13298    #[doc = "Voltage Monitor m Circuit Mode Select"]
13299    #[inline(always)]
13300    pub fn ri(self) -> crate::common::RegisterFieldBool<6, 1, 0, Pvdcr0_SPEC, crate::common::RW> {
13301        crate::common::RegisterFieldBool::<6, 1, 0, Pvdcr0_SPEC, crate::common::RW>::from_register(
13302            self, 0,
13303        )
13304    }
13305
13306    #[doc = "Voltage Monitor m Reset Negate Select"]
13307    #[inline(always)]
13308    pub fn rn(self) -> crate::common::RegisterFieldBool<7, 1, 0, Pvdcr0_SPEC, crate::common::RW> {
13309        crate::common::RegisterFieldBool::<7, 1, 0, Pvdcr0_SPEC, crate::common::RW>::from_register(
13310            self, 0,
13311        )
13312    }
13313}
13314impl ::core::default::Default for Pvdcr0 {
13315    #[inline(always)]
13316    fn default() -> Pvdcr0 {
13317        <crate::RegValueT<Pvdcr0_SPEC> as RegisterValue<_>>::new(130)
13318    }
13319}
13320pub mod pvdcr0 {
13321
13322    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13323    pub struct Rie_SPEC;
13324    pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
13325    impl Rie {
13326        #[doc = "Disable"]
13327        pub const _0: Self = Self::new(0);
13328
13329        #[doc = "Enable"]
13330        pub const _1: Self = Self::new(1);
13331    }
13332    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13333    pub struct Dfdis_SPEC;
13334    pub type Dfdis = crate::EnumBitfieldStruct<u8, Dfdis_SPEC>;
13335    impl Dfdis {
13336        #[doc = "Enable the digital filter"]
13337        pub const _0: Self = Self::new(0);
13338
13339        #[doc = "Disable the digital filter"]
13340        pub const _1: Self = Self::new(1);
13341    }
13342    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13343    pub struct Cmpe_SPEC;
13344    pub type Cmpe = crate::EnumBitfieldStruct<u8, Cmpe_SPEC>;
13345    impl Cmpe {
13346        #[doc = "Voltage monitor m circuit comparison result output disabled"]
13347        pub const _0: Self = Self::new(0);
13348
13349        #[doc = "Voltage monitor m circuit comparison result output enabled"]
13350        pub const _1: Self = Self::new(1);
13351    }
13352    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13353    pub struct Fsamp_SPEC;
13354    pub type Fsamp = crate::EnumBitfieldStruct<u8, Fsamp_SPEC>;
13355    impl Fsamp {
13356        #[doc = "1/2 LOCO frequency"]
13357        pub const _00: Self = Self::new(0);
13358
13359        #[doc = "1/4 LOCO frequency"]
13360        pub const _01: Self = Self::new(1);
13361
13362        #[doc = "1/8 LOCO frequency"]
13363        pub const _10: Self = Self::new(2);
13364
13365        #[doc = "1/16 LOCO frequency"]
13366        pub const _11: Self = Self::new(3);
13367    }
13368}
13369#[doc(hidden)]
13370#[derive(Copy, Clone, Eq, PartialEq)]
13371pub struct Vbattmnselr_SPEC;
13372impl crate::sealed::RegSpec for Vbattmnselr_SPEC {
13373    type DataType = u8;
13374}
13375
13376#[doc = "Battery Backup Voltage Monitor Function Select Register"]
13377pub type Vbattmnselr = crate::RegValueT<Vbattmnselr_SPEC>;
13378
13379impl Vbattmnselr {
13380    #[doc = "VBATT Voltage Monitor Function Select Bit"]
13381    #[inline(always)]
13382    pub fn vbtmnsel(
13383        self,
13384    ) -> crate::common::RegisterField<
13385        0,
13386        0x1,
13387        1,
13388        0,
13389        vbattmnselr::Vbtmnsel,
13390        vbattmnselr::Vbtmnsel,
13391        Vbattmnselr_SPEC,
13392        crate::common::RW,
13393    > {
13394        crate::common::RegisterField::<
13395            0,
13396            0x1,
13397            1,
13398            0,
13399            vbattmnselr::Vbtmnsel,
13400            vbattmnselr::Vbtmnsel,
13401            Vbattmnselr_SPEC,
13402            crate::common::RW,
13403        >::from_register(self, 0)
13404    }
13405}
13406impl ::core::default::Default for Vbattmnselr {
13407    #[inline(always)]
13408    fn default() -> Vbattmnselr {
13409        <crate::RegValueT<Vbattmnselr_SPEC> as RegisterValue<_>>::new(0)
13410    }
13411}
13412pub mod vbattmnselr {
13413
13414    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13415    pub struct Vbtmnsel_SPEC;
13416    pub type Vbtmnsel = crate::EnumBitfieldStruct<u8, Vbtmnsel_SPEC>;
13417    impl Vbtmnsel {
13418        #[doc = "Disables VBATT voltage monitor function"]
13419        pub const _0: Self = Self::new(0);
13420
13421        #[doc = "Enables VBATT voltage monitor function"]
13422        pub const _1: Self = Self::new(1);
13423    }
13424}
13425#[doc(hidden)]
13426#[derive(Copy, Clone, Eq, PartialEq)]
13427pub struct Vbtbpcr1_SPEC;
13428impl crate::sealed::RegSpec for Vbtbpcr1_SPEC {
13429    type DataType = u8;
13430}
13431
13432#[doc = "VBATT Battery Power Supply Control Register 1"]
13433pub type Vbtbpcr1 = crate::RegValueT<Vbtbpcr1_SPEC>;
13434
13435impl Vbtbpcr1 {
13436    #[doc = "Battery Power Supply Switch Stop"]
13437    #[inline(always)]
13438    pub fn bpwswstp(
13439        self,
13440    ) -> crate::common::RegisterField<
13441        0,
13442        0x1,
13443        1,
13444        0,
13445        vbtbpcr1::Bpwswstp,
13446        vbtbpcr1::Bpwswstp,
13447        Vbtbpcr1_SPEC,
13448        crate::common::RW,
13449    > {
13450        crate::common::RegisterField::<
13451            0,
13452            0x1,
13453            1,
13454            0,
13455            vbtbpcr1::Bpwswstp,
13456            vbtbpcr1::Bpwswstp,
13457            Vbtbpcr1_SPEC,
13458            crate::common::RW,
13459        >::from_register(self, 0)
13460    }
13461}
13462impl ::core::default::Default for Vbtbpcr1 {
13463    #[inline(always)]
13464    fn default() -> Vbtbpcr1 {
13465        <crate::RegValueT<Vbtbpcr1_SPEC> as RegisterValue<_>>::new(0)
13466    }
13467}
13468pub mod vbtbpcr1 {
13469
13470    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13471    pub struct Bpwswstp_SPEC;
13472    pub type Bpwswstp = crate::EnumBitfieldStruct<u8, Bpwswstp_SPEC>;
13473    impl Bpwswstp {
13474        #[doc = "Battery power supply switch enable"]
13475        pub const _0: Self = Self::new(0);
13476
13477        #[doc = "Battery power supply switch stop"]
13478        pub const _1: Self = Self::new(1);
13479    }
13480}
13481#[doc(hidden)]
13482#[derive(Copy, Clone, Eq, PartialEq)]
13483pub struct Lpscr_SPEC;
13484impl crate::sealed::RegSpec for Lpscr_SPEC {
13485    type DataType = u8;
13486}
13487
13488#[doc = "Low Power State Control Register"]
13489pub type Lpscr = crate::RegValueT<Lpscr_SPEC>;
13490
13491impl Lpscr {
13492    #[doc = "Low power mode setting bit"]
13493    #[inline(always)]
13494    pub fn lpmd(
13495        self,
13496    ) -> crate::common::RegisterField<
13497        0,
13498        0xf,
13499        1,
13500        0,
13501        lpscr::Lpmd,
13502        lpscr::Lpmd,
13503        Lpscr_SPEC,
13504        crate::common::RW,
13505    > {
13506        crate::common::RegisterField::<
13507            0,
13508            0xf,
13509            1,
13510            0,
13511            lpscr::Lpmd,
13512            lpscr::Lpmd,
13513            Lpscr_SPEC,
13514            crate::common::RW,
13515        >::from_register(self, 0)
13516    }
13517}
13518impl ::core::default::Default for Lpscr {
13519    #[inline(always)]
13520    fn default() -> Lpscr {
13521        <crate::RegValueT<Lpscr_SPEC> as RegisterValue<_>>::new(4)
13522    }
13523}
13524pub mod lpscr {
13525
13526    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13527    pub struct Lpmd_SPEC;
13528    pub type Lpmd = crate::EnumBitfieldStruct<u8, Lpmd_SPEC>;
13529    impl Lpmd {
13530        #[doc = "System Active"]
13531        pub const _0_X_0: Self = Self::new(0);
13532
13533        #[doc = "Software Standby mode"]
13534        pub const _0_X_4: Self = Self::new(4);
13535
13536        #[doc = "Deep Software Standby mode 1"]
13537        pub const _0_X_8: Self = Self::new(8);
13538
13539        #[doc = "Deep Software Standby mode 2"]
13540        pub const _0_X_9: Self = Self::new(9);
13541
13542        #[doc = "Deep Software Standby mode 3"]
13543        pub const _0_X_A: Self = Self::new(10);
13544
13545        #[doc = "Setting prohibited"]
13546        pub const OTHERS: Self = Self::new(0);
13547    }
13548}
13549#[doc(hidden)]
13550#[derive(Copy, Clone, Eq, PartialEq)]
13551pub struct Sscr1_SPEC;
13552impl crate::sealed::RegSpec for Sscr1_SPEC {
13553    type DataType = u8;
13554}
13555
13556#[doc = "Software Standby Control Register 1"]
13557pub type Sscr1 = crate::RegValueT<Sscr1_SPEC>;
13558
13559impl Sscr1 {
13560    #[doc = "Software Standby Fast Return"]
13561    #[inline(always)]
13562    pub fn ss1fr(
13563        self,
13564    ) -> crate::common::RegisterField<
13565        0,
13566        0x1,
13567        1,
13568        0,
13569        sscr1::Ss1Fr,
13570        sscr1::Ss1Fr,
13571        Sscr1_SPEC,
13572        crate::common::RW,
13573    > {
13574        crate::common::RegisterField::<
13575            0,
13576            0x1,
13577            1,
13578            0,
13579            sscr1::Ss1Fr,
13580            sscr1::Ss1Fr,
13581            Sscr1_SPEC,
13582            crate::common::RW,
13583        >::from_register(self, 0)
13584    }
13585}
13586impl ::core::default::Default for Sscr1 {
13587    #[inline(always)]
13588    fn default() -> Sscr1 {
13589        <crate::RegValueT<Sscr1_SPEC> as RegisterValue<_>>::new(0)
13590    }
13591}
13592pub mod sscr1 {
13593
13594    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13595    pub struct Ss1Fr_SPEC;
13596    pub type Ss1Fr = crate::EnumBitfieldStruct<u8, Ss1Fr_SPEC>;
13597    impl Ss1Fr {
13598        #[doc = "When returning from Software Standby mode, fast return function is disabled"]
13599        pub const _0: Self = Self::new(0);
13600
13601        #[doc = "When returning from Software Standby mode, fast return function is enabled"]
13602        pub const _1: Self = Self::new(1);
13603    }
13604}
13605#[doc(hidden)]
13606#[derive(Copy, Clone, Eq, PartialEq)]
13607pub struct Lvocr_SPEC;
13608impl crate::sealed::RegSpec for Lvocr_SPEC {
13609    type DataType = u8;
13610}
13611
13612#[doc = "Low Voltage Operation Control register"]
13613pub type Lvocr = crate::RegValueT<Lvocr_SPEC>;
13614
13615impl Lvocr {
13616    #[doc = "Low Voltage Operation 0 Enable"]
13617    #[inline(always)]
13618    pub fn lvo0e(
13619        self,
13620    ) -> crate::common::RegisterField<
13621        0,
13622        0x1,
13623        1,
13624        0,
13625        lvocr::Lvo0E,
13626        lvocr::Lvo0E,
13627        Lvocr_SPEC,
13628        crate::common::RW,
13629    > {
13630        crate::common::RegisterField::<
13631            0,
13632            0x1,
13633            1,
13634            0,
13635            lvocr::Lvo0E,
13636            lvocr::Lvo0E,
13637            Lvocr_SPEC,
13638            crate::common::RW,
13639        >::from_register(self, 0)
13640    }
13641
13642    #[doc = "Low Voltage Operation 1 Enable"]
13643    #[inline(always)]
13644    pub fn lvo1e(
13645        self,
13646    ) -> crate::common::RegisterField<
13647        1,
13648        0x1,
13649        1,
13650        0,
13651        lvocr::Lvo1E,
13652        lvocr::Lvo1E,
13653        Lvocr_SPEC,
13654        crate::common::RW,
13655    > {
13656        crate::common::RegisterField::<
13657            1,
13658            0x1,
13659            1,
13660            0,
13661            lvocr::Lvo1E,
13662            lvocr::Lvo1E,
13663            Lvocr_SPEC,
13664            crate::common::RW,
13665        >::from_register(self, 0)
13666    }
13667}
13668impl ::core::default::Default for Lvocr {
13669    #[inline(always)]
13670    fn default() -> Lvocr {
13671        <crate::RegValueT<Lvocr_SPEC> as RegisterValue<_>>::new(3)
13672    }
13673}
13674pub mod lvocr {
13675
13676    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13677    pub struct Lvo0E_SPEC;
13678    pub type Lvo0E = crate::EnumBitfieldStruct<u8, Lvo0E_SPEC>;
13679    impl Lvo0E {
13680        #[doc = "Disable"]
13681        pub const _0: Self = Self::new(0);
13682
13683        #[doc = "Enable"]
13684        pub const _1: Self = Self::new(1);
13685    }
13686    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13687    pub struct Lvo1E_SPEC;
13688    pub type Lvo1E = crate::EnumBitfieldStruct<u8, Lvo1E_SPEC>;
13689    impl Lvo1E {
13690        #[doc = "Disable"]
13691        pub const _0: Self = Self::new(0);
13692
13693        #[doc = "Enable"]
13694        pub const _1: Self = Self::new(1);
13695    }
13696}
13697#[doc(hidden)]
13698#[derive(Copy, Clone, Eq, PartialEq)]
13699pub struct Syrstmsk0_SPEC;
13700impl crate::sealed::RegSpec for Syrstmsk0_SPEC {
13701    type DataType = u8;
13702}
13703
13704#[doc = "System Reset Mask Control Register 0"]
13705pub type Syrstmsk0 = crate::RegValueT<Syrstmsk0_SPEC>;
13706
13707impl Syrstmsk0 {
13708    #[doc = "Independent Watchdog Timer Reset Mask"]
13709    #[inline(always)]
13710    pub fn iwdtmask(
13711        self,
13712    ) -> crate::common::RegisterField<
13713        0,
13714        0x1,
13715        1,
13716        0,
13717        syrstmsk0::Iwdtmask,
13718        syrstmsk0::Iwdtmask,
13719        Syrstmsk0_SPEC,
13720        crate::common::RW,
13721    > {
13722        crate::common::RegisterField::<
13723            0,
13724            0x1,
13725            1,
13726            0,
13727            syrstmsk0::Iwdtmask,
13728            syrstmsk0::Iwdtmask,
13729            Syrstmsk0_SPEC,
13730            crate::common::RW,
13731        >::from_register(self, 0)
13732    }
13733
13734    #[doc = "Watchdog Timer Reset Mask"]
13735    #[inline(always)]
13736    pub fn wdt0mask(
13737        self,
13738    ) -> crate::common::RegisterField<
13739        1,
13740        0x1,
13741        1,
13742        0,
13743        syrstmsk0::Wdt0Mask,
13744        syrstmsk0::Wdt0Mask,
13745        Syrstmsk0_SPEC,
13746        crate::common::RW,
13747    > {
13748        crate::common::RegisterField::<
13749            1,
13750            0x1,
13751            1,
13752            0,
13753            syrstmsk0::Wdt0Mask,
13754            syrstmsk0::Wdt0Mask,
13755            Syrstmsk0_SPEC,
13756            crate::common::RW,
13757        >::from_register(self, 0)
13758    }
13759
13760    #[doc = "Software Reset Mask"]
13761    #[inline(always)]
13762    pub fn swmask(
13763        self,
13764    ) -> crate::common::RegisterField<
13765        2,
13766        0x1,
13767        1,
13768        0,
13769        syrstmsk0::Swmask,
13770        syrstmsk0::Swmask,
13771        Syrstmsk0_SPEC,
13772        crate::common::RW,
13773    > {
13774        crate::common::RegisterField::<
13775            2,
13776            0x1,
13777            1,
13778            0,
13779            syrstmsk0::Swmask,
13780            syrstmsk0::Swmask,
13781            Syrstmsk0_SPEC,
13782            crate::common::RW,
13783        >::from_register(self, 0)
13784    }
13785
13786    #[doc = "CPU Lockup Reset Mask"]
13787    #[inline(always)]
13788    pub fn clu0mask(
13789        self,
13790    ) -> crate::common::RegisterField<
13791        4,
13792        0x1,
13793        1,
13794        0,
13795        syrstmsk0::Clu0Mask,
13796        syrstmsk0::Clu0Mask,
13797        Syrstmsk0_SPEC,
13798        crate::common::RW,
13799    > {
13800        crate::common::RegisterField::<
13801            4,
13802            0x1,
13803            1,
13804            0,
13805            syrstmsk0::Clu0Mask,
13806            syrstmsk0::Clu0Mask,
13807            Syrstmsk0_SPEC,
13808            crate::common::RW,
13809        >::from_register(self, 0)
13810    }
13811
13812    #[doc = "Common Memory Error Reset Mask"]
13813    #[inline(always)]
13814    pub fn cmmask(
13815        self,
13816    ) -> crate::common::RegisterField<
13817        6,
13818        0x1,
13819        1,
13820        0,
13821        syrstmsk0::Cmmask,
13822        syrstmsk0::Cmmask,
13823        Syrstmsk0_SPEC,
13824        crate::common::RW,
13825    > {
13826        crate::common::RegisterField::<
13827            6,
13828            0x1,
13829            1,
13830            0,
13831            syrstmsk0::Cmmask,
13832            syrstmsk0::Cmmask,
13833            Syrstmsk0_SPEC,
13834            crate::common::RW,
13835        >::from_register(self, 0)
13836    }
13837
13838    #[doc = "Bus Error Reset Mask"]
13839    #[inline(always)]
13840    pub fn busmask(
13841        self,
13842    ) -> crate::common::RegisterField<
13843        7,
13844        0x1,
13845        1,
13846        0,
13847        syrstmsk0::Busmask,
13848        syrstmsk0::Busmask,
13849        Syrstmsk0_SPEC,
13850        crate::common::RW,
13851    > {
13852        crate::common::RegisterField::<
13853            7,
13854            0x1,
13855            1,
13856            0,
13857            syrstmsk0::Busmask,
13858            syrstmsk0::Busmask,
13859            Syrstmsk0_SPEC,
13860            crate::common::RW,
13861        >::from_register(self, 0)
13862    }
13863}
13864impl ::core::default::Default for Syrstmsk0 {
13865    #[inline(always)]
13866    fn default() -> Syrstmsk0 {
13867        <crate::RegValueT<Syrstmsk0_SPEC> as RegisterValue<_>>::new(0)
13868    }
13869}
13870pub mod syrstmsk0 {
13871
13872    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13873    pub struct Iwdtmask_SPEC;
13874    pub type Iwdtmask = crate::EnumBitfieldStruct<u8, Iwdtmask_SPEC>;
13875    impl Iwdtmask {
13876        #[doc = "Reset occurrence is enabled"]
13877        pub const _0: Self = Self::new(0);
13878
13879        #[doc = "Reset occurrence is disabled"]
13880        pub const _1: Self = Self::new(1);
13881    }
13882    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13883    pub struct Wdt0Mask_SPEC;
13884    pub type Wdt0Mask = crate::EnumBitfieldStruct<u8, Wdt0Mask_SPEC>;
13885    impl Wdt0Mask {
13886        #[doc = "Reset occurrence is enabled"]
13887        pub const _0: Self = Self::new(0);
13888
13889        #[doc = "Reset occurrence is disabled"]
13890        pub const _1: Self = Self::new(1);
13891    }
13892    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13893    pub struct Swmask_SPEC;
13894    pub type Swmask = crate::EnumBitfieldStruct<u8, Swmask_SPEC>;
13895    impl Swmask {
13896        #[doc = "Reset occurrence is enabled"]
13897        pub const _0: Self = Self::new(0);
13898
13899        #[doc = "Reset occurrence is disabled"]
13900        pub const _1: Self = Self::new(1);
13901    }
13902    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13903    pub struct Clu0Mask_SPEC;
13904    pub type Clu0Mask = crate::EnumBitfieldStruct<u8, Clu0Mask_SPEC>;
13905    impl Clu0Mask {
13906        #[doc = "Reset occurrence is enabled"]
13907        pub const _0: Self = Self::new(0);
13908
13909        #[doc = "Reset occurrence is disabled"]
13910        pub const _1: Self = Self::new(1);
13911    }
13912    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13913    pub struct Cmmask_SPEC;
13914    pub type Cmmask = crate::EnumBitfieldStruct<u8, Cmmask_SPEC>;
13915    impl Cmmask {
13916        #[doc = "Reset occurrence is enabled"]
13917        pub const _0: Self = Self::new(0);
13918
13919        #[doc = "Reset occurrence is disabled"]
13920        pub const _1: Self = Self::new(1);
13921    }
13922    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
13923    pub struct Busmask_SPEC;
13924    pub type Busmask = crate::EnumBitfieldStruct<u8, Busmask_SPEC>;
13925    impl Busmask {
13926        #[doc = "Reset occurrence is enabled"]
13927        pub const _0: Self = Self::new(0);
13928
13929        #[doc = "Reset occurrence is disabled"]
13930        pub const _1: Self = Self::new(1);
13931    }
13932}
13933#[doc(hidden)]
13934#[derive(Copy, Clone, Eq, PartialEq)]
13935pub struct Syrstmsk2_SPEC;
13936impl crate::sealed::RegSpec for Syrstmsk2_SPEC {
13937    type DataType = u8;
13938}
13939
13940#[doc = "System Reset Mask Control Register 2"]
13941pub type Syrstmsk2 = crate::RegValueT<Syrstmsk2_SPEC>;
13942
13943impl Syrstmsk2 {
13944    #[doc = "Voltage Monitor 1 Reset Mask"]
13945    #[inline(always)]
13946    pub fn pvd1mask(
13947        self,
13948    ) -> crate::common::RegisterField<
13949        0,
13950        0x1,
13951        1,
13952        0,
13953        syrstmsk2::Pvd1Mask,
13954        syrstmsk2::Pvd1Mask,
13955        Syrstmsk2_SPEC,
13956        crate::common::RW,
13957    > {
13958        crate::common::RegisterField::<
13959            0,
13960            0x1,
13961            1,
13962            0,
13963            syrstmsk2::Pvd1Mask,
13964            syrstmsk2::Pvd1Mask,
13965            Syrstmsk2_SPEC,
13966            crate::common::RW,
13967        >::from_register(self, 0)
13968    }
13969
13970    #[doc = "Voltage Monitor 2 Reset Mask"]
13971    #[inline(always)]
13972    pub fn pvd2mask(
13973        self,
13974    ) -> crate::common::RegisterField<
13975        1,
13976        0x1,
13977        1,
13978        0,
13979        syrstmsk2::Pvd2Mask,
13980        syrstmsk2::Pvd2Mask,
13981        Syrstmsk2_SPEC,
13982        crate::common::RW,
13983    > {
13984        crate::common::RegisterField::<
13985            1,
13986            0x1,
13987            1,
13988            0,
13989            syrstmsk2::Pvd2Mask,
13990            syrstmsk2::Pvd2Mask,
13991            Syrstmsk2_SPEC,
13992            crate::common::RW,
13993        >::from_register(self, 0)
13994    }
13995}
13996impl ::core::default::Default for Syrstmsk2 {
13997    #[inline(always)]
13998    fn default() -> Syrstmsk2 {
13999        <crate::RegValueT<Syrstmsk2_SPEC> as RegisterValue<_>>::new(0)
14000    }
14001}
14002pub mod syrstmsk2 {
14003
14004    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
14005    pub struct Pvd1Mask_SPEC;
14006    pub type Pvd1Mask = crate::EnumBitfieldStruct<u8, Pvd1Mask_SPEC>;
14007    impl Pvd1Mask {
14008        #[doc = "Reset occurrence is enabled"]
14009        pub const _0: Self = Self::new(0);
14010
14011        #[doc = "Reset occurrence is disabled"]
14012        pub const _1: Self = Self::new(1);
14013    }
14014    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
14015    pub struct Pvd2Mask_SPEC;
14016    pub type Pvd2Mask = crate::EnumBitfieldStruct<u8, Pvd2Mask_SPEC>;
14017    impl Pvd2Mask {
14018        #[doc = "Reset occurrence is enabled"]
14019        pub const _0: Self = Self::new(0);
14020
14021        #[doc = "Reset occurrence is disabled"]
14022        pub const _1: Self = Self::new(1);
14023    }
14024}
14025#[doc(hidden)]
14026#[derive(Copy, Clone, Eq, PartialEq)]
14027pub struct Pll1Ldocr_SPEC;
14028impl crate::sealed::RegSpec for Pll1Ldocr_SPEC {
14029    type DataType = u8;
14030}
14031
14032#[doc = "PLL1-LDO Control Register"]
14033pub type Pll1Ldocr = crate::RegValueT<Pll1Ldocr_SPEC>;
14034
14035impl Pll1Ldocr {
14036    #[doc = "LDO Stop"]
14037    #[inline(always)]
14038    pub fn ldostp(
14039        self,
14040    ) -> crate::common::RegisterField<
14041        0,
14042        0x1,
14043        1,
14044        0,
14045        pll1ldocr::Ldostp,
14046        pll1ldocr::Ldostp,
14047        Pll1Ldocr_SPEC,
14048        crate::common::RW,
14049    > {
14050        crate::common::RegisterField::<
14051            0,
14052            0x1,
14053            1,
14054            0,
14055            pll1ldocr::Ldostp,
14056            pll1ldocr::Ldostp,
14057            Pll1Ldocr_SPEC,
14058            crate::common::RW,
14059        >::from_register(self, 0)
14060    }
14061
14062    #[doc = "STBY Keep"]
14063    #[inline(always)]
14064    pub fn skeep(
14065        self,
14066    ) -> crate::common::RegisterField<
14067        1,
14068        0x1,
14069        1,
14070        0,
14071        pll1ldocr::Skeep,
14072        pll1ldocr::Skeep,
14073        Pll1Ldocr_SPEC,
14074        crate::common::RW,
14075    > {
14076        crate::common::RegisterField::<
14077            1,
14078            0x1,
14079            1,
14080            0,
14081            pll1ldocr::Skeep,
14082            pll1ldocr::Skeep,
14083            Pll1Ldocr_SPEC,
14084            crate::common::RW,
14085        >::from_register(self, 0)
14086    }
14087}
14088impl ::core::default::Default for Pll1Ldocr {
14089    #[inline(always)]
14090    fn default() -> Pll1Ldocr {
14091        <crate::RegValueT<Pll1Ldocr_SPEC> as RegisterValue<_>>::new(0)
14092    }
14093}
14094pub mod pll1ldocr {
14095
14096    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
14097    pub struct Ldostp_SPEC;
14098    pub type Ldostp = crate::EnumBitfieldStruct<u8, Ldostp_SPEC>;
14099    impl Ldostp {
14100        #[doc = "PLL1-LDO is enabled"]
14101        pub const _0: Self = Self::new(0);
14102
14103        #[doc = "PLL1-LDO is stopped"]
14104        pub const _1: Self = Self::new(1);
14105    }
14106    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
14107    pub struct Skeep_SPEC;
14108    pub type Skeep = crate::EnumBitfieldStruct<u8, Skeep_SPEC>;
14109    impl Skeep {
14110        #[doc = "PLL1-LDO is stopped during Software Standby mode."]
14111        pub const _0: Self = Self::new(0);
14112
14113        #[doc = "PLL1-LDO state before Software Standby mode is retained during Software Standby mode."]
14114        pub const _1: Self = Self::new(1);
14115    }
14116}
14117#[doc(hidden)]
14118#[derive(Copy, Clone, Eq, PartialEq)]
14119pub struct Pll2Ldocr_SPEC;
14120impl crate::sealed::RegSpec for Pll2Ldocr_SPEC {
14121    type DataType = u8;
14122}
14123
14124#[doc = "PLL2-LDO Control Register"]
14125pub type Pll2Ldocr = crate::RegValueT<Pll2Ldocr_SPEC>;
14126
14127impl Pll2Ldocr {
14128    #[doc = "LDO Stop"]
14129    #[inline(always)]
14130    pub fn ldostp(
14131        self,
14132    ) -> crate::common::RegisterField<
14133        0,
14134        0x1,
14135        1,
14136        0,
14137        pll2ldocr::Ldostp,
14138        pll2ldocr::Ldostp,
14139        Pll2Ldocr_SPEC,
14140        crate::common::RW,
14141    > {
14142        crate::common::RegisterField::<
14143            0,
14144            0x1,
14145            1,
14146            0,
14147            pll2ldocr::Ldostp,
14148            pll2ldocr::Ldostp,
14149            Pll2Ldocr_SPEC,
14150            crate::common::RW,
14151        >::from_register(self, 0)
14152    }
14153
14154    #[doc = "STBY Keep"]
14155    #[inline(always)]
14156    pub fn skeep(
14157        self,
14158    ) -> crate::common::RegisterField<
14159        1,
14160        0x1,
14161        1,
14162        0,
14163        pll2ldocr::Skeep,
14164        pll2ldocr::Skeep,
14165        Pll2Ldocr_SPEC,
14166        crate::common::RW,
14167    > {
14168        crate::common::RegisterField::<
14169            1,
14170            0x1,
14171            1,
14172            0,
14173            pll2ldocr::Skeep,
14174            pll2ldocr::Skeep,
14175            Pll2Ldocr_SPEC,
14176            crate::common::RW,
14177        >::from_register(self, 0)
14178    }
14179}
14180impl ::core::default::Default for Pll2Ldocr {
14181    #[inline(always)]
14182    fn default() -> Pll2Ldocr {
14183        <crate::RegValueT<Pll2Ldocr_SPEC> as RegisterValue<_>>::new(0)
14184    }
14185}
14186pub mod pll2ldocr {
14187
14188    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
14189    pub struct Ldostp_SPEC;
14190    pub type Ldostp = crate::EnumBitfieldStruct<u8, Ldostp_SPEC>;
14191    impl Ldostp {
14192        #[doc = "PLL2-LDO is enabled"]
14193        pub const _0: Self = Self::new(0);
14194
14195        #[doc = "PLL2-LDO is stopped"]
14196        pub const _1: Self = Self::new(1);
14197    }
14198    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
14199    pub struct Skeep_SPEC;
14200    pub type Skeep = crate::EnumBitfieldStruct<u8, Skeep_SPEC>;
14201    impl Skeep {
14202        #[doc = "PLL2-LDO is stopped during Software Standby mode."]
14203        pub const _0: Self = Self::new(0);
14204
14205        #[doc = "PLL2-LDO state before Software Standby mode is retained during Software Standby mode."]
14206        pub const _1: Self = Self::new(1);
14207    }
14208}
14209#[doc(hidden)]
14210#[derive(Copy, Clone, Eq, PartialEq)]
14211pub struct Hocoldocr_SPEC;
14212impl crate::sealed::RegSpec for Hocoldocr_SPEC {
14213    type DataType = u8;
14214}
14215
14216#[doc = "HOCO-LDO Control Register"]
14217pub type Hocoldocr = crate::RegValueT<Hocoldocr_SPEC>;
14218
14219impl Hocoldocr {
14220    #[doc = "LDO Stop"]
14221    #[inline(always)]
14222    pub fn ldostp(
14223        self,
14224    ) -> crate::common::RegisterField<
14225        0,
14226        0x1,
14227        1,
14228        0,
14229        hocoldocr::Ldostp,
14230        hocoldocr::Ldostp,
14231        Hocoldocr_SPEC,
14232        crate::common::RW,
14233    > {
14234        crate::common::RegisterField::<
14235            0,
14236            0x1,
14237            1,
14238            0,
14239            hocoldocr::Ldostp,
14240            hocoldocr::Ldostp,
14241            Hocoldocr_SPEC,
14242            crate::common::RW,
14243        >::from_register(self, 0)
14244    }
14245
14246    #[doc = "STBY Keep"]
14247    #[inline(always)]
14248    pub fn skeep(
14249        self,
14250    ) -> crate::common::RegisterField<
14251        1,
14252        0x1,
14253        1,
14254        0,
14255        hocoldocr::Skeep,
14256        hocoldocr::Skeep,
14257        Hocoldocr_SPEC,
14258        crate::common::RW,
14259    > {
14260        crate::common::RegisterField::<
14261            1,
14262            0x1,
14263            1,
14264            0,
14265            hocoldocr::Skeep,
14266            hocoldocr::Skeep,
14267            Hocoldocr_SPEC,
14268            crate::common::RW,
14269        >::from_register(self, 0)
14270    }
14271}
14272impl ::core::default::Default for Hocoldocr {
14273    #[inline(always)]
14274    fn default() -> Hocoldocr {
14275        <crate::RegValueT<Hocoldocr_SPEC> as RegisterValue<_>>::new(0)
14276    }
14277}
14278pub mod hocoldocr {
14279
14280    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
14281    pub struct Ldostp_SPEC;
14282    pub type Ldostp = crate::EnumBitfieldStruct<u8, Ldostp_SPEC>;
14283    impl Ldostp {
14284        #[doc = "HOCO-LDO is enabled"]
14285        pub const _0: Self = Self::new(0);
14286
14287        #[doc = "HOCO-LDO is stopped"]
14288        pub const _1: Self = Self::new(1);
14289    }
14290    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
14291    pub struct Skeep_SPEC;
14292    pub type Skeep = crate::EnumBitfieldStruct<u8, Skeep_SPEC>;
14293    impl Skeep {
14294        #[doc = "HOCO-LDO is stopped during Software Standby mode."]
14295        pub const _0: Self = Self::new(0);
14296
14297        #[doc = "HOCO-LDO state before Software Standby mode is retained during Software Standby mode."]
14298        pub const _1: Self = Self::new(1);
14299    }
14300}
14301#[doc(hidden)]
14302#[derive(Copy, Clone, Eq, PartialEq)]
14303pub struct Pvdfcr_SPEC;
14304impl crate::sealed::RegSpec for Pvdfcr_SPEC {
14305    type DataType = u8;
14306}
14307
14308#[doc = "Voltage Monitor %s Function Control Register"]
14309pub type Pvdfcr = crate::RegValueT<Pvdfcr_SPEC>;
14310
14311impl Pvdfcr {
14312    #[doc = "Rise Hysteresis Select"]
14313    #[inline(always)]
14314    pub fn rhsel(
14315        self,
14316    ) -> crate::common::RegisterField<
14317        0,
14318        0x1,
14319        1,
14320        0,
14321        pvdfcr::Rhsel,
14322        pvdfcr::Rhsel,
14323        Pvdfcr_SPEC,
14324        crate::common::RW,
14325    > {
14326        crate::common::RegisterField::<
14327            0,
14328            0x1,
14329            1,
14330            0,
14331            pvdfcr::Rhsel,
14332            pvdfcr::Rhsel,
14333            Pvdfcr_SPEC,
14334            crate::common::RW,
14335        >::from_register(self, 0)
14336    }
14337}
14338impl ::core::default::Default for Pvdfcr {
14339    #[inline(always)]
14340    fn default() -> Pvdfcr {
14341        <crate::RegValueT<Pvdfcr_SPEC> as RegisterValue<_>>::new(0)
14342    }
14343}
14344pub mod pvdfcr {
14345
14346    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
14347    pub struct Rhsel_SPEC;
14348    pub type Rhsel = crate::EnumBitfieldStruct<u8, Rhsel_SPEC>;
14349    impl Rhsel {
14350        #[doc = "Hysteresis level for VCC-fall detection is selected."]
14351        pub const _0: Self = Self::new(0);
14352
14353        #[doc = "Hysteresis level for VCC-rise detection is selected."]
14354        pub const _1: Self = Self::new(1);
14355    }
14356}
14357#[doc(hidden)]
14358#[derive(Copy, Clone, Eq, PartialEq)]
14359pub struct Sosccr_SPEC;
14360impl crate::sealed::RegSpec for Sosccr_SPEC {
14361    type DataType = u8;
14362}
14363
14364#[doc = "Sub-Clock Oscillator Control Register"]
14365pub type Sosccr = crate::RegValueT<Sosccr_SPEC>;
14366
14367impl Sosccr {
14368    #[doc = "Sub-Clock Oscillator Stop"]
14369    #[inline(always)]
14370    pub fn sostp(
14371        self,
14372    ) -> crate::common::RegisterField<
14373        0,
14374        0x1,
14375        1,
14376        0,
14377        sosccr::Sostp,
14378        sosccr::Sostp,
14379        Sosccr_SPEC,
14380        crate::common::RW,
14381    > {
14382        crate::common::RegisterField::<
14383            0,
14384            0x1,
14385            1,
14386            0,
14387            sosccr::Sostp,
14388            sosccr::Sostp,
14389            Sosccr_SPEC,
14390            crate::common::RW,
14391        >::from_register(self, 0)
14392    }
14393}
14394impl ::core::default::Default for Sosccr {
14395    #[inline(always)]
14396    fn default() -> Sosccr {
14397        <crate::RegValueT<Sosccr_SPEC> as RegisterValue<_>>::new(1)
14398    }
14399}
14400pub mod sosccr {
14401
14402    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
14403    pub struct Sostp_SPEC;
14404    pub type Sostp = crate::EnumBitfieldStruct<u8, Sostp_SPEC>;
14405    impl Sostp {
14406        #[doc = "Operate the sub-clock oscillator"]
14407        pub const _0: Self = Self::new(0);
14408
14409        #[doc = "Stop the sub-clock oscillator"]
14410        pub const _1: Self = Self::new(1);
14411    }
14412}
14413#[doc(hidden)]
14414#[derive(Copy, Clone, Eq, PartialEq)]
14415pub struct Somcr_SPEC;
14416impl crate::sealed::RegSpec for Somcr_SPEC {
14417    type DataType = u8;
14418}
14419
14420#[doc = "Sub-Clock Oscillator Mode Control Register"]
14421pub type Somcr = crate::RegValueT<Somcr_SPEC>;
14422
14423impl Somcr {
14424    #[doc = "Sub-Clock Oscillator Drive Capability Switching"]
14425    #[inline(always)]
14426    pub fn sodrv(
14427        self,
14428    ) -> crate::common::RegisterField<
14429        0,
14430        0x3,
14431        1,
14432        0,
14433        somcr::Sodrv,
14434        somcr::Sodrv,
14435        Somcr_SPEC,
14436        crate::common::RW,
14437    > {
14438        crate::common::RegisterField::<
14439            0,
14440            0x3,
14441            1,
14442            0,
14443            somcr::Sodrv,
14444            somcr::Sodrv,
14445            Somcr_SPEC,
14446            crate::common::RW,
14447        >::from_register(self, 0)
14448    }
14449
14450    #[doc = "Sub-Clock Oscillator Switching"]
14451    #[inline(always)]
14452    pub fn sosel(
14453        self,
14454    ) -> crate::common::RegisterField<
14455        6,
14456        0x1,
14457        1,
14458        0,
14459        somcr::Sosel,
14460        somcr::Sosel,
14461        Somcr_SPEC,
14462        crate::common::RW,
14463    > {
14464        crate::common::RegisterField::<
14465            6,
14466            0x1,
14467            1,
14468            0,
14469            somcr::Sosel,
14470            somcr::Sosel,
14471            Somcr_SPEC,
14472            crate::common::RW,
14473        >::from_register(self, 0)
14474    }
14475}
14476impl ::core::default::Default for Somcr {
14477    #[inline(always)]
14478    fn default() -> Somcr {
14479        <crate::RegValueT<Somcr_SPEC> as RegisterValue<_>>::new(0)
14480    }
14481}
14482pub mod somcr {
14483
14484    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
14485    pub struct Sodrv_SPEC;
14486    pub type Sodrv = crate::EnumBitfieldStruct<u8, Sodrv_SPEC>;
14487    impl Sodrv {
14488        #[doc = "Standard (12.5pf)"]
14489        pub const _00: Self = Self::new(0);
14490
14491        #[doc = "Lowpower mode 1 (9pf)"]
14492        pub const _01: Self = Self::new(1);
14493
14494        #[doc = "Lowpower mode 2 (7pf)"]
14495        pub const _10: Self = Self::new(2);
14496
14497        #[doc = "Lowpower mode 3 (4pf)"]
14498        pub const _11: Self = Self::new(3);
14499    }
14500    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
14501    pub struct Sosel_SPEC;
14502    pub type Sosel = crate::EnumBitfieldStruct<u8, Sosel_SPEC>;
14503    impl Sosel {
14504        #[doc = "Resonator"]
14505        pub const _0: Self = Self::new(0);
14506
14507        #[doc = "External clock input"]
14508        pub const _1: Self = Self::new(1);
14509    }
14510}
14511#[doc(hidden)]
14512#[derive(Copy, Clone, Eq, PartialEq)]
14513pub struct Vbtber_SPEC;
14514impl crate::sealed::RegSpec for Vbtber_SPEC {
14515    type DataType = u8;
14516}
14517
14518#[doc = "VBATT Backup Enable Register"]
14519pub type Vbtber = crate::RegValueT<Vbtber_SPEC>;
14520
14521impl Vbtber {
14522    #[doc = "VBATT backup register access enable bit"]
14523    #[inline(always)]
14524    pub fn vbae(
14525        self,
14526    ) -> crate::common::RegisterField<
14527        3,
14528        0x1,
14529        1,
14530        0,
14531        vbtber::Vbae,
14532        vbtber::Vbae,
14533        Vbtber_SPEC,
14534        crate::common::RW,
14535    > {
14536        crate::common::RegisterField::<
14537            3,
14538            0x1,
14539            1,
14540            0,
14541            vbtber::Vbae,
14542            vbtber::Vbae,
14543            Vbtber_SPEC,
14544            crate::common::RW,
14545        >::from_register(self, 0)
14546    }
14547}
14548impl ::core::default::Default for Vbtber {
14549    #[inline(always)]
14550    fn default() -> Vbtber {
14551        <crate::RegValueT<Vbtber_SPEC> as RegisterValue<_>>::new(8)
14552    }
14553}
14554pub mod vbtber {
14555
14556    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
14557    pub struct Vbae_SPEC;
14558    pub type Vbae = crate::EnumBitfieldStruct<u8, Vbae_SPEC>;
14559    impl Vbae {
14560        #[doc = "Disable to access VBTBKR\\[n\\]"]
14561        pub const _0: Self = Self::new(0);
14562
14563        #[doc = "Enable to access VBTBKR\\[n\\]"]
14564        pub const _1: Self = Self::new(1);
14565    }
14566}
14567#[doc(hidden)]
14568#[derive(Copy, Clone, Eq, PartialEq)]
14569pub struct Vbtbpcr2_SPEC;
14570impl crate::sealed::RegSpec for Vbtbpcr2_SPEC {
14571    type DataType = u8;
14572}
14573
14574#[doc = "VBATT Battery Power Supply Control Register 2"]
14575pub type Vbtbpcr2 = crate::RegValueT<Vbtbpcr2_SPEC>;
14576
14577impl Vbtbpcr2 {
14578    #[doc = "VDETBAT Level Select"]
14579    #[inline(always)]
14580    pub fn vdetlvl(
14581        self,
14582    ) -> crate::common::RegisterField<
14583        0,
14584        0x7,
14585        1,
14586        0,
14587        vbtbpcr2::Vdetlvl,
14588        vbtbpcr2::Vdetlvl,
14589        Vbtbpcr2_SPEC,
14590        crate::common::RW,
14591    > {
14592        crate::common::RegisterField::<
14593            0,
14594            0x7,
14595            1,
14596            0,
14597            vbtbpcr2::Vdetlvl,
14598            vbtbpcr2::Vdetlvl,
14599            Vbtbpcr2_SPEC,
14600            crate::common::RW,
14601        >::from_register(self, 0)
14602    }
14603
14604    #[doc = "Voltage drop detection enable"]
14605    #[inline(always)]
14606    pub fn vdete(
14607        self,
14608    ) -> crate::common::RegisterField<
14609        4,
14610        0x1,
14611        1,
14612        0,
14613        vbtbpcr2::Vdete,
14614        vbtbpcr2::Vdete,
14615        Vbtbpcr2_SPEC,
14616        crate::common::RW,
14617    > {
14618        crate::common::RegisterField::<
14619            4,
14620            0x1,
14621            1,
14622            0,
14623            vbtbpcr2::Vdete,
14624            vbtbpcr2::Vdete,
14625            Vbtbpcr2_SPEC,
14626            crate::common::RW,
14627        >::from_register(self, 0)
14628    }
14629}
14630impl ::core::default::Default for Vbtbpcr2 {
14631    #[inline(always)]
14632    fn default() -> Vbtbpcr2 {
14633        <crate::RegValueT<Vbtbpcr2_SPEC> as RegisterValue<_>>::new(6)
14634    }
14635}
14636pub mod vbtbpcr2 {
14637
14638    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
14639    pub struct Vdetlvl_SPEC;
14640    pub type Vdetlvl = crate::EnumBitfieldStruct<u8, Vdetlvl_SPEC>;
14641    impl Vdetlvl {
14642        #[doc = "2.80 V"]
14643        pub const _000: Self = Self::new(0);
14644
14645        #[doc = "2.53 V"]
14646        pub const _001: Self = Self::new(1);
14647
14648        #[doc = "2.10 V"]
14649        pub const _010: Self = Self::new(2);
14650
14651        #[doc = "1.95 V"]
14652        pub const _011: Self = Self::new(3);
14653
14654        #[doc = "1.85 V"]
14655        pub const _100: Self = Self::new(4);
14656
14657        #[doc = "1.75 V"]
14658        pub const _101: Self = Self::new(5);
14659
14660        #[doc = "setting prohibited"]
14661        pub const _110: Self = Self::new(6);
14662
14663        #[doc = "setting prohibited"]
14664        pub const _111: Self = Self::new(7);
14665    }
14666    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
14667    pub struct Vdete_SPEC;
14668    pub type Vdete = crate::EnumBitfieldStruct<u8, Vdete_SPEC>;
14669    impl Vdete {
14670        #[doc = "VCC Voltage drop detection disable"]
14671        pub const _0: Self = Self::new(0);
14672
14673        #[doc = "VCC Voltage drop detection enable"]
14674        pub const _1: Self = Self::new(1);
14675    }
14676}
14677#[doc(hidden)]
14678#[derive(Copy, Clone, Eq, PartialEq)]
14679pub struct Vbtbpsr_SPEC;
14680impl crate::sealed::RegSpec for Vbtbpsr_SPEC {
14681    type DataType = u8;
14682}
14683
14684#[doc = "VBATT Battery Power Supply Status Register"]
14685pub type Vbtbpsr = crate::RegValueT<Vbtbpsr_SPEC>;
14686
14687impl Vbtbpsr {
14688    #[doc = "VBATT_POR Flag"]
14689    #[inline(always)]
14690    pub fn vbporf(
14691        self,
14692    ) -> crate::common::RegisterField<
14693        0,
14694        0x1,
14695        1,
14696        0,
14697        vbtbpsr::Vbporf,
14698        vbtbpsr::Vbporf,
14699        Vbtbpsr_SPEC,
14700        crate::common::RW,
14701    > {
14702        crate::common::RegisterField::<
14703            0,
14704            0x1,
14705            1,
14706            0,
14707            vbtbpsr::Vbporf,
14708            vbtbpsr::Vbporf,
14709            Vbtbpsr_SPEC,
14710            crate::common::RW,
14711        >::from_register(self, 0)
14712    }
14713
14714    #[doc = "VBATT_POR Monitor"]
14715    #[inline(always)]
14716    pub fn vbporm(
14717        self,
14718    ) -> crate::common::RegisterField<
14719        4,
14720        0x1,
14721        1,
14722        0,
14723        vbtbpsr::Vbporm,
14724        vbtbpsr::Vbporm,
14725        Vbtbpsr_SPEC,
14726        crate::common::R,
14727    > {
14728        crate::common::RegisterField::<
14729            4,
14730            0x1,
14731            1,
14732            0,
14733            vbtbpsr::Vbporm,
14734            vbtbpsr::Vbporm,
14735            Vbtbpsr_SPEC,
14736            crate::common::R,
14737        >::from_register(self, 0)
14738    }
14739
14740    #[doc = "Battery Power Supply Switch Status Monitor"]
14741    #[inline(always)]
14742    pub fn bpwswm(
14743        self,
14744    ) -> crate::common::RegisterField<
14745        5,
14746        0x1,
14747        1,
14748        0,
14749        vbtbpsr::Bpwswm,
14750        vbtbpsr::Bpwswm,
14751        Vbtbpsr_SPEC,
14752        crate::common::R,
14753    > {
14754        crate::common::RegisterField::<
14755            5,
14756            0x1,
14757            1,
14758            0,
14759            vbtbpsr::Bpwswm,
14760            vbtbpsr::Bpwswm,
14761            Vbtbpsr_SPEC,
14762            crate::common::R,
14763        >::from_register(self, 0)
14764    }
14765}
14766impl ::core::default::Default for Vbtbpsr {
14767    #[inline(always)]
14768    fn default() -> Vbtbpsr {
14769        <crate::RegValueT<Vbtbpsr_SPEC> as RegisterValue<_>>::new(0)
14770    }
14771}
14772pub mod vbtbpsr {
14773
14774    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
14775    pub struct Vbporf_SPEC;
14776    pub type Vbporf = crate::EnumBitfieldStruct<u8, Vbporf_SPEC>;
14777    impl Vbporf {
14778        #[doc = "VBATT_R voltage drop is not detected"]
14779        pub const _0: Self = Self::new(0);
14780
14781        #[doc = "VBATT_R voltage drop is detected"]
14782        pub const _1: Self = Self::new(1);
14783    }
14784    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
14785    pub struct Vbporm_SPEC;
14786    pub type Vbporm = crate::EnumBitfieldStruct<u8, Vbporm_SPEC>;
14787    impl Vbporm {
14788        #[doc = "VBATT_R voltage < VPDR (BATR)"]
14789        pub const _0: Self = Self::new(0);
14790
14791        #[doc = "VBATT_R voltage > VPDR (BATR)"]
14792        pub const _1: Self = Self::new(1);
14793    }
14794    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
14795    pub struct Bpwswm_SPEC;
14796    pub type Bpwswm = crate::EnumBitfieldStruct<u8, Bpwswm_SPEC>;
14797    impl Bpwswm {
14798        #[doc = "VCC voltage < VDETBATT_m"]
14799        pub const _0: Self = Self::new(0);
14800
14801        #[doc = "VCC voltage > VDETBATT_m"]
14802        pub const _1: Self = Self::new(1);
14803    }
14804}
14805#[doc(hidden)]
14806#[derive(Copy, Clone, Eq, PartialEq)]
14807pub struct Vbtadsr_SPEC;
14808impl crate::sealed::RegSpec for Vbtadsr_SPEC {
14809    type DataType = u8;
14810}
14811
14812#[doc = "VBATT Tamper detection Status Register"]
14813pub type Vbtadsr = crate::RegValueT<Vbtadsr_SPEC>;
14814
14815impl Vbtadsr {
14816    #[doc = "VBATT Tamper Detection flag 0"]
14817    #[inline(always)]
14818    pub fn vbtadf0(
14819        self,
14820    ) -> crate::common::RegisterField<
14821        0,
14822        0x1,
14823        1,
14824        0,
14825        vbtadsr::Vbtadf0,
14826        vbtadsr::Vbtadf0,
14827        Vbtadsr_SPEC,
14828        crate::common::RW,
14829    > {
14830        crate::common::RegisterField::<
14831            0,
14832            0x1,
14833            1,
14834            0,
14835            vbtadsr::Vbtadf0,
14836            vbtadsr::Vbtadf0,
14837            Vbtadsr_SPEC,
14838            crate::common::RW,
14839        >::from_register(self, 0)
14840    }
14841
14842    #[doc = "VBATT Tamper Detection flag 1"]
14843    #[inline(always)]
14844    pub fn vbtadf1(
14845        self,
14846    ) -> crate::common::RegisterField<
14847        1,
14848        0x1,
14849        1,
14850        0,
14851        vbtadsr::Vbtadf1,
14852        vbtadsr::Vbtadf1,
14853        Vbtadsr_SPEC,
14854        crate::common::RW,
14855    > {
14856        crate::common::RegisterField::<
14857            1,
14858            0x1,
14859            1,
14860            0,
14861            vbtadsr::Vbtadf1,
14862            vbtadsr::Vbtadf1,
14863            Vbtadsr_SPEC,
14864            crate::common::RW,
14865        >::from_register(self, 0)
14866    }
14867
14868    #[doc = "VBATT Tamper Detection flag 2"]
14869    #[inline(always)]
14870    pub fn vbtadf2(
14871        self,
14872    ) -> crate::common::RegisterField<
14873        2,
14874        0x1,
14875        1,
14876        0,
14877        vbtadsr::Vbtadf2,
14878        vbtadsr::Vbtadf2,
14879        Vbtadsr_SPEC,
14880        crate::common::RW,
14881    > {
14882        crate::common::RegisterField::<
14883            2,
14884            0x1,
14885            1,
14886            0,
14887            vbtadsr::Vbtadf2,
14888            vbtadsr::Vbtadf2,
14889            Vbtadsr_SPEC,
14890            crate::common::RW,
14891        >::from_register(self, 0)
14892    }
14893}
14894impl ::core::default::Default for Vbtadsr {
14895    #[inline(always)]
14896    fn default() -> Vbtadsr {
14897        <crate::RegValueT<Vbtadsr_SPEC> as RegisterValue<_>>::new(0)
14898    }
14899}
14900pub mod vbtadsr {
14901
14902    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
14903    pub struct Vbtadf0_SPEC;
14904    pub type Vbtadf0 = crate::EnumBitfieldStruct<u8, Vbtadf0_SPEC>;
14905    impl Vbtadf0 {
14906        #[doc = "RTCIC0 input edge is not detected"]
14907        pub const _0: Self = Self::new(0);
14908
14909        #[doc = "RTCIC0 input edge is detected"]
14910        pub const _1: Self = Self::new(1);
14911    }
14912    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
14913    pub struct Vbtadf1_SPEC;
14914    pub type Vbtadf1 = crate::EnumBitfieldStruct<u8, Vbtadf1_SPEC>;
14915    impl Vbtadf1 {
14916        #[doc = "RTCIC1 input edge is not detected"]
14917        pub const _0: Self = Self::new(0);
14918
14919        #[doc = "RTCIC1 input edge is detected"]
14920        pub const _1: Self = Self::new(1);
14921    }
14922    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
14923    pub struct Vbtadf2_SPEC;
14924    pub type Vbtadf2 = crate::EnumBitfieldStruct<u8, Vbtadf2_SPEC>;
14925    impl Vbtadf2 {
14926        #[doc = "RTCIC2 input edge is not detected"]
14927        pub const _0: Self = Self::new(0);
14928
14929        #[doc = "RTCIC2 input edge is detected"]
14930        pub const _1: Self = Self::new(1);
14931    }
14932}
14933#[doc(hidden)]
14934#[derive(Copy, Clone, Eq, PartialEq)]
14935pub struct Vbtadcr1_SPEC;
14936impl crate::sealed::RegSpec for Vbtadcr1_SPEC {
14937    type DataType = u8;
14938}
14939
14940#[doc = "VBATT Tamper detection Control Register 1"]
14941pub type Vbtadcr1 = crate::RegValueT<Vbtadcr1_SPEC>;
14942
14943impl Vbtadcr1 {
14944    #[doc = "VBATT Tamper Detection Interrupt Enable 0"]
14945    #[inline(always)]
14946    pub fn vbtadie0(
14947        self,
14948    ) -> crate::common::RegisterField<
14949        0,
14950        0x1,
14951        1,
14952        0,
14953        vbtadcr1::Vbtadie0,
14954        vbtadcr1::Vbtadie0,
14955        Vbtadcr1_SPEC,
14956        crate::common::RW,
14957    > {
14958        crate::common::RegisterField::<
14959            0,
14960            0x1,
14961            1,
14962            0,
14963            vbtadcr1::Vbtadie0,
14964            vbtadcr1::Vbtadie0,
14965            Vbtadcr1_SPEC,
14966            crate::common::RW,
14967        >::from_register(self, 0)
14968    }
14969
14970    #[doc = "VBATT Tamper Detection Interrupt Enable 1"]
14971    #[inline(always)]
14972    pub fn vbtadie1(
14973        self,
14974    ) -> crate::common::RegisterField<
14975        1,
14976        0x1,
14977        1,
14978        0,
14979        vbtadcr1::Vbtadie1,
14980        vbtadcr1::Vbtadie1,
14981        Vbtadcr1_SPEC,
14982        crate::common::RW,
14983    > {
14984        crate::common::RegisterField::<
14985            1,
14986            0x1,
14987            1,
14988            0,
14989            vbtadcr1::Vbtadie1,
14990            vbtadcr1::Vbtadie1,
14991            Vbtadcr1_SPEC,
14992            crate::common::RW,
14993        >::from_register(self, 0)
14994    }
14995
14996    #[doc = "VBATT Tamper Detection Interrupt Enable 2"]
14997    #[inline(always)]
14998    pub fn vbtadie2(
14999        self,
15000    ) -> crate::common::RegisterField<
15001        2,
15002        0x1,
15003        1,
15004        0,
15005        vbtadcr1::Vbtadie2,
15006        vbtadcr1::Vbtadie2,
15007        Vbtadcr1_SPEC,
15008        crate::common::RW,
15009    > {
15010        crate::common::RegisterField::<
15011            2,
15012            0x1,
15013            1,
15014            0,
15015            vbtadcr1::Vbtadie2,
15016            vbtadcr1::Vbtadie2,
15017            Vbtadcr1_SPEC,
15018            crate::common::RW,
15019        >::from_register(self, 0)
15020    }
15021
15022    #[doc = "VBATT Tamper Detection Backup Register Clear Enable 0"]
15023    #[inline(always)]
15024    pub fn vbtadce0(
15025        self,
15026    ) -> crate::common::RegisterField<
15027        4,
15028        0x1,
15029        1,
15030        0,
15031        vbtadcr1::Vbtadce0,
15032        vbtadcr1::Vbtadce0,
15033        Vbtadcr1_SPEC,
15034        crate::common::RW,
15035    > {
15036        crate::common::RegisterField::<
15037            4,
15038            0x1,
15039            1,
15040            0,
15041            vbtadcr1::Vbtadce0,
15042            vbtadcr1::Vbtadce0,
15043            Vbtadcr1_SPEC,
15044            crate::common::RW,
15045        >::from_register(self, 0)
15046    }
15047
15048    #[doc = "VBATT Tamper Detection Backup Register Clear Enable 1"]
15049    #[inline(always)]
15050    pub fn vbtadce1(
15051        self,
15052    ) -> crate::common::RegisterField<
15053        5,
15054        0x1,
15055        1,
15056        0,
15057        vbtadcr1::Vbtadce1,
15058        vbtadcr1::Vbtadce1,
15059        Vbtadcr1_SPEC,
15060        crate::common::RW,
15061    > {
15062        crate::common::RegisterField::<
15063            5,
15064            0x1,
15065            1,
15066            0,
15067            vbtadcr1::Vbtadce1,
15068            vbtadcr1::Vbtadce1,
15069            Vbtadcr1_SPEC,
15070            crate::common::RW,
15071        >::from_register(self, 0)
15072    }
15073
15074    #[doc = "VBATT Tamper Detection Backup Register Clear Enable 2"]
15075    #[inline(always)]
15076    pub fn vbtadce2(
15077        self,
15078    ) -> crate::common::RegisterField<
15079        6,
15080        0x1,
15081        1,
15082        0,
15083        vbtadcr1::Vbtadce2,
15084        vbtadcr1::Vbtadce2,
15085        Vbtadcr1_SPEC,
15086        crate::common::RW,
15087    > {
15088        crate::common::RegisterField::<
15089            6,
15090            0x1,
15091            1,
15092            0,
15093            vbtadcr1::Vbtadce2,
15094            vbtadcr1::Vbtadce2,
15095            Vbtadcr1_SPEC,
15096            crate::common::RW,
15097        >::from_register(self, 0)
15098    }
15099}
15100impl ::core::default::Default for Vbtadcr1 {
15101    #[inline(always)]
15102    fn default() -> Vbtadcr1 {
15103        <crate::RegValueT<Vbtadcr1_SPEC> as RegisterValue<_>>::new(0)
15104    }
15105}
15106pub mod vbtadcr1 {
15107
15108    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
15109    pub struct Vbtadie0_SPEC;
15110    pub type Vbtadie0 = crate::EnumBitfieldStruct<u8, Vbtadie0_SPEC>;
15111    impl Vbtadie0 {
15112        #[doc = "Interrupt by VBTADF0 flag is disable"]
15113        pub const _0: Self = Self::new(0);
15114
15115        #[doc = "Interrupt by VBTADF0 flag is enable"]
15116        pub const _1: Self = Self::new(1);
15117    }
15118    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
15119    pub struct Vbtadie1_SPEC;
15120    pub type Vbtadie1 = crate::EnumBitfieldStruct<u8, Vbtadie1_SPEC>;
15121    impl Vbtadie1 {
15122        #[doc = "Interrupt by VBTADF1 flag is disable"]
15123        pub const _0: Self = Self::new(0);
15124
15125        #[doc = "Interrupt by VBTADF1 flag is enable"]
15126        pub const _1: Self = Self::new(1);
15127    }
15128    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
15129    pub struct Vbtadie2_SPEC;
15130    pub type Vbtadie2 = crate::EnumBitfieldStruct<u8, Vbtadie2_SPEC>;
15131    impl Vbtadie2 {
15132        #[doc = "Interrupt by VBTADF2 flag is disable"]
15133        pub const _0: Self = Self::new(0);
15134
15135        #[doc = "Interrupt by VBTADF2 flag is enable"]
15136        pub const _1: Self = Self::new(1);
15137    }
15138    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
15139    pub struct Vbtadce0_SPEC;
15140    pub type Vbtadce0 = crate::EnumBitfieldStruct<u8, Vbtadce0_SPEC>;
15141    impl Vbtadce0 {
15142        #[doc = "Clear Backup Register by VBTADF0 flag is disable"]
15143        pub const _0: Self = Self::new(0);
15144
15145        #[doc = "Clear Backup Register by VBTADF0 flag is enable"]
15146        pub const _1: Self = Self::new(1);
15147    }
15148    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
15149    pub struct Vbtadce1_SPEC;
15150    pub type Vbtadce1 = crate::EnumBitfieldStruct<u8, Vbtadce1_SPEC>;
15151    impl Vbtadce1 {
15152        #[doc = "Clear Backup Register by VBTADF1 flag is disable"]
15153        pub const _0: Self = Self::new(0);
15154
15155        #[doc = "Clear Backup Register by VBTADF1 flag is enable"]
15156        pub const _1: Self = Self::new(1);
15157    }
15158    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
15159    pub struct Vbtadce2_SPEC;
15160    pub type Vbtadce2 = crate::EnumBitfieldStruct<u8, Vbtadce2_SPEC>;
15161    impl Vbtadce2 {
15162        #[doc = "Clear Backup Register by VBTADF2 flag is disable"]
15163        pub const _0: Self = Self::new(0);
15164
15165        #[doc = "Clear Backup Register by VBTADF2 flag is enable"]
15166        pub const _1: Self = Self::new(1);
15167    }
15168}
15169#[doc(hidden)]
15170#[derive(Copy, Clone, Eq, PartialEq)]
15171pub struct Vbtadcr2_SPEC;
15172impl crate::sealed::RegSpec for Vbtadcr2_SPEC {
15173    type DataType = u8;
15174}
15175
15176#[doc = "VBATT Tamper detection Control Register 2"]
15177pub type Vbtadcr2 = crate::RegValueT<Vbtadcr2_SPEC>;
15178
15179impl Vbtadcr2 {
15180    #[doc = "VBATT RTC Time Capture Event Source Select 0"]
15181    #[inline(always)]
15182    pub fn vbrtces0(
15183        self,
15184    ) -> crate::common::RegisterField<
15185        0,
15186        0x1,
15187        1,
15188        0,
15189        vbtadcr2::Vbrtces0,
15190        vbtadcr2::Vbrtces0,
15191        Vbtadcr2_SPEC,
15192        crate::common::RW,
15193    > {
15194        crate::common::RegisterField::<
15195            0,
15196            0x1,
15197            1,
15198            0,
15199            vbtadcr2::Vbrtces0,
15200            vbtadcr2::Vbrtces0,
15201            Vbtadcr2_SPEC,
15202            crate::common::RW,
15203        >::from_register(self, 0)
15204    }
15205
15206    #[doc = "VBATT RTC Time Capture Event Source Select 1"]
15207    #[inline(always)]
15208    pub fn vbrtces1(
15209        self,
15210    ) -> crate::common::RegisterField<
15211        1,
15212        0x1,
15213        1,
15214        0,
15215        vbtadcr2::Vbrtces1,
15216        vbtadcr2::Vbrtces1,
15217        Vbtadcr2_SPEC,
15218        crate::common::RW,
15219    > {
15220        crate::common::RegisterField::<
15221            1,
15222            0x1,
15223            1,
15224            0,
15225            vbtadcr2::Vbrtces1,
15226            vbtadcr2::Vbrtces1,
15227            Vbtadcr2_SPEC,
15228            crate::common::RW,
15229        >::from_register(self, 0)
15230    }
15231
15232    #[doc = "VBATT RTC Time Capture Event Source Select 2"]
15233    #[inline(always)]
15234    pub fn vbrtces2(
15235        self,
15236    ) -> crate::common::RegisterField<
15237        2,
15238        0x1,
15239        1,
15240        0,
15241        vbtadcr2::Vbrtces2,
15242        vbtadcr2::Vbrtces2,
15243        Vbtadcr2_SPEC,
15244        crate::common::RW,
15245    > {
15246        crate::common::RegisterField::<
15247            2,
15248            0x1,
15249            1,
15250            0,
15251            vbtadcr2::Vbrtces2,
15252            vbtadcr2::Vbrtces2,
15253            Vbtadcr2_SPEC,
15254            crate::common::RW,
15255        >::from_register(self, 0)
15256    }
15257}
15258impl ::core::default::Default for Vbtadcr2 {
15259    #[inline(always)]
15260    fn default() -> Vbtadcr2 {
15261        <crate::RegValueT<Vbtadcr2_SPEC> as RegisterValue<_>>::new(0)
15262    }
15263}
15264pub mod vbtadcr2 {
15265
15266    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
15267    pub struct Vbrtces0_SPEC;
15268    pub type Vbrtces0 = crate::EnumBitfieldStruct<u8, Vbrtces0_SPEC>;
15269    impl Vbrtces0 {
15270        #[doc = "RTCIC0"]
15271        pub const _0: Self = Self::new(0);
15272
15273        #[doc = "VBTADF0"]
15274        pub const _1: Self = Self::new(1);
15275    }
15276    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
15277    pub struct Vbrtces1_SPEC;
15278    pub type Vbrtces1 = crate::EnumBitfieldStruct<u8, Vbrtces1_SPEC>;
15279    impl Vbrtces1 {
15280        #[doc = "RTCIC1"]
15281        pub const _0: Self = Self::new(0);
15282
15283        #[doc = "VBTADF1"]
15284        pub const _1: Self = Self::new(1);
15285    }
15286    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
15287    pub struct Vbrtces2_SPEC;
15288    pub type Vbrtces2 = crate::EnumBitfieldStruct<u8, Vbrtces2_SPEC>;
15289    impl Vbrtces2 {
15290        #[doc = "RTCIC2"]
15291        pub const _0: Self = Self::new(0);
15292
15293        #[doc = "VBTADF2"]
15294        pub const _1: Self = Self::new(1);
15295    }
15296}
15297#[doc(hidden)]
15298#[derive(Copy, Clone, Eq, PartialEq)]
15299pub struct Vbtictlr_SPEC;
15300impl crate::sealed::RegSpec for Vbtictlr_SPEC {
15301    type DataType = u8;
15302}
15303
15304#[doc = "VBATT Input Control Register"]
15305pub type Vbtictlr = crate::RegValueT<Vbtictlr_SPEC>;
15306
15307impl Vbtictlr {
15308    #[doc = "VBATT CH0 Input Enable"]
15309    #[inline(always)]
15310    pub fn vch0inen(
15311        self,
15312    ) -> crate::common::RegisterField<
15313        0,
15314        0x1,
15315        1,
15316        0,
15317        vbtictlr::Vch0Inen,
15318        vbtictlr::Vch0Inen,
15319        Vbtictlr_SPEC,
15320        crate::common::RW,
15321    > {
15322        crate::common::RegisterField::<
15323            0,
15324            0x1,
15325            1,
15326            0,
15327            vbtictlr::Vch0Inen,
15328            vbtictlr::Vch0Inen,
15329            Vbtictlr_SPEC,
15330            crate::common::RW,
15331        >::from_register(self, 0)
15332    }
15333
15334    #[doc = "VBATT CH1 Input Enable"]
15335    #[inline(always)]
15336    pub fn vch1inen(
15337        self,
15338    ) -> crate::common::RegisterField<
15339        1,
15340        0x1,
15341        1,
15342        0,
15343        vbtictlr::Vch1Inen,
15344        vbtictlr::Vch1Inen,
15345        Vbtictlr_SPEC,
15346        crate::common::RW,
15347    > {
15348        crate::common::RegisterField::<
15349            1,
15350            0x1,
15351            1,
15352            0,
15353            vbtictlr::Vch1Inen,
15354            vbtictlr::Vch1Inen,
15355            Vbtictlr_SPEC,
15356            crate::common::RW,
15357        >::from_register(self, 0)
15358    }
15359
15360    #[doc = "VBATT CH2 Input Enable"]
15361    #[inline(always)]
15362    pub fn vch2inen(
15363        self,
15364    ) -> crate::common::RegisterField<
15365        2,
15366        0x1,
15367        1,
15368        0,
15369        vbtictlr::Vch2Inen,
15370        vbtictlr::Vch2Inen,
15371        Vbtictlr_SPEC,
15372        crate::common::RW,
15373    > {
15374        crate::common::RegisterField::<
15375            2,
15376            0x1,
15377            1,
15378            0,
15379            vbtictlr::Vch2Inen,
15380            vbtictlr::Vch2Inen,
15381            Vbtictlr_SPEC,
15382            crate::common::RW,
15383        >::from_register(self, 0)
15384    }
15385}
15386impl ::core::default::Default for Vbtictlr {
15387    #[inline(always)]
15388    fn default() -> Vbtictlr {
15389        <crate::RegValueT<Vbtictlr_SPEC> as RegisterValue<_>>::new(0)
15390    }
15391}
15392pub mod vbtictlr {
15393
15394    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
15395    pub struct Vch0Inen_SPEC;
15396    pub type Vch0Inen = crate::EnumBitfieldStruct<u8, Vch0Inen_SPEC>;
15397    impl Vch0Inen {
15398        #[doc = "RTCIC0 input disable"]
15399        pub const _0: Self = Self::new(0);
15400
15401        #[doc = "RTCIC0 input enable"]
15402        pub const _1: Self = Self::new(1);
15403    }
15404    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
15405    pub struct Vch1Inen_SPEC;
15406    pub type Vch1Inen = crate::EnumBitfieldStruct<u8, Vch1Inen_SPEC>;
15407    impl Vch1Inen {
15408        #[doc = "RTCIC1 input disable"]
15409        pub const _0: Self = Self::new(0);
15410
15411        #[doc = "RTCIC1 input enable"]
15412        pub const _1: Self = Self::new(1);
15413    }
15414    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
15415    pub struct Vch2Inen_SPEC;
15416    pub type Vch2Inen = crate::EnumBitfieldStruct<u8, Vch2Inen_SPEC>;
15417    impl Vch2Inen {
15418        #[doc = "RTCIC2 input disable"]
15419        pub const _0: Self = Self::new(0);
15420
15421        #[doc = "RTCIC2 input enable"]
15422        pub const _1: Self = Self::new(1);
15423    }
15424}
15425#[doc(hidden)]
15426#[derive(Copy, Clone, Eq, PartialEq)]
15427pub struct Vbtictlr2_SPEC;
15428impl crate::sealed::RegSpec for Vbtictlr2_SPEC {
15429    type DataType = u8;
15430}
15431
15432#[doc = "VBATT Input Control Register 2"]
15433pub type Vbtictlr2 = crate::RegValueT<Vbtictlr2_SPEC>;
15434
15435impl Vbtictlr2 {
15436    #[doc = "VBATT CH0 Input Noise Canceler Enable"]
15437    #[inline(always)]
15438    pub fn vch0nce(
15439        self,
15440    ) -> crate::common::RegisterField<
15441        0,
15442        0x1,
15443        1,
15444        0,
15445        vbtictlr2::Vch0Nce,
15446        vbtictlr2::Vch0Nce,
15447        Vbtictlr2_SPEC,
15448        crate::common::RW,
15449    > {
15450        crate::common::RegisterField::<
15451            0,
15452            0x1,
15453            1,
15454            0,
15455            vbtictlr2::Vch0Nce,
15456            vbtictlr2::Vch0Nce,
15457            Vbtictlr2_SPEC,
15458            crate::common::RW,
15459        >::from_register(self, 0)
15460    }
15461
15462    #[doc = "VBATT CH1 Input Noise Canceler Enable"]
15463    #[inline(always)]
15464    pub fn vch1nce(
15465        self,
15466    ) -> crate::common::RegisterField<
15467        1,
15468        0x1,
15469        1,
15470        0,
15471        vbtictlr2::Vch1Nce,
15472        vbtictlr2::Vch1Nce,
15473        Vbtictlr2_SPEC,
15474        crate::common::RW,
15475    > {
15476        crate::common::RegisterField::<
15477            1,
15478            0x1,
15479            1,
15480            0,
15481            vbtictlr2::Vch1Nce,
15482            vbtictlr2::Vch1Nce,
15483            Vbtictlr2_SPEC,
15484            crate::common::RW,
15485        >::from_register(self, 0)
15486    }
15487
15488    #[doc = "VBATT CH2 Input Noise Canceler Enable"]
15489    #[inline(always)]
15490    pub fn vch2nce(
15491        self,
15492    ) -> crate::common::RegisterField<
15493        2,
15494        0x1,
15495        1,
15496        0,
15497        vbtictlr2::Vch2Nce,
15498        vbtictlr2::Vch2Nce,
15499        Vbtictlr2_SPEC,
15500        crate::common::RW,
15501    > {
15502        crate::common::RegisterField::<
15503            2,
15504            0x1,
15505            1,
15506            0,
15507            vbtictlr2::Vch2Nce,
15508            vbtictlr2::Vch2Nce,
15509            Vbtictlr2_SPEC,
15510            crate::common::RW,
15511        >::from_register(self, 0)
15512    }
15513
15514    #[doc = "VBATT CH0 Input Edge Select"]
15515    #[inline(always)]
15516    pub fn vch0eg(
15517        self,
15518    ) -> crate::common::RegisterField<
15519        4,
15520        0x1,
15521        1,
15522        0,
15523        vbtictlr2::Vch0Eg,
15524        vbtictlr2::Vch0Eg,
15525        Vbtictlr2_SPEC,
15526        crate::common::RW,
15527    > {
15528        crate::common::RegisterField::<
15529            4,
15530            0x1,
15531            1,
15532            0,
15533            vbtictlr2::Vch0Eg,
15534            vbtictlr2::Vch0Eg,
15535            Vbtictlr2_SPEC,
15536            crate::common::RW,
15537        >::from_register(self, 0)
15538    }
15539
15540    #[doc = "VBATT CH1 Input Edge Select"]
15541    #[inline(always)]
15542    pub fn vch1eg(
15543        self,
15544    ) -> crate::common::RegisterField<
15545        5,
15546        0x1,
15547        1,
15548        0,
15549        vbtictlr2::Vch1Eg,
15550        vbtictlr2::Vch1Eg,
15551        Vbtictlr2_SPEC,
15552        crate::common::RW,
15553    > {
15554        crate::common::RegisterField::<
15555            5,
15556            0x1,
15557            1,
15558            0,
15559            vbtictlr2::Vch1Eg,
15560            vbtictlr2::Vch1Eg,
15561            Vbtictlr2_SPEC,
15562            crate::common::RW,
15563        >::from_register(self, 0)
15564    }
15565
15566    #[doc = "VBATT CH2 Input Edge Select"]
15567    #[inline(always)]
15568    pub fn vch2eg(
15569        self,
15570    ) -> crate::common::RegisterField<
15571        6,
15572        0x1,
15573        1,
15574        0,
15575        vbtictlr2::Vch2Eg,
15576        vbtictlr2::Vch2Eg,
15577        Vbtictlr2_SPEC,
15578        crate::common::RW,
15579    > {
15580        crate::common::RegisterField::<
15581            6,
15582            0x1,
15583            1,
15584            0,
15585            vbtictlr2::Vch2Eg,
15586            vbtictlr2::Vch2Eg,
15587            Vbtictlr2_SPEC,
15588            crate::common::RW,
15589        >::from_register(self, 0)
15590    }
15591}
15592impl ::core::default::Default for Vbtictlr2 {
15593    #[inline(always)]
15594    fn default() -> Vbtictlr2 {
15595        <crate::RegValueT<Vbtictlr2_SPEC> as RegisterValue<_>>::new(112)
15596    }
15597}
15598pub mod vbtictlr2 {
15599
15600    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
15601    pub struct Vch0Nce_SPEC;
15602    pub type Vch0Nce = crate::EnumBitfieldStruct<u8, Vch0Nce_SPEC>;
15603    impl Vch0Nce {
15604        #[doc = "RTCIC0 pin input noise canceler disable"]
15605        pub const _0: Self = Self::new(0);
15606
15607        #[doc = "RTCIC0 pin input noise canceler enable"]
15608        pub const _1: Self = Self::new(1);
15609    }
15610    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
15611    pub struct Vch1Nce_SPEC;
15612    pub type Vch1Nce = crate::EnumBitfieldStruct<u8, Vch1Nce_SPEC>;
15613    impl Vch1Nce {
15614        #[doc = "RTCIC1 pin input noise canceler disable"]
15615        pub const _0: Self = Self::new(0);
15616
15617        #[doc = "RTCIC1 pin input noise canceler enable"]
15618        pub const _1: Self = Self::new(1);
15619    }
15620    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
15621    pub struct Vch2Nce_SPEC;
15622    pub type Vch2Nce = crate::EnumBitfieldStruct<u8, Vch2Nce_SPEC>;
15623    impl Vch2Nce {
15624        #[doc = "RTCIC2 pin input noise canceler disable"]
15625        pub const _0: Self = Self::new(0);
15626
15627        #[doc = "RTCIC2 pin input noise canceler enable"]
15628        pub const _1: Self = Self::new(1);
15629    }
15630    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
15631    pub struct Vch0Eg_SPEC;
15632    pub type Vch0Eg = crate::EnumBitfieldStruct<u8, Vch0Eg_SPEC>;
15633    impl Vch0Eg {
15634        #[doc = "RTCIC0 pin input event is detected on falling edge"]
15635        pub const _0: Self = Self::new(0);
15636
15637        #[doc = "RTCIC0 pin input event is detected on rising edge"]
15638        pub const _1: Self = Self::new(1);
15639    }
15640    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
15641    pub struct Vch1Eg_SPEC;
15642    pub type Vch1Eg = crate::EnumBitfieldStruct<u8, Vch1Eg_SPEC>;
15643    impl Vch1Eg {
15644        #[doc = "RTCIC1 pin input event is detected on falling edge"]
15645        pub const _0: Self = Self::new(0);
15646
15647        #[doc = "RTCIC1 pin input event is detected on rising edge"]
15648        pub const _1: Self = Self::new(1);
15649    }
15650    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
15651    pub struct Vch2Eg_SPEC;
15652    pub type Vch2Eg = crate::EnumBitfieldStruct<u8, Vch2Eg_SPEC>;
15653    impl Vch2Eg {
15654        #[doc = "RTCIC2 pin input event is detected on falling edge"]
15655        pub const _0: Self = Self::new(0);
15656
15657        #[doc = "RTCIC2 pin input event is detected on rising edge"]
15658        pub const _1: Self = Self::new(1);
15659    }
15660}
15661#[doc(hidden)]
15662#[derive(Copy, Clone, Eq, PartialEq)]
15663pub struct Vbtimonr_SPEC;
15664impl crate::sealed::RegSpec for Vbtimonr_SPEC {
15665    type DataType = u8;
15666}
15667
15668#[doc = "VBATT Input Monitor Register"]
15669pub type Vbtimonr = crate::RegValueT<Vbtimonr_SPEC>;
15670
15671impl Vbtimonr {
15672    #[doc = "VBATT CH0 Input monitor"]
15673    #[inline(always)]
15674    pub fn vch0mon(
15675        self,
15676    ) -> crate::common::RegisterField<
15677        0,
15678        0x1,
15679        1,
15680        0,
15681        vbtimonr::Vch0Mon,
15682        vbtimonr::Vch0Mon,
15683        Vbtimonr_SPEC,
15684        crate::common::R,
15685    > {
15686        crate::common::RegisterField::<
15687            0,
15688            0x1,
15689            1,
15690            0,
15691            vbtimonr::Vch0Mon,
15692            vbtimonr::Vch0Mon,
15693            Vbtimonr_SPEC,
15694            crate::common::R,
15695        >::from_register(self, 0)
15696    }
15697
15698    #[doc = "VBATT CH1 Input monitor"]
15699    #[inline(always)]
15700    pub fn vch1mon(
15701        self,
15702    ) -> crate::common::RegisterField<
15703        1,
15704        0x1,
15705        1,
15706        0,
15707        vbtimonr::Vch1Mon,
15708        vbtimonr::Vch1Mon,
15709        Vbtimonr_SPEC,
15710        crate::common::R,
15711    > {
15712        crate::common::RegisterField::<
15713            1,
15714            0x1,
15715            1,
15716            0,
15717            vbtimonr::Vch1Mon,
15718            vbtimonr::Vch1Mon,
15719            Vbtimonr_SPEC,
15720            crate::common::R,
15721        >::from_register(self, 0)
15722    }
15723
15724    #[doc = "VBATT CH2 Input monitor"]
15725    #[inline(always)]
15726    pub fn vch2mon(
15727        self,
15728    ) -> crate::common::RegisterField<
15729        2,
15730        0x1,
15731        1,
15732        0,
15733        vbtimonr::Vch2Mon,
15734        vbtimonr::Vch2Mon,
15735        Vbtimonr_SPEC,
15736        crate::common::R,
15737    > {
15738        crate::common::RegisterField::<
15739            2,
15740            0x1,
15741            1,
15742            0,
15743            vbtimonr::Vch2Mon,
15744            vbtimonr::Vch2Mon,
15745            Vbtimonr_SPEC,
15746            crate::common::R,
15747        >::from_register(self, 0)
15748    }
15749}
15750impl ::core::default::Default for Vbtimonr {
15751    #[inline(always)]
15752    fn default() -> Vbtimonr {
15753        <crate::RegValueT<Vbtimonr_SPEC> as RegisterValue<_>>::new(0)
15754    }
15755}
15756pub mod vbtimonr {
15757
15758    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
15759    pub struct Vch0Mon_SPEC;
15760    pub type Vch0Mon = crate::EnumBitfieldStruct<u8, Vch0Mon_SPEC>;
15761    impl Vch0Mon {
15762        #[doc = "RTCIC0 pin input is low level"]
15763        pub const _0: Self = Self::new(0);
15764
15765        #[doc = "RTCIC0 pin input is high level."]
15766        pub const _1: Self = Self::new(1);
15767    }
15768    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
15769    pub struct Vch1Mon_SPEC;
15770    pub type Vch1Mon = crate::EnumBitfieldStruct<u8, Vch1Mon_SPEC>;
15771    impl Vch1Mon {
15772        #[doc = "RTCIC1 pin input is low level"]
15773        pub const _0: Self = Self::new(0);
15774
15775        #[doc = "RTCIC1 pin input is high level"]
15776        pub const _1: Self = Self::new(1);
15777    }
15778    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
15779    pub struct Vch2Mon_SPEC;
15780    pub type Vch2Mon = crate::EnumBitfieldStruct<u8, Vch2Mon_SPEC>;
15781    impl Vch2Mon {
15782        #[doc = "RTCIC2 pin input is low level"]
15783        pub const _0: Self = Self::new(0);
15784
15785        #[doc = "RTCIC2 pin input is high level."]
15786        pub const _1: Self = Self::new(1);
15787    }
15788}
15789#[doc(hidden)]
15790#[derive(Copy, Clone, Eq, PartialEq)]
15791pub struct Vbtbkr_SPEC;
15792impl crate::sealed::RegSpec for Vbtbkr_SPEC {
15793    type DataType = u8;
15794}
15795
15796#[doc = "VBATT Backup Register"]
15797pub type Vbtbkr = crate::RegValueT<Vbtbkr_SPEC>;
15798
15799impl NoBitfieldReg<Vbtbkr_SPEC> for Vbtbkr {}
15800impl ::core::default::Default for Vbtbkr {
15801    #[inline(always)]
15802    fn default() -> Vbtbkr {
15803        <crate::RegValueT<Vbtbkr_SPEC> as RegisterValue<_>>::new(0)
15804    }
15805}