ra8e2_pac/
ssie0.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.00.01, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:54:26 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Serial Sound Interface Enhanced 0"]
28unsafe impl ::core::marker::Send for super::Ssie0 {}
29unsafe impl ::core::marker::Sync for super::Ssie0 {}
30impl super::Ssie0 {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Control Register"]
38    #[inline(always)]
39    pub const fn ssicr(&self) -> &'static crate::common::Reg<self::Ssicr_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Ssicr_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "Status Register"]
48    #[inline(always)]
49    pub const fn ssisr(&self) -> &'static crate::common::Reg<self::Ssisr_SPEC, crate::common::RW> {
50        unsafe {
51            crate::common::Reg::<self::Ssisr_SPEC, crate::common::RW>::from_ptr(
52                self._svd2pac_as_ptr().add(4usize),
53            )
54        }
55    }
56
57    #[doc = "FIFO Control Register"]
58    #[inline(always)]
59    pub const fn ssifcr(
60        &self,
61    ) -> &'static crate::common::Reg<self::Ssifcr_SPEC, crate::common::RW> {
62        unsafe {
63            crate::common::Reg::<self::Ssifcr_SPEC, crate::common::RW>::from_ptr(
64                self._svd2pac_as_ptr().add(16usize),
65            )
66        }
67    }
68
69    #[doc = "FIFO Status Register"]
70    #[inline(always)]
71    pub const fn ssifsr(
72        &self,
73    ) -> &'static crate::common::Reg<self::Ssifsr_SPEC, crate::common::RW> {
74        unsafe {
75            crate::common::Reg::<self::Ssifsr_SPEC, crate::common::RW>::from_ptr(
76                self._svd2pac_as_ptr().add(20usize),
77            )
78        }
79    }
80
81    #[doc = "Transmit FIFO Data Register"]
82    #[inline(always)]
83    pub const fn ssiftdr(
84        &self,
85    ) -> &'static crate::common::Reg<self::Ssiftdr_SPEC, crate::common::W> {
86        unsafe {
87            crate::common::Reg::<self::Ssiftdr_SPEC, crate::common::W>::from_ptr(
88                self._svd2pac_as_ptr().add(24usize),
89            )
90        }
91    }
92
93    #[doc = "Receive FIFO Data Register"]
94    #[inline(always)]
95    pub const fn ssifrdr(
96        &self,
97    ) -> &'static crate::common::Reg<self::Ssifrdr_SPEC, crate::common::R> {
98        unsafe {
99            crate::common::Reg::<self::Ssifrdr_SPEC, crate::common::R>::from_ptr(
100                self._svd2pac_as_ptr().add(28usize),
101            )
102        }
103    }
104
105    #[doc = "Audio Format Register"]
106    #[inline(always)]
107    pub const fn ssiofr(
108        &self,
109    ) -> &'static crate::common::Reg<self::Ssiofr_SPEC, crate::common::RW> {
110        unsafe {
111            crate::common::Reg::<self::Ssiofr_SPEC, crate::common::RW>::from_ptr(
112                self._svd2pac_as_ptr().add(32usize),
113            )
114        }
115    }
116
117    #[doc = "Status Control Register"]
118    #[inline(always)]
119    pub const fn ssiscr(
120        &self,
121    ) -> &'static crate::common::Reg<self::Ssiscr_SPEC, crate::common::RW> {
122        unsafe {
123            crate::common::Reg::<self::Ssiscr_SPEC, crate::common::RW>::from_ptr(
124                self._svd2pac_as_ptr().add(36usize),
125            )
126        }
127    }
128}
129#[doc(hidden)]
130#[derive(Copy, Clone, Eq, PartialEq)]
131pub struct Ssicr_SPEC;
132impl crate::sealed::RegSpec for Ssicr_SPEC {
133    type DataType = u32;
134}
135
136#[doc = "Control Register"]
137pub type Ssicr = crate::RegValueT<Ssicr_SPEC>;
138
139impl Ssicr {
140    #[doc = "Reception Enable"]
141    #[inline(always)]
142    pub fn ren(
143        self,
144    ) -> crate::common::RegisterField<
145        0,
146        0x1,
147        1,
148        0,
149        ssicr::Ren,
150        ssicr::Ren,
151        Ssicr_SPEC,
152        crate::common::RW,
153    > {
154        crate::common::RegisterField::<
155            0,
156            0x1,
157            1,
158            0,
159            ssicr::Ren,
160            ssicr::Ren,
161            Ssicr_SPEC,
162            crate::common::RW,
163        >::from_register(self, 0)
164    }
165
166    #[doc = "Transmission Enable"]
167    #[inline(always)]
168    pub fn ten(
169        self,
170    ) -> crate::common::RegisterField<
171        1,
172        0x1,
173        1,
174        0,
175        ssicr::Ten,
176        ssicr::Ten,
177        Ssicr_SPEC,
178        crate::common::RW,
179    > {
180        crate::common::RegisterField::<
181            1,
182            0x1,
183            1,
184            0,
185            ssicr::Ten,
186            ssicr::Ten,
187            Ssicr_SPEC,
188            crate::common::RW,
189        >::from_register(self, 0)
190    }
191
192    #[doc = "Mute Enable"]
193    #[inline(always)]
194    pub fn muen(
195        self,
196    ) -> crate::common::RegisterField<
197        3,
198        0x1,
199        1,
200        0,
201        ssicr::Muen,
202        ssicr::Muen,
203        Ssicr_SPEC,
204        crate::common::RW,
205    > {
206        crate::common::RegisterField::<
207            3,
208            0x1,
209            1,
210            0,
211            ssicr::Muen,
212            ssicr::Muen,
213            Ssicr_SPEC,
214            crate::common::RW,
215        >::from_register(self, 0)
216    }
217
218    #[doc = "Selects Bit Clock Division Ratio"]
219    #[inline(always)]
220    pub fn ckdv(
221        self,
222    ) -> crate::common::RegisterField<
223        4,
224        0xf,
225        1,
226        0,
227        ssicr::Ckdv,
228        ssicr::Ckdv,
229        Ssicr_SPEC,
230        crate::common::RW,
231    > {
232        crate::common::RegisterField::<
233            4,
234            0xf,
235            1,
236            0,
237            ssicr::Ckdv,
238            ssicr::Ckdv,
239            Ssicr_SPEC,
240            crate::common::RW,
241        >::from_register(self, 0)
242    }
243
244    #[doc = "Selects Serial Data Delay"]
245    #[inline(always)]
246    pub fn del(
247        self,
248    ) -> crate::common::RegisterField<
249        8,
250        0x1,
251        1,
252        0,
253        ssicr::Del,
254        ssicr::Del,
255        Ssicr_SPEC,
256        crate::common::RW,
257    > {
258        crate::common::RegisterField::<
259            8,
260            0x1,
261            1,
262            0,
263            ssicr::Del,
264            ssicr::Del,
265            Ssicr_SPEC,
266            crate::common::RW,
267        >::from_register(self, 0)
268    }
269
270    #[doc = "Selects Placement Data Alignment"]
271    #[inline(always)]
272    pub fn pdta(
273        self,
274    ) -> crate::common::RegisterField<
275        9,
276        0x1,
277        1,
278        0,
279        ssicr::Pdta,
280        ssicr::Pdta,
281        Ssicr_SPEC,
282        crate::common::RW,
283    > {
284        crate::common::RegisterField::<
285            9,
286            0x1,
287            1,
288            0,
289            ssicr::Pdta,
290            ssicr::Pdta,
291            Ssicr_SPEC,
292            crate::common::RW,
293        >::from_register(self, 0)
294    }
295
296    #[doc = "Selects Serial Data Alignment"]
297    #[inline(always)]
298    pub fn sdta(
299        self,
300    ) -> crate::common::RegisterField<
301        10,
302        0x1,
303        1,
304        0,
305        ssicr::Sdta,
306        ssicr::Sdta,
307        Ssicr_SPEC,
308        crate::common::RW,
309    > {
310        crate::common::RegisterField::<
311            10,
312            0x1,
313            1,
314            0,
315            ssicr::Sdta,
316            ssicr::Sdta,
317            Ssicr_SPEC,
318            crate::common::RW,
319        >::from_register(self, 0)
320    }
321
322    #[doc = "Selects Serial Padding Polarity"]
323    #[inline(always)]
324    pub fn spdp(
325        self,
326    ) -> crate::common::RegisterField<
327        11,
328        0x1,
329        1,
330        0,
331        ssicr::Spdp,
332        ssicr::Spdp,
333        Ssicr_SPEC,
334        crate::common::RW,
335    > {
336        crate::common::RegisterField::<
337            11,
338            0x1,
339            1,
340            0,
341            ssicr::Spdp,
342            ssicr::Spdp,
343            Ssicr_SPEC,
344            crate::common::RW,
345        >::from_register(self, 0)
346    }
347
348    #[doc = "Selects the Initial Value and Polarity of LR Clock/Frame Synchronization Signal"]
349    #[inline(always)]
350    pub fn lrckp(
351        self,
352    ) -> crate::common::RegisterField<
353        12,
354        0x1,
355        1,
356        0,
357        ssicr::Lrckp,
358        ssicr::Lrckp,
359        Ssicr_SPEC,
360        crate::common::RW,
361    > {
362        crate::common::RegisterField::<
363            12,
364            0x1,
365            1,
366            0,
367            ssicr::Lrckp,
368            ssicr::Lrckp,
369            Ssicr_SPEC,
370            crate::common::RW,
371        >::from_register(self, 0)
372    }
373
374    #[doc = "Selects Bit Clock Polarity"]
375    #[inline(always)]
376    pub fn bckp(
377        self,
378    ) -> crate::common::RegisterField<
379        13,
380        0x1,
381        1,
382        0,
383        ssicr::Bckp,
384        ssicr::Bckp,
385        Ssicr_SPEC,
386        crate::common::RW,
387    > {
388        crate::common::RegisterField::<
389            13,
390            0x1,
391            1,
392            0,
393            ssicr::Bckp,
394            ssicr::Bckp,
395            Ssicr_SPEC,
396            crate::common::RW,
397        >::from_register(self, 0)
398    }
399
400    #[doc = "Master Enable"]
401    #[inline(always)]
402    pub fn mst(
403        self,
404    ) -> crate::common::RegisterField<
405        14,
406        0x1,
407        1,
408        0,
409        ssicr::Mst,
410        ssicr::Mst,
411        Ssicr_SPEC,
412        crate::common::RW,
413    > {
414        crate::common::RegisterField::<
415            14,
416            0x1,
417            1,
418            0,
419            ssicr::Mst,
420            ssicr::Mst,
421            Ssicr_SPEC,
422            crate::common::RW,
423        >::from_register(self, 0)
424    }
425
426    #[doc = "Selects System Word Length"]
427    #[inline(always)]
428    pub fn swl(
429        self,
430    ) -> crate::common::RegisterField<
431        16,
432        0x7,
433        1,
434        0,
435        ssicr::Swl,
436        ssicr::Swl,
437        Ssicr_SPEC,
438        crate::common::RW,
439    > {
440        crate::common::RegisterField::<
441            16,
442            0x7,
443            1,
444            0,
445            ssicr::Swl,
446            ssicr::Swl,
447            Ssicr_SPEC,
448            crate::common::RW,
449        >::from_register(self, 0)
450    }
451
452    #[doc = "Selects Data Word Length"]
453    #[inline(always)]
454    pub fn dwl(
455        self,
456    ) -> crate::common::RegisterField<
457        19,
458        0x7,
459        1,
460        0,
461        ssicr::Dwl,
462        ssicr::Dwl,
463        Ssicr_SPEC,
464        crate::common::RW,
465    > {
466        crate::common::RegisterField::<
467            19,
468            0x7,
469            1,
470            0,
471            ssicr::Dwl,
472            ssicr::Dwl,
473            Ssicr_SPEC,
474            crate::common::RW,
475        >::from_register(self, 0)
476    }
477
478    #[doc = "Selects Frame Word Number"]
479    #[inline(always)]
480    pub fn frm(
481        self,
482    ) -> crate::common::RegisterField<22, 0x3, 1, 0, u8, u8, Ssicr_SPEC, crate::common::RW> {
483        crate::common::RegisterField::<22,0x3,1,0,u8,u8,Ssicr_SPEC,crate::common::RW>::from_register(self,0)
484    }
485
486    #[doc = "Idle Mode Interrupt Output Enable"]
487    #[inline(always)]
488    pub fn iien(
489        self,
490    ) -> crate::common::RegisterField<
491        25,
492        0x1,
493        1,
494        0,
495        ssicr::Iien,
496        ssicr::Iien,
497        Ssicr_SPEC,
498        crate::common::RW,
499    > {
500        crate::common::RegisterField::<
501            25,
502            0x1,
503            1,
504            0,
505            ssicr::Iien,
506            ssicr::Iien,
507            Ssicr_SPEC,
508            crate::common::RW,
509        >::from_register(self, 0)
510    }
511
512    #[doc = "Receive Overflow Interrupt Output Enable"]
513    #[inline(always)]
514    pub fn roien(
515        self,
516    ) -> crate::common::RegisterField<
517        26,
518        0x1,
519        1,
520        0,
521        ssicr::Roien,
522        ssicr::Roien,
523        Ssicr_SPEC,
524        crate::common::RW,
525    > {
526        crate::common::RegisterField::<
527            26,
528            0x1,
529            1,
530            0,
531            ssicr::Roien,
532            ssicr::Roien,
533            Ssicr_SPEC,
534            crate::common::RW,
535        >::from_register(self, 0)
536    }
537
538    #[doc = "Receive Underflow Interrupt Output Enable"]
539    #[inline(always)]
540    pub fn ruien(
541        self,
542    ) -> crate::common::RegisterField<
543        27,
544        0x1,
545        1,
546        0,
547        ssicr::Ruien,
548        ssicr::Ruien,
549        Ssicr_SPEC,
550        crate::common::RW,
551    > {
552        crate::common::RegisterField::<
553            27,
554            0x1,
555            1,
556            0,
557            ssicr::Ruien,
558            ssicr::Ruien,
559            Ssicr_SPEC,
560            crate::common::RW,
561        >::from_register(self, 0)
562    }
563
564    #[doc = "Transmit Overflow Interrupt Output Enable"]
565    #[inline(always)]
566    pub fn toien(
567        self,
568    ) -> crate::common::RegisterField<
569        28,
570        0x1,
571        1,
572        0,
573        ssicr::Toien,
574        ssicr::Toien,
575        Ssicr_SPEC,
576        crate::common::RW,
577    > {
578        crate::common::RegisterField::<
579            28,
580            0x1,
581            1,
582            0,
583            ssicr::Toien,
584            ssicr::Toien,
585            Ssicr_SPEC,
586            crate::common::RW,
587        >::from_register(self, 0)
588    }
589
590    #[doc = "Transmit Underflow Interrupt Output Enable"]
591    #[inline(always)]
592    pub fn tuien(
593        self,
594    ) -> crate::common::RegisterField<
595        29,
596        0x1,
597        1,
598        0,
599        ssicr::Tuien,
600        ssicr::Tuien,
601        Ssicr_SPEC,
602        crate::common::RW,
603    > {
604        crate::common::RegisterField::<
605            29,
606            0x1,
607            1,
608            0,
609            ssicr::Tuien,
610            ssicr::Tuien,
611            Ssicr_SPEC,
612            crate::common::RW,
613        >::from_register(self, 0)
614    }
615
616    #[doc = "Selects an Audio Clock for Master-mode Communication"]
617    #[inline(always)]
618    pub fn cks(
619        self,
620    ) -> crate::common::RegisterField<
621        30,
622        0x1,
623        1,
624        0,
625        ssicr::Cks,
626        ssicr::Cks,
627        Ssicr_SPEC,
628        crate::common::RW,
629    > {
630        crate::common::RegisterField::<
631            30,
632            0x1,
633            1,
634            0,
635            ssicr::Cks,
636            ssicr::Cks,
637            Ssicr_SPEC,
638            crate::common::RW,
639        >::from_register(self, 0)
640    }
641}
642impl ::core::default::Default for Ssicr {
643    #[inline(always)]
644    fn default() -> Ssicr {
645        <crate::RegValueT<Ssicr_SPEC> as RegisterValue<_>>::new(0)
646    }
647}
648pub mod ssicr {
649
650    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
651    pub struct Ren_SPEC;
652    pub type Ren = crate::EnumBitfieldStruct<u8, Ren_SPEC>;
653    impl Ren {
654        #[doc = "Disables reception"]
655        pub const _0: Self = Self::new(0);
656
657        #[doc = "Enables reception (starts reception)"]
658        pub const _1: Self = Self::new(1);
659    }
660    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
661    pub struct Ten_SPEC;
662    pub type Ten = crate::EnumBitfieldStruct<u8, Ten_SPEC>;
663    impl Ten {
664        #[doc = "Disables transmission"]
665        pub const _0: Self = Self::new(0);
666
667        #[doc = "Enables transmission (starts transmission)"]
668        pub const _1: Self = Self::new(1);
669    }
670    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
671    pub struct Muen_SPEC;
672    pub type Muen = crate::EnumBitfieldStruct<u8, Muen_SPEC>;
673    impl Muen {
674        #[doc = "Disables muting on the next frame boundary"]
675        pub const _0: Self = Self::new(0);
676
677        #[doc = "Enables muting on the next frame boundary"]
678        pub const _1: Self = Self::new(1);
679    }
680    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
681    pub struct Ckdv_SPEC;
682    pub type Ckdv = crate::EnumBitfieldStruct<u8, Ckdv_SPEC>;
683    impl Ckdv {
684        #[doc = "AUDIO_MCK"]
685        pub const _0_X_0: Self = Self::new(0);
686
687        #[doc = "AUDIO_MCK/2"]
688        pub const _0_X_1: Self = Self::new(1);
689
690        #[doc = "AUDIO_MCK/4"]
691        pub const _0_X_2: Self = Self::new(2);
692
693        #[doc = "AUDIO_MCK/8"]
694        pub const _0_X_3: Self = Self::new(3);
695
696        #[doc = "AUDIO_MCK/16"]
697        pub const _0_X_4: Self = Self::new(4);
698
699        #[doc = "AUDIO_MCK/32"]
700        pub const _0_X_5: Self = Self::new(5);
701
702        #[doc = "AUDIO_MCK/64"]
703        pub const _0_X_6: Self = Self::new(6);
704
705        #[doc = "AUDIO_MCK/128"]
706        pub const _0_X_7: Self = Self::new(7);
707
708        #[doc = "AUDIO_MCK/6"]
709        pub const _0_X_8: Self = Self::new(8);
710
711        #[doc = "AUDIO_MCK/12"]
712        pub const _0_X_9: Self = Self::new(9);
713
714        #[doc = "AUDIO_MCK/24"]
715        pub const _0_X_A: Self = Self::new(10);
716
717        #[doc = "AUDIO_MCK/48"]
718        pub const _0_X_B: Self = Self::new(11);
719
720        #[doc = "AUDIO_MCK/96"]
721        pub const _0_X_C: Self = Self::new(12);
722
723        #[doc = "Setting prohibited"]
724        pub const OTHERS: Self = Self::new(0);
725    }
726    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
727    pub struct Del_SPEC;
728    pub type Del = crate::EnumBitfieldStruct<u8, Del_SPEC>;
729    impl Del {
730        #[doc = "Delay of 1 cycle of SSIBCKn (n = 0, 1) between SSILRCKn/SSIFSn (n = 0, 1) and SSITXD0/SSIRXD0/SSIDATA1"]
731        pub const _0: Self = Self::new(0);
732
733        #[doc = "No delay between SSILRCKn/SSIFSn (n = 0, 1) and SSITXD0/SSIRXD0/SSIDATA1"]
734        pub const _1: Self = Self::new(1);
735    }
736    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
737    pub struct Pdta_SPEC;
738    pub type Pdta = crate::EnumBitfieldStruct<u8, Pdta_SPEC>;
739    impl Pdta {
740        #[doc = "Left-justifies placement data (SSIFTDR, SSIFRDR)"]
741        pub const _0: Self = Self::new(0);
742
743        #[doc = "Right-justifies placement data (SSIFTDR, SSIFRDR)"]
744        pub const _1: Self = Self::new(1);
745    }
746    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
747    pub struct Sdta_SPEC;
748    pub type Sdta = crate::EnumBitfieldStruct<u8, Sdta_SPEC>;
749    impl Sdta {
750        #[doc = "Transmits and receives serial data first and then padding bits"]
751        pub const _0: Self = Self::new(0);
752
753        #[doc = "Transmit and receives padding bits first and then serial data"]
754        pub const _1: Self = Self::new(1);
755    }
756    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
757    pub struct Spdp_SPEC;
758    pub type Spdp = crate::EnumBitfieldStruct<u8, Spdp_SPEC>;
759    impl Spdp {
760        #[doc = "Padding data is at a low level"]
761        pub const _0: Self = Self::new(0);
762
763        #[doc = "Padding data is at a high level"]
764        pub const _1: Self = Self::new(1);
765    }
766    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
767    pub struct Lrckp_SPEC;
768    pub type Lrckp = crate::EnumBitfieldStruct<u8, Lrckp_SPEC>;
769    impl Lrckp {
770        #[doc = "The initial value is at a high level. The start trigger for a frame is synchronized with a falling edge of SSILRCKn/SSIFSn (n = 0, 1)."]
771        pub const _0: Self = Self::new(0);
772
773        #[doc = "The initial value is at a low level. The start trigger for a frame is synchronized with a rising edge of SSILRCKn/SSIFSn (n = 0, 1)."]
774        pub const _1: Self = Self::new(1);
775    }
776    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
777    pub struct Bckp_SPEC;
778    pub type Bckp = crate::EnumBitfieldStruct<u8, Bckp_SPEC>;
779    impl Bckp {
780        #[doc = "SSILRCKn/SSIFSn (n = 0, 1) and SSITXD0/SSIRXD0/SSIDATA1 change at a falling edge (SSILRCKn/SSIFSn (n = 0, 1) and SSIRXD0/SSIDATA1 are sampled at a rising edge of SSIBCKn (n = 0, 1))."]
781        pub const _0: Self = Self::new(0);
782
783        #[doc = "SSILRCKn/SSIFSn (n = 0, 1) and SSITXD0/SSIRXD0/SSIDATA1 change at a rising edge (SSILRCKn/SSIFSn (n = 0, 1) and SSIRXD0/SSIDATA1 are sampled at a falling edge of SSIBCKn (n = 0, 1))."]
784        pub const _1: Self = Self::new(1);
785    }
786    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
787    pub struct Mst_SPEC;
788    pub type Mst = crate::EnumBitfieldStruct<u8, Mst_SPEC>;
789    impl Mst {
790        #[doc = "Slave-mode communication"]
791        pub const _0: Self = Self::new(0);
792
793        #[doc = "Master-mode communication"]
794        pub const _1: Self = Self::new(1);
795    }
796    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
797    pub struct Swl_SPEC;
798    pub type Swl = crate::EnumBitfieldStruct<u8, Swl_SPEC>;
799    impl Swl {
800        #[doc = "8 bits"]
801        pub const _000: Self = Self::new(0);
802
803        #[doc = "16 bits"]
804        pub const _001: Self = Self::new(1);
805
806        #[doc = "24 bits"]
807        pub const _010: Self = Self::new(2);
808
809        #[doc = "32 bits"]
810        pub const _011: Self = Self::new(3);
811
812        #[doc = "48 bits"]
813        pub const _100: Self = Self::new(4);
814
815        #[doc = "64 bits"]
816        pub const _101: Self = Self::new(5);
817
818        #[doc = "128 bits"]
819        pub const _110: Self = Self::new(6);
820
821        #[doc = "256 bits"]
822        pub const _111: Self = Self::new(7);
823    }
824    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
825    pub struct Dwl_SPEC;
826    pub type Dwl = crate::EnumBitfieldStruct<u8, Dwl_SPEC>;
827    impl Dwl {
828        #[doc = "8 bits"]
829        pub const _000: Self = Self::new(0);
830
831        #[doc = "16 bits"]
832        pub const _001: Self = Self::new(1);
833
834        #[doc = "18 bits"]
835        pub const _010: Self = Self::new(2);
836
837        #[doc = "20 bits"]
838        pub const _011: Self = Self::new(3);
839
840        #[doc = "22 bits"]
841        pub const _100: Self = Self::new(4);
842
843        #[doc = "24 bits"]
844        pub const _101: Self = Self::new(5);
845
846        #[doc = "32 bits"]
847        pub const _110: Self = Self::new(6);
848
849        #[doc = "Setting prohibited"]
850        pub const _111: Self = Self::new(7);
851    }
852    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
853    pub struct Iien_SPEC;
854    pub type Iien = crate::EnumBitfieldStruct<u8, Iien_SPEC>;
855    impl Iien {
856        #[doc = "Disables idle mode interrupt output"]
857        pub const _0: Self = Self::new(0);
858
859        #[doc = "Enables idle mode interrupt output"]
860        pub const _1: Self = Self::new(1);
861    }
862    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
863    pub struct Roien_SPEC;
864    pub type Roien = crate::EnumBitfieldStruct<u8, Roien_SPEC>;
865    impl Roien {
866        #[doc = "Disables receive overflow interrupt output"]
867        pub const _0: Self = Self::new(0);
868
869        #[doc = "Enables receive overflow interrupt output"]
870        pub const _1: Self = Self::new(1);
871    }
872    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
873    pub struct Ruien_SPEC;
874    pub type Ruien = crate::EnumBitfieldStruct<u8, Ruien_SPEC>;
875    impl Ruien {
876        #[doc = "Disables receive underflow interrupt output"]
877        pub const _0: Self = Self::new(0);
878
879        #[doc = "Enables receive underflow interrupt output"]
880        pub const _1: Self = Self::new(1);
881    }
882    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
883    pub struct Toien_SPEC;
884    pub type Toien = crate::EnumBitfieldStruct<u8, Toien_SPEC>;
885    impl Toien {
886        #[doc = "Disables transmit overflow interrupt output"]
887        pub const _0: Self = Self::new(0);
888
889        #[doc = "Enables transmit overflow interrupt output"]
890        pub const _1: Self = Self::new(1);
891    }
892    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
893    pub struct Tuien_SPEC;
894    pub type Tuien = crate::EnumBitfieldStruct<u8, Tuien_SPEC>;
895    impl Tuien {
896        #[doc = "Disables transmit underflow interrupt output"]
897        pub const _0: Self = Self::new(0);
898
899        #[doc = "Enables transmit underflow interrupt output"]
900        pub const _1: Self = Self::new(1);
901    }
902    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
903    pub struct Cks_SPEC;
904    pub type Cks = crate::EnumBitfieldStruct<u8, Cks_SPEC>;
905    impl Cks {
906        #[doc = "Selects the AUDIO_CLK input"]
907        pub const _0: Self = Self::new(0);
908
909        #[doc = "Selects the GTIOC2A (GPT output)"]
910        pub const _1: Self = Self::new(1);
911    }
912}
913#[doc(hidden)]
914#[derive(Copy, Clone, Eq, PartialEq)]
915pub struct Ssisr_SPEC;
916impl crate::sealed::RegSpec for Ssisr_SPEC {
917    type DataType = u32;
918}
919
920#[doc = "Status Register"]
921pub type Ssisr = crate::RegValueT<Ssisr_SPEC>;
922
923impl Ssisr {
924    #[doc = "Idle Mode Status Flag"]
925    #[inline(always)]
926    pub fn iirq(
927        self,
928    ) -> crate::common::RegisterField<
929        25,
930        0x1,
931        1,
932        0,
933        ssisr::Iirq,
934        ssisr::Iirq,
935        Ssisr_SPEC,
936        crate::common::R,
937    > {
938        crate::common::RegisterField::<
939            25,
940            0x1,
941            1,
942            0,
943            ssisr::Iirq,
944            ssisr::Iirq,
945            Ssisr_SPEC,
946            crate::common::R,
947        >::from_register(self, 0)
948    }
949
950    #[doc = "Receive Overflow Error Status Flag"]
951    #[inline(always)]
952    pub fn roirq(
953        self,
954    ) -> crate::common::RegisterField<
955        26,
956        0x1,
957        1,
958        0,
959        ssisr::Roirq,
960        ssisr::Roirq,
961        Ssisr_SPEC,
962        crate::common::RW,
963    > {
964        crate::common::RegisterField::<
965            26,
966            0x1,
967            1,
968            0,
969            ssisr::Roirq,
970            ssisr::Roirq,
971            Ssisr_SPEC,
972            crate::common::RW,
973        >::from_register(self, 0)
974    }
975
976    #[doc = "Receive Underflow Error Status Flag"]
977    #[inline(always)]
978    pub fn ruirq(
979        self,
980    ) -> crate::common::RegisterField<
981        27,
982        0x1,
983        1,
984        0,
985        ssisr::Ruirq,
986        ssisr::Ruirq,
987        Ssisr_SPEC,
988        crate::common::RW,
989    > {
990        crate::common::RegisterField::<
991            27,
992            0x1,
993            1,
994            0,
995            ssisr::Ruirq,
996            ssisr::Ruirq,
997            Ssisr_SPEC,
998            crate::common::RW,
999        >::from_register(self, 0)
1000    }
1001
1002    #[doc = "Transmit Overflow Error Status Flag"]
1003    #[inline(always)]
1004    pub fn toirq(
1005        self,
1006    ) -> crate::common::RegisterField<
1007        28,
1008        0x1,
1009        1,
1010        0,
1011        ssisr::Toirq,
1012        ssisr::Toirq,
1013        Ssisr_SPEC,
1014        crate::common::RW,
1015    > {
1016        crate::common::RegisterField::<
1017            28,
1018            0x1,
1019            1,
1020            0,
1021            ssisr::Toirq,
1022            ssisr::Toirq,
1023            Ssisr_SPEC,
1024            crate::common::RW,
1025        >::from_register(self, 0)
1026    }
1027
1028    #[doc = "Transmit Underflow Error Status flag"]
1029    #[inline(always)]
1030    pub fn tuirq(
1031        self,
1032    ) -> crate::common::RegisterField<
1033        29,
1034        0x1,
1035        1,
1036        0,
1037        ssisr::Tuirq,
1038        ssisr::Tuirq,
1039        Ssisr_SPEC,
1040        crate::common::RW,
1041    > {
1042        crate::common::RegisterField::<
1043            29,
1044            0x1,
1045            1,
1046            0,
1047            ssisr::Tuirq,
1048            ssisr::Tuirq,
1049            Ssisr_SPEC,
1050            crate::common::RW,
1051        >::from_register(self, 0)
1052    }
1053}
1054impl ::core::default::Default for Ssisr {
1055    #[inline(always)]
1056    fn default() -> Ssisr {
1057        <crate::RegValueT<Ssisr_SPEC> as RegisterValue<_>>::new(33554432)
1058    }
1059}
1060pub mod ssisr {
1061
1062    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1063    pub struct Iirq_SPEC;
1064    pub type Iirq = crate::EnumBitfieldStruct<u8, Iirq_SPEC>;
1065    impl Iirq {
1066        #[doc = "In the communication state"]
1067        pub const _0: Self = Self::new(0);
1068
1069        #[doc = "In the idle state"]
1070        pub const _1: Self = Self::new(1);
1071    }
1072    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1073    pub struct Roirq_SPEC;
1074    pub type Roirq = crate::EnumBitfieldStruct<u8, Roirq_SPEC>;
1075    impl Roirq {
1076        #[doc = "No receive overflow error is generated."]
1077        pub const _0: Self = Self::new(0);
1078
1079        #[doc = "A receive overflow error is generated."]
1080        pub const _1: Self = Self::new(1);
1081    }
1082    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1083    pub struct Ruirq_SPEC;
1084    pub type Ruirq = crate::EnumBitfieldStruct<u8, Ruirq_SPEC>;
1085    impl Ruirq {
1086        #[doc = "No receive underflow error is generated."]
1087        pub const _0: Self = Self::new(0);
1088
1089        #[doc = "A receive underflow error is generated."]
1090        pub const _1: Self = Self::new(1);
1091    }
1092    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1093    pub struct Toirq_SPEC;
1094    pub type Toirq = crate::EnumBitfieldStruct<u8, Toirq_SPEC>;
1095    impl Toirq {
1096        #[doc = "No transmit overflow error is generated."]
1097        pub const _0: Self = Self::new(0);
1098
1099        #[doc = "A transmit overflow error is generated."]
1100        pub const _1: Self = Self::new(1);
1101    }
1102    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1103    pub struct Tuirq_SPEC;
1104    pub type Tuirq = crate::EnumBitfieldStruct<u8, Tuirq_SPEC>;
1105    impl Tuirq {
1106        #[doc = "No transmit underflow error is generated."]
1107        pub const _0: Self = Self::new(0);
1108
1109        #[doc = "A transmit underflow error is generated."]
1110        pub const _1: Self = Self::new(1);
1111    }
1112}
1113#[doc(hidden)]
1114#[derive(Copy, Clone, Eq, PartialEq)]
1115pub struct Ssifcr_SPEC;
1116impl crate::sealed::RegSpec for Ssifcr_SPEC {
1117    type DataType = u32;
1118}
1119
1120#[doc = "FIFO Control Register"]
1121pub type Ssifcr = crate::RegValueT<Ssifcr_SPEC>;
1122
1123impl Ssifcr {
1124    #[doc = "Receive FIFO Data Register Reset"]
1125    #[inline(always)]
1126    pub fn rfrst(
1127        self,
1128    ) -> crate::common::RegisterField<
1129        0,
1130        0x1,
1131        1,
1132        0,
1133        ssifcr::Rfrst,
1134        ssifcr::Rfrst,
1135        Ssifcr_SPEC,
1136        crate::common::RW,
1137    > {
1138        crate::common::RegisterField::<
1139            0,
1140            0x1,
1141            1,
1142            0,
1143            ssifcr::Rfrst,
1144            ssifcr::Rfrst,
1145            Ssifcr_SPEC,
1146            crate::common::RW,
1147        >::from_register(self, 0)
1148    }
1149
1150    #[doc = "Transmit FIFO Data Register Reset"]
1151    #[inline(always)]
1152    pub fn tfrst(
1153        self,
1154    ) -> crate::common::RegisterField<
1155        1,
1156        0x1,
1157        1,
1158        0,
1159        ssifcr::Tfrst,
1160        ssifcr::Tfrst,
1161        Ssifcr_SPEC,
1162        crate::common::RW,
1163    > {
1164        crate::common::RegisterField::<
1165            1,
1166            0x1,
1167            1,
1168            0,
1169            ssifcr::Tfrst,
1170            ssifcr::Tfrst,
1171            Ssifcr_SPEC,
1172            crate::common::RW,
1173        >::from_register(self, 0)
1174    }
1175
1176    #[doc = "Receive Data Full Interrupt Output Enable"]
1177    #[inline(always)]
1178    pub fn rie(
1179        self,
1180    ) -> crate::common::RegisterField<
1181        2,
1182        0x1,
1183        1,
1184        0,
1185        ssifcr::Rie,
1186        ssifcr::Rie,
1187        Ssifcr_SPEC,
1188        crate::common::RW,
1189    > {
1190        crate::common::RegisterField::<
1191            2,
1192            0x1,
1193            1,
1194            0,
1195            ssifcr::Rie,
1196            ssifcr::Rie,
1197            Ssifcr_SPEC,
1198            crate::common::RW,
1199        >::from_register(self, 0)
1200    }
1201
1202    #[doc = "Transmit Data Empty Interrupt Output Enable"]
1203    #[inline(always)]
1204    pub fn tie(
1205        self,
1206    ) -> crate::common::RegisterField<
1207        3,
1208        0x1,
1209        1,
1210        0,
1211        ssifcr::Tie,
1212        ssifcr::Tie,
1213        Ssifcr_SPEC,
1214        crate::common::RW,
1215    > {
1216        crate::common::RegisterField::<
1217            3,
1218            0x1,
1219            1,
1220            0,
1221            ssifcr::Tie,
1222            ssifcr::Tie,
1223            Ssifcr_SPEC,
1224            crate::common::RW,
1225        >::from_register(self, 0)
1226    }
1227
1228    #[doc = "Byte Swap Enable"]
1229    #[inline(always)]
1230    pub fn bsw(
1231        self,
1232    ) -> crate::common::RegisterField<
1233        11,
1234        0x1,
1235        1,
1236        0,
1237        ssifcr::Bsw,
1238        ssifcr::Bsw,
1239        Ssifcr_SPEC,
1240        crate::common::RW,
1241    > {
1242        crate::common::RegisterField::<
1243            11,
1244            0x1,
1245            1,
1246            0,
1247            ssifcr::Bsw,
1248            ssifcr::Bsw,
1249            Ssifcr_SPEC,
1250            crate::common::RW,
1251        >::from_register(self, 0)
1252    }
1253
1254    #[doc = "Software Reset"]
1255    #[inline(always)]
1256    pub fn ssirst(
1257        self,
1258    ) -> crate::common::RegisterField<
1259        16,
1260        0x1,
1261        1,
1262        0,
1263        ssifcr::Ssirst,
1264        ssifcr::Ssirst,
1265        Ssifcr_SPEC,
1266        crate::common::RW,
1267    > {
1268        crate::common::RegisterField::<
1269            16,
1270            0x1,
1271            1,
1272            0,
1273            ssifcr::Ssirst,
1274            ssifcr::Ssirst,
1275            Ssifcr_SPEC,
1276            crate::common::RW,
1277        >::from_register(self, 0)
1278    }
1279
1280    #[doc = "AUDIO_MCK Enable in Mastermode Communication"]
1281    #[inline(always)]
1282    pub fn aucke(
1283        self,
1284    ) -> crate::common::RegisterField<
1285        31,
1286        0x1,
1287        1,
1288        0,
1289        ssifcr::Aucke,
1290        ssifcr::Aucke,
1291        Ssifcr_SPEC,
1292        crate::common::RW,
1293    > {
1294        crate::common::RegisterField::<
1295            31,
1296            0x1,
1297            1,
1298            0,
1299            ssifcr::Aucke,
1300            ssifcr::Aucke,
1301            Ssifcr_SPEC,
1302            crate::common::RW,
1303        >::from_register(self, 0)
1304    }
1305}
1306impl ::core::default::Default for Ssifcr {
1307    #[inline(always)]
1308    fn default() -> Ssifcr {
1309        <crate::RegValueT<Ssifcr_SPEC> as RegisterValue<_>>::new(0)
1310    }
1311}
1312pub mod ssifcr {
1313
1314    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1315    pub struct Rfrst_SPEC;
1316    pub type Rfrst = crate::EnumBitfieldStruct<u8, Rfrst_SPEC>;
1317    impl Rfrst {
1318        #[doc = "Clears a receive data FIFO reset condition"]
1319        pub const _0: Self = Self::new(0);
1320
1321        #[doc = "Sets a receive data FIFO reset condition"]
1322        pub const _1: Self = Self::new(1);
1323    }
1324    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1325    pub struct Tfrst_SPEC;
1326    pub type Tfrst = crate::EnumBitfieldStruct<u8, Tfrst_SPEC>;
1327    impl Tfrst {
1328        #[doc = "Clears a transmit data FIFO reset condition"]
1329        pub const _0: Self = Self::new(0);
1330
1331        #[doc = "Sets a transmit data FIFO reset condition"]
1332        pub const _1: Self = Self::new(1);
1333    }
1334    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1335    pub struct Rie_SPEC;
1336    pub type Rie = crate::EnumBitfieldStruct<u8, Rie_SPEC>;
1337    impl Rie {
1338        #[doc = "Disables receive data full interrupts"]
1339        pub const _0: Self = Self::new(0);
1340
1341        #[doc = "Enables receive data full interrupts"]
1342        pub const _1: Self = Self::new(1);
1343    }
1344    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1345    pub struct Tie_SPEC;
1346    pub type Tie = crate::EnumBitfieldStruct<u8, Tie_SPEC>;
1347    impl Tie {
1348        #[doc = "Disables transmit data empty interrupts"]
1349        pub const _0: Self = Self::new(0);
1350
1351        #[doc = "Enables transmit data empty interrupts"]
1352        pub const _1: Self = Self::new(1);
1353    }
1354    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1355    pub struct Bsw_SPEC;
1356    pub type Bsw = crate::EnumBitfieldStruct<u8, Bsw_SPEC>;
1357    impl Bsw {
1358        #[doc = "Disables byte swap"]
1359        pub const _0: Self = Self::new(0);
1360
1361        #[doc = "Enables byte swap"]
1362        pub const _1: Self = Self::new(1);
1363    }
1364    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1365    pub struct Ssirst_SPEC;
1366    pub type Ssirst = crate::EnumBitfieldStruct<u8, Ssirst_SPEC>;
1367    impl Ssirst {
1368        #[doc = "Clears a software reset condition"]
1369        pub const _0: Self = Self::new(0);
1370
1371        #[doc = "Sets a software reset condition"]
1372        pub const _1: Self = Self::new(1);
1373    }
1374    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1375    pub struct Aucke_SPEC;
1376    pub type Aucke = crate::EnumBitfieldStruct<u8, Aucke_SPEC>;
1377    impl Aucke {
1378        #[doc = "Disables supply of AUDIO_MCK"]
1379        pub const _0: Self = Self::new(0);
1380
1381        #[doc = "Enables supply of AUDIO_MCK"]
1382        pub const _1: Self = Self::new(1);
1383    }
1384}
1385#[doc(hidden)]
1386#[derive(Copy, Clone, Eq, PartialEq)]
1387pub struct Ssifsr_SPEC;
1388impl crate::sealed::RegSpec for Ssifsr_SPEC {
1389    type DataType = u32;
1390}
1391
1392#[doc = "FIFO Status Register"]
1393pub type Ssifsr = crate::RegValueT<Ssifsr_SPEC>;
1394
1395impl Ssifsr {
1396    #[doc = "Receive Data Full Flag"]
1397    #[inline(always)]
1398    pub fn rdf(
1399        self,
1400    ) -> crate::common::RegisterField<
1401        0,
1402        0x1,
1403        1,
1404        0,
1405        ssifsr::Rdf,
1406        ssifsr::Rdf,
1407        Ssifsr_SPEC,
1408        crate::common::RW,
1409    > {
1410        crate::common::RegisterField::<
1411            0,
1412            0x1,
1413            1,
1414            0,
1415            ssifsr::Rdf,
1416            ssifsr::Rdf,
1417            Ssifsr_SPEC,
1418            crate::common::RW,
1419        >::from_register(self, 0)
1420    }
1421
1422    #[doc = "Receive Data Count"]
1423    #[inline(always)]
1424    pub fn rdc(
1425        self,
1426    ) -> crate::common::RegisterField<8, 0x3f, 1, 0, u8, u8, Ssifsr_SPEC, crate::common::R> {
1427        crate::common::RegisterField::<8,0x3f,1,0,u8,u8,Ssifsr_SPEC,crate::common::R>::from_register(self,0)
1428    }
1429
1430    #[doc = "Transmit Data Empty Flag"]
1431    #[inline(always)]
1432    pub fn tde(
1433        self,
1434    ) -> crate::common::RegisterField<
1435        16,
1436        0x1,
1437        1,
1438        0,
1439        ssifsr::Tde,
1440        ssifsr::Tde,
1441        Ssifsr_SPEC,
1442        crate::common::RW,
1443    > {
1444        crate::common::RegisterField::<
1445            16,
1446            0x1,
1447            1,
1448            0,
1449            ssifsr::Tde,
1450            ssifsr::Tde,
1451            Ssifsr_SPEC,
1452            crate::common::RW,
1453        >::from_register(self, 0)
1454    }
1455
1456    #[doc = "Transmit Data Count"]
1457    #[inline(always)]
1458    pub fn tdc(
1459        self,
1460    ) -> crate::common::RegisterField<24, 0x3f, 1, 0, u8, u8, Ssifsr_SPEC, crate::common::R> {
1461        crate::common::RegisterField::<24,0x3f,1,0,u8,u8,Ssifsr_SPEC,crate::common::R>::from_register(self,0)
1462    }
1463}
1464impl ::core::default::Default for Ssifsr {
1465    #[inline(always)]
1466    fn default() -> Ssifsr {
1467        <crate::RegValueT<Ssifsr_SPEC> as RegisterValue<_>>::new(65536)
1468    }
1469}
1470pub mod ssifsr {
1471
1472    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1473    pub struct Rdf_SPEC;
1474    pub type Rdf = crate::EnumBitfieldStruct<u8, Rdf_SPEC>;
1475    impl Rdf {
1476        #[doc = "The size of received data in SSIFRDR is not more than the value of SSISCR.RDFS."]
1477        pub const _0: Self = Self::new(0);
1478
1479        #[doc = "The size of received data in SSIFRDR is not less than the value of SSISCR.RDFS plus one."]
1480        pub const _1: Self = Self::new(1);
1481    }
1482    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1483    pub struct Tde_SPEC;
1484    pub type Tde = crate::EnumBitfieldStruct<u8, Tde_SPEC>;
1485    impl Tde {
1486        #[doc = "The free space of SSIFTDR is not more than the value of SSISCR.TDES."]
1487        pub const _0: Self = Self::new(0);
1488
1489        #[doc = "The free space of SSIFTDR is not less than the value of SSISCR.TDES plus one."]
1490        pub const _1: Self = Self::new(1);
1491    }
1492}
1493#[doc(hidden)]
1494#[derive(Copy, Clone, Eq, PartialEq)]
1495pub struct Ssiftdr_SPEC;
1496impl crate::sealed::RegSpec for Ssiftdr_SPEC {
1497    type DataType = u32;
1498}
1499
1500#[doc = "Transmit FIFO Data Register"]
1501pub type Ssiftdr = crate::RegValueT<Ssiftdr_SPEC>;
1502
1503impl Ssiftdr {
1504    #[doc = "Transmit FIFO Data"]
1505    #[inline(always)]
1506    pub fn ssiftdr(
1507        self,
1508    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Ssiftdr_SPEC, crate::common::W>
1509    {
1510        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Ssiftdr_SPEC,crate::common::W>::from_register(self,0)
1511    }
1512}
1513impl ::core::default::Default for Ssiftdr {
1514    #[inline(always)]
1515    fn default() -> Ssiftdr {
1516        <crate::RegValueT<Ssiftdr_SPEC> as RegisterValue<_>>::new(0)
1517    }
1518}
1519
1520#[doc(hidden)]
1521#[derive(Copy, Clone, Eq, PartialEq)]
1522pub struct Ssifrdr_SPEC;
1523impl crate::sealed::RegSpec for Ssifrdr_SPEC {
1524    type DataType = u32;
1525}
1526
1527#[doc = "Receive FIFO Data Register"]
1528pub type Ssifrdr = crate::RegValueT<Ssifrdr_SPEC>;
1529
1530impl Ssifrdr {
1531    #[doc = "Receive FIFO Data"]
1532    #[inline(always)]
1533    pub fn ssifrdr(
1534        self,
1535    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Ssifrdr_SPEC, crate::common::R>
1536    {
1537        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Ssifrdr_SPEC,crate::common::R>::from_register(self,0)
1538    }
1539}
1540impl ::core::default::Default for Ssifrdr {
1541    #[inline(always)]
1542    fn default() -> Ssifrdr {
1543        <crate::RegValueT<Ssifrdr_SPEC> as RegisterValue<_>>::new(0)
1544    }
1545}
1546
1547#[doc(hidden)]
1548#[derive(Copy, Clone, Eq, PartialEq)]
1549pub struct Ssiofr_SPEC;
1550impl crate::sealed::RegSpec for Ssiofr_SPEC {
1551    type DataType = u32;
1552}
1553
1554#[doc = "Audio Format Register"]
1555pub type Ssiofr = crate::RegValueT<Ssiofr_SPEC>;
1556
1557impl Ssiofr {
1558    #[doc = "Audio Format Select"]
1559    #[inline(always)]
1560    pub fn omod(
1561        self,
1562    ) -> crate::common::RegisterField<
1563        0,
1564        0x3,
1565        1,
1566        0,
1567        ssiofr::Omod,
1568        ssiofr::Omod,
1569        Ssiofr_SPEC,
1570        crate::common::RW,
1571    > {
1572        crate::common::RegisterField::<
1573            0,
1574            0x3,
1575            1,
1576            0,
1577            ssiofr::Omod,
1578            ssiofr::Omod,
1579            Ssiofr_SPEC,
1580            crate::common::RW,
1581        >::from_register(self, 0)
1582    }
1583
1584    #[doc = "Whether to Enable LRCK/FS Continuation"]
1585    #[inline(always)]
1586    pub fn lrcont(
1587        self,
1588    ) -> crate::common::RegisterField<
1589        8,
1590        0x1,
1591        1,
1592        0,
1593        ssiofr::Lrcont,
1594        ssiofr::Lrcont,
1595        Ssiofr_SPEC,
1596        crate::common::RW,
1597    > {
1598        crate::common::RegisterField::<
1599            8,
1600            0x1,
1601            1,
1602            0,
1603            ssiofr::Lrcont,
1604            ssiofr::Lrcont,
1605            Ssiofr_SPEC,
1606            crate::common::RW,
1607        >::from_register(self, 0)
1608    }
1609
1610    #[doc = "Whether to Enable Stopping BCK Output When SSIE is in Idle Status"]
1611    #[inline(always)]
1612    pub fn bckastp(
1613        self,
1614    ) -> crate::common::RegisterField<
1615        9,
1616        0x1,
1617        1,
1618        0,
1619        ssiofr::Bckastp,
1620        ssiofr::Bckastp,
1621        Ssiofr_SPEC,
1622        crate::common::RW,
1623    > {
1624        crate::common::RegisterField::<
1625            9,
1626            0x1,
1627            1,
1628            0,
1629            ssiofr::Bckastp,
1630            ssiofr::Bckastp,
1631            Ssiofr_SPEC,
1632            crate::common::RW,
1633        >::from_register(self, 0)
1634    }
1635}
1636impl ::core::default::Default for Ssiofr {
1637    #[inline(always)]
1638    fn default() -> Ssiofr {
1639        <crate::RegValueT<Ssiofr_SPEC> as RegisterValue<_>>::new(0)
1640    }
1641}
1642pub mod ssiofr {
1643
1644    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1645    pub struct Omod_SPEC;
1646    pub type Omod = crate::EnumBitfieldStruct<u8, Omod_SPEC>;
1647    impl Omod {
1648        #[doc = "I2S format"]
1649        pub const _00: Self = Self::new(0);
1650
1651        #[doc = "TDM format"]
1652        pub const _01: Self = Self::new(1);
1653
1654        #[doc = "Monaural format"]
1655        pub const _10: Self = Self::new(2);
1656
1657        #[doc = "Setting prohibited"]
1658        pub const _11: Self = Self::new(3);
1659    }
1660    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1661    pub struct Lrcont_SPEC;
1662    pub type Lrcont = crate::EnumBitfieldStruct<u8, Lrcont_SPEC>;
1663    impl Lrcont {
1664        #[doc = "Disables LRCK/FS continuation"]
1665        pub const _0: Self = Self::new(0);
1666
1667        #[doc = "Enables LRCK/FS continuation"]
1668        pub const _1: Self = Self::new(1);
1669    }
1670    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1671    pub struct Bckastp_SPEC;
1672    pub type Bckastp = crate::EnumBitfieldStruct<u8, Bckastp_SPEC>;
1673    impl Bckastp {
1674        #[doc = "Always outputs BCK to the SSIBCKn (n = 0, 1) pin"]
1675        pub const _0: Self = Self::new(0);
1676
1677        #[doc = "Automatically controls output of BCK to the SSIBCKn (n = 0, 1) pin"]
1678        pub const _1: Self = Self::new(1);
1679    }
1680}
1681#[doc(hidden)]
1682#[derive(Copy, Clone, Eq, PartialEq)]
1683pub struct Ssiscr_SPEC;
1684impl crate::sealed::RegSpec for Ssiscr_SPEC {
1685    type DataType = u32;
1686}
1687
1688#[doc = "Status Control Register"]
1689pub type Ssiscr = crate::RegValueT<Ssiscr_SPEC>;
1690
1691impl Ssiscr {
1692    #[doc = "RDF Setting Condition Select"]
1693    #[inline(always)]
1694    pub fn rdfs(
1695        self,
1696    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, Ssiscr_SPEC, crate::common::RW> {
1697        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,Ssiscr_SPEC,crate::common::RW>::from_register(self,0)
1698    }
1699
1700    #[doc = "TDE Setting Condition Select"]
1701    #[inline(always)]
1702    pub fn tdes(
1703        self,
1704    ) -> crate::common::RegisterField<8, 0x1f, 1, 0, u8, u8, Ssiscr_SPEC, crate::common::RW> {
1705        crate::common::RegisterField::<8,0x1f,1,0,u8,u8,Ssiscr_SPEC,crate::common::RW>::from_register(self,0)
1706    }
1707}
1708impl ::core::default::Default for Ssiscr {
1709    #[inline(always)]
1710    fn default() -> Ssiscr {
1711        <crate::RegValueT<Ssiscr_SPEC> as RegisterValue<_>>::new(0)
1712    }
1713}
ra8e2_pac/ssie0.rs

ra8e2_pac/
ssie0.rs
