ra8e2_pac/
bus.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.00.01, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:54:26 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Bus Control"]
28unsafe impl ::core::marker::Send for super::Bus {}
29unsafe impl ::core::marker::Sync for super::Bus {}
30impl super::Bus {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "CS%s Mode Register (n = 0 to 7)"]
38    #[inline(always)]
39    pub const fn csmod(
40        &self,
41    ) -> &'static crate::common::ClusterRegisterArray<
42        crate::common::Reg<self::Csmod_SPEC, crate::common::RW>,
43        8,
44        0x10,
45    > {
46        unsafe {
47            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x2usize))
48        }
49    }
50    #[inline(always)]
51    pub const fn cs0mod(&self) -> &'static crate::common::Reg<self::Csmod_SPEC, crate::common::RW> {
52        unsafe {
53            crate::common::Reg::<self::Csmod_SPEC, crate::common::RW>::from_ptr(
54                self._svd2pac_as_ptr().add(0x2usize),
55            )
56        }
57    }
58    #[inline(always)]
59    pub const fn cs1mod(&self) -> &'static crate::common::Reg<self::Csmod_SPEC, crate::common::RW> {
60        unsafe {
61            crate::common::Reg::<self::Csmod_SPEC, crate::common::RW>::from_ptr(
62                self._svd2pac_as_ptr().add(0x12usize),
63            )
64        }
65    }
66    #[inline(always)]
67    pub const fn cs2mod(&self) -> &'static crate::common::Reg<self::Csmod_SPEC, crate::common::RW> {
68        unsafe {
69            crate::common::Reg::<self::Csmod_SPEC, crate::common::RW>::from_ptr(
70                self._svd2pac_as_ptr().add(0x22usize),
71            )
72        }
73    }
74    #[inline(always)]
75    pub const fn cs3mod(&self) -> &'static crate::common::Reg<self::Csmod_SPEC, crate::common::RW> {
76        unsafe {
77            crate::common::Reg::<self::Csmod_SPEC, crate::common::RW>::from_ptr(
78                self._svd2pac_as_ptr().add(0x32usize),
79            )
80        }
81    }
82    #[inline(always)]
83    pub const fn cs4mod(&self) -> &'static crate::common::Reg<self::Csmod_SPEC, crate::common::RW> {
84        unsafe {
85            crate::common::Reg::<self::Csmod_SPEC, crate::common::RW>::from_ptr(
86                self._svd2pac_as_ptr().add(0x42usize),
87            )
88        }
89    }
90    #[inline(always)]
91    pub const fn cs5mod(&self) -> &'static crate::common::Reg<self::Csmod_SPEC, crate::common::RW> {
92        unsafe {
93            crate::common::Reg::<self::Csmod_SPEC, crate::common::RW>::from_ptr(
94                self._svd2pac_as_ptr().add(0x52usize),
95            )
96        }
97    }
98    #[inline(always)]
99    pub const fn cs6mod(&self) -> &'static crate::common::Reg<self::Csmod_SPEC, crate::common::RW> {
100        unsafe {
101            crate::common::Reg::<self::Csmod_SPEC, crate::common::RW>::from_ptr(
102                self._svd2pac_as_ptr().add(0x62usize),
103            )
104        }
105    }
106    #[inline(always)]
107    pub const fn cs7mod(&self) -> &'static crate::common::Reg<self::Csmod_SPEC, crate::common::RW> {
108        unsafe {
109            crate::common::Reg::<self::Csmod_SPEC, crate::common::RW>::from_ptr(
110                self._svd2pac_as_ptr().add(0x72usize),
111            )
112        }
113    }
114
115    #[doc = "CS%s Wait Control Register 1 (n = 0 to 7)"]
116    #[inline(always)]
117    pub const fn cswcr1(
118        &self,
119    ) -> &'static crate::common::ClusterRegisterArray<
120        crate::common::Reg<self::Cswcr1_SPEC, crate::common::RW>,
121        8,
122        0x10,
123    > {
124        unsafe {
125            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x4usize))
126        }
127    }
128    #[inline(always)]
129    pub const fn cs0wcr1(
130        &self,
131    ) -> &'static crate::common::Reg<self::Cswcr1_SPEC, crate::common::RW> {
132        unsafe {
133            crate::common::Reg::<self::Cswcr1_SPEC, crate::common::RW>::from_ptr(
134                self._svd2pac_as_ptr().add(0x4usize),
135            )
136        }
137    }
138    #[inline(always)]
139    pub const fn cs1wcr1(
140        &self,
141    ) -> &'static crate::common::Reg<self::Cswcr1_SPEC, crate::common::RW> {
142        unsafe {
143            crate::common::Reg::<self::Cswcr1_SPEC, crate::common::RW>::from_ptr(
144                self._svd2pac_as_ptr().add(0x14usize),
145            )
146        }
147    }
148    #[inline(always)]
149    pub const fn cs2wcr1(
150        &self,
151    ) -> &'static crate::common::Reg<self::Cswcr1_SPEC, crate::common::RW> {
152        unsafe {
153            crate::common::Reg::<self::Cswcr1_SPEC, crate::common::RW>::from_ptr(
154                self._svd2pac_as_ptr().add(0x24usize),
155            )
156        }
157    }
158    #[inline(always)]
159    pub const fn cs3wcr1(
160        &self,
161    ) -> &'static crate::common::Reg<self::Cswcr1_SPEC, crate::common::RW> {
162        unsafe {
163            crate::common::Reg::<self::Cswcr1_SPEC, crate::common::RW>::from_ptr(
164                self._svd2pac_as_ptr().add(0x34usize),
165            )
166        }
167    }
168    #[inline(always)]
169    pub const fn cs4wcr1(
170        &self,
171    ) -> &'static crate::common::Reg<self::Cswcr1_SPEC, crate::common::RW> {
172        unsafe {
173            crate::common::Reg::<self::Cswcr1_SPEC, crate::common::RW>::from_ptr(
174                self._svd2pac_as_ptr().add(0x44usize),
175            )
176        }
177    }
178    #[inline(always)]
179    pub const fn cs5wcr1(
180        &self,
181    ) -> &'static crate::common::Reg<self::Cswcr1_SPEC, crate::common::RW> {
182        unsafe {
183            crate::common::Reg::<self::Cswcr1_SPEC, crate::common::RW>::from_ptr(
184                self._svd2pac_as_ptr().add(0x54usize),
185            )
186        }
187    }
188    #[inline(always)]
189    pub const fn cs6wcr1(
190        &self,
191    ) -> &'static crate::common::Reg<self::Cswcr1_SPEC, crate::common::RW> {
192        unsafe {
193            crate::common::Reg::<self::Cswcr1_SPEC, crate::common::RW>::from_ptr(
194                self._svd2pac_as_ptr().add(0x64usize),
195            )
196        }
197    }
198    #[inline(always)]
199    pub const fn cs7wcr1(
200        &self,
201    ) -> &'static crate::common::Reg<self::Cswcr1_SPEC, crate::common::RW> {
202        unsafe {
203            crate::common::Reg::<self::Cswcr1_SPEC, crate::common::RW>::from_ptr(
204                self._svd2pac_as_ptr().add(0x74usize),
205            )
206        }
207    }
208
209    #[doc = "CS%s Wait Control Register 2 (n = 0 to 7)"]
210    #[inline(always)]
211    pub const fn cswcr2(
212        &self,
213    ) -> &'static crate::common::ClusterRegisterArray<
214        crate::common::Reg<self::Cswcr2_SPEC, crate::common::RW>,
215        8,
216        0x10,
217    > {
218        unsafe {
219            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x8usize))
220        }
221    }
222    #[inline(always)]
223    pub const fn cs0wcr2(
224        &self,
225    ) -> &'static crate::common::Reg<self::Cswcr2_SPEC, crate::common::RW> {
226        unsafe {
227            crate::common::Reg::<self::Cswcr2_SPEC, crate::common::RW>::from_ptr(
228                self._svd2pac_as_ptr().add(0x8usize),
229            )
230        }
231    }
232    #[inline(always)]
233    pub const fn cs1wcr2(
234        &self,
235    ) -> &'static crate::common::Reg<self::Cswcr2_SPEC, crate::common::RW> {
236        unsafe {
237            crate::common::Reg::<self::Cswcr2_SPEC, crate::common::RW>::from_ptr(
238                self._svd2pac_as_ptr().add(0x18usize),
239            )
240        }
241    }
242    #[inline(always)]
243    pub const fn cs2wcr2(
244        &self,
245    ) -> &'static crate::common::Reg<self::Cswcr2_SPEC, crate::common::RW> {
246        unsafe {
247            crate::common::Reg::<self::Cswcr2_SPEC, crate::common::RW>::from_ptr(
248                self._svd2pac_as_ptr().add(0x28usize),
249            )
250        }
251    }
252    #[inline(always)]
253    pub const fn cs3wcr2(
254        &self,
255    ) -> &'static crate::common::Reg<self::Cswcr2_SPEC, crate::common::RW> {
256        unsafe {
257            crate::common::Reg::<self::Cswcr2_SPEC, crate::common::RW>::from_ptr(
258                self._svd2pac_as_ptr().add(0x38usize),
259            )
260        }
261    }
262    #[inline(always)]
263    pub const fn cs4wcr2(
264        &self,
265    ) -> &'static crate::common::Reg<self::Cswcr2_SPEC, crate::common::RW> {
266        unsafe {
267            crate::common::Reg::<self::Cswcr2_SPEC, crate::common::RW>::from_ptr(
268                self._svd2pac_as_ptr().add(0x48usize),
269            )
270        }
271    }
272    #[inline(always)]
273    pub const fn cs5wcr2(
274        &self,
275    ) -> &'static crate::common::Reg<self::Cswcr2_SPEC, crate::common::RW> {
276        unsafe {
277            crate::common::Reg::<self::Cswcr2_SPEC, crate::common::RW>::from_ptr(
278                self._svd2pac_as_ptr().add(0x58usize),
279            )
280        }
281    }
282    #[inline(always)]
283    pub const fn cs6wcr2(
284        &self,
285    ) -> &'static crate::common::Reg<self::Cswcr2_SPEC, crate::common::RW> {
286        unsafe {
287            crate::common::Reg::<self::Cswcr2_SPEC, crate::common::RW>::from_ptr(
288                self._svd2pac_as_ptr().add(0x68usize),
289            )
290        }
291    }
292    #[inline(always)]
293    pub const fn cs7wcr2(
294        &self,
295    ) -> &'static crate::common::Reg<self::Cswcr2_SPEC, crate::common::RW> {
296        unsafe {
297            crate::common::Reg::<self::Cswcr2_SPEC, crate::common::RW>::from_ptr(
298                self._svd2pac_as_ptr().add(0x78usize),
299            )
300        }
301    }
302
303    #[doc = "CS0 Control Register"]
304    #[inline(always)]
305    pub const fn cs0cr(&self) -> &'static crate::common::Reg<self::Cs0Cr_SPEC, crate::common::RW> {
306        unsafe {
307            crate::common::Reg::<self::Cs0Cr_SPEC, crate::common::RW>::from_ptr(
308                self._svd2pac_as_ptr().add(2050usize),
309            )
310        }
311    }
312
313    #[doc = "CS%s Recovery Cycle Register (n = 0 to 7)"]
314    #[inline(always)]
315    pub const fn csrec(
316        &self,
317    ) -> &'static crate::common::ClusterRegisterArray<
318        crate::common::Reg<self::Csrec_SPEC, crate::common::RW>,
319        8,
320        0x10,
321    > {
322        unsafe {
323            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x80ausize))
324        }
325    }
326    #[inline(always)]
327    pub const fn cs0rec(&self) -> &'static crate::common::Reg<self::Csrec_SPEC, crate::common::RW> {
328        unsafe {
329            crate::common::Reg::<self::Csrec_SPEC, crate::common::RW>::from_ptr(
330                self._svd2pac_as_ptr().add(0x80ausize),
331            )
332        }
333    }
334    #[inline(always)]
335    pub const fn cs1rec(&self) -> &'static crate::common::Reg<self::Csrec_SPEC, crate::common::RW> {
336        unsafe {
337            crate::common::Reg::<self::Csrec_SPEC, crate::common::RW>::from_ptr(
338                self._svd2pac_as_ptr().add(0x81ausize),
339            )
340        }
341    }
342    #[inline(always)]
343    pub const fn cs2rec(&self) -> &'static crate::common::Reg<self::Csrec_SPEC, crate::common::RW> {
344        unsafe {
345            crate::common::Reg::<self::Csrec_SPEC, crate::common::RW>::from_ptr(
346                self._svd2pac_as_ptr().add(0x82ausize),
347            )
348        }
349    }
350    #[inline(always)]
351    pub const fn cs3rec(&self) -> &'static crate::common::Reg<self::Csrec_SPEC, crate::common::RW> {
352        unsafe {
353            crate::common::Reg::<self::Csrec_SPEC, crate::common::RW>::from_ptr(
354                self._svd2pac_as_ptr().add(0x83ausize),
355            )
356        }
357    }
358    #[inline(always)]
359    pub const fn cs4rec(&self) -> &'static crate::common::Reg<self::Csrec_SPEC, crate::common::RW> {
360        unsafe {
361            crate::common::Reg::<self::Csrec_SPEC, crate::common::RW>::from_ptr(
362                self._svd2pac_as_ptr().add(0x84ausize),
363            )
364        }
365    }
366    #[inline(always)]
367    pub const fn cs5rec(&self) -> &'static crate::common::Reg<self::Csrec_SPEC, crate::common::RW> {
368        unsafe {
369            crate::common::Reg::<self::Csrec_SPEC, crate::common::RW>::from_ptr(
370                self._svd2pac_as_ptr().add(0x85ausize),
371            )
372        }
373    }
374    #[inline(always)]
375    pub const fn cs6rec(&self) -> &'static crate::common::Reg<self::Csrec_SPEC, crate::common::RW> {
376        unsafe {
377            crate::common::Reg::<self::Csrec_SPEC, crate::common::RW>::from_ptr(
378                self._svd2pac_as_ptr().add(0x86ausize),
379            )
380        }
381    }
382    #[inline(always)]
383    pub const fn cs7rec(&self) -> &'static crate::common::Reg<self::Csrec_SPEC, crate::common::RW> {
384        unsafe {
385            crate::common::Reg::<self::Csrec_SPEC, crate::common::RW>::from_ptr(
386                self._svd2pac_as_ptr().add(0x87ausize),
387            )
388        }
389    }
390
391    #[doc = "CS%s Control Register"]
392    #[inline(always)]
393    pub const fn cscr(
394        &self,
395    ) -> &'static crate::common::ClusterRegisterArray<
396        crate::common::Reg<self::Cscr_SPEC, crate::common::RW>,
397        7,
398        0x10,
399    > {
400        unsafe {
401            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x812usize))
402        }
403    }
404    #[inline(always)]
405    pub const fn cs1cr(&self) -> &'static crate::common::Reg<self::Cscr_SPEC, crate::common::RW> {
406        unsafe {
407            crate::common::Reg::<self::Cscr_SPEC, crate::common::RW>::from_ptr(
408                self._svd2pac_as_ptr().add(0x812usize),
409            )
410        }
411    }
412    #[inline(always)]
413    pub const fn cs2cr(&self) -> &'static crate::common::Reg<self::Cscr_SPEC, crate::common::RW> {
414        unsafe {
415            crate::common::Reg::<self::Cscr_SPEC, crate::common::RW>::from_ptr(
416                self._svd2pac_as_ptr().add(0x822usize),
417            )
418        }
419    }
420    #[inline(always)]
421    pub const fn cs3cr(&self) -> &'static crate::common::Reg<self::Cscr_SPEC, crate::common::RW> {
422        unsafe {
423            crate::common::Reg::<self::Cscr_SPEC, crate::common::RW>::from_ptr(
424                self._svd2pac_as_ptr().add(0x832usize),
425            )
426        }
427    }
428    #[inline(always)]
429    pub const fn cs4cr(&self) -> &'static crate::common::Reg<self::Cscr_SPEC, crate::common::RW> {
430        unsafe {
431            crate::common::Reg::<self::Cscr_SPEC, crate::common::RW>::from_ptr(
432                self._svd2pac_as_ptr().add(0x842usize),
433            )
434        }
435    }
436    #[inline(always)]
437    pub const fn cs5cr(&self) -> &'static crate::common::Reg<self::Cscr_SPEC, crate::common::RW> {
438        unsafe {
439            crate::common::Reg::<self::Cscr_SPEC, crate::common::RW>::from_ptr(
440                self._svd2pac_as_ptr().add(0x852usize),
441            )
442        }
443    }
444    #[inline(always)]
445    pub const fn cs6cr(&self) -> &'static crate::common::Reg<self::Cscr_SPEC, crate::common::RW> {
446        unsafe {
447            crate::common::Reg::<self::Cscr_SPEC, crate::common::RW>::from_ptr(
448                self._svd2pac_as_ptr().add(0x862usize),
449            )
450        }
451    }
452    #[inline(always)]
453    pub const fn cs7cr(&self) -> &'static crate::common::Reg<self::Cscr_SPEC, crate::common::RW> {
454        unsafe {
455            crate::common::Reg::<self::Cscr_SPEC, crate::common::RW>::from_ptr(
456                self._svd2pac_as_ptr().add(0x872usize),
457            )
458        }
459    }
460
461    #[doc = "CS Recovery Cycle Insertion Enable Register"]
462    #[inline(always)]
463    pub const fn csrecen(
464        &self,
465    ) -> &'static crate::common::Reg<self::Csrecen_SPEC, crate::common::RW> {
466        unsafe {
467            crate::common::Reg::<self::Csrecen_SPEC, crate::common::RW>::from_ptr(
468                self._svd2pac_as_ptr().add(2176usize),
469            )
470        }
471    }
472
473    #[doc = "SDC Control Register"]
474    #[inline(always)]
475    pub const fn sdccr(&self) -> &'static crate::common::Reg<self::Sdccr_SPEC, crate::common::RW> {
476        unsafe {
477            crate::common::Reg::<self::Sdccr_SPEC, crate::common::RW>::from_ptr(
478                self._svd2pac_as_ptr().add(3072usize),
479            )
480        }
481    }
482
483    #[doc = "SDC Mode Register"]
484    #[inline(always)]
485    pub const fn sdcmod(
486        &self,
487    ) -> &'static crate::common::Reg<self::Sdcmod_SPEC, crate::common::RW> {
488        unsafe {
489            crate::common::Reg::<self::Sdcmod_SPEC, crate::common::RW>::from_ptr(
490                self._svd2pac_as_ptr().add(3073usize),
491            )
492        }
493    }
494
495    #[doc = "SDRAM Access Mode Register"]
496    #[inline(always)]
497    pub const fn sdamod(
498        &self,
499    ) -> &'static crate::common::Reg<self::Sdamod_SPEC, crate::common::RW> {
500        unsafe {
501            crate::common::Reg::<self::Sdamod_SPEC, crate::common::RW>::from_ptr(
502                self._svd2pac_as_ptr().add(3074usize),
503            )
504        }
505    }
506
507    #[doc = "SDRAM Self-Refresh Control Register"]
508    #[inline(always)]
509    pub const fn sdself(
510        &self,
511    ) -> &'static crate::common::Reg<self::Sdself_SPEC, crate::common::RW> {
512        unsafe {
513            crate::common::Reg::<self::Sdself_SPEC, crate::common::RW>::from_ptr(
514                self._svd2pac_as_ptr().add(3088usize),
515            )
516        }
517    }
518
519    #[doc = "SDRAM Refresh Control Register"]
520    #[inline(always)]
521    pub const fn sdrfcr(
522        &self,
523    ) -> &'static crate::common::Reg<self::Sdrfcr_SPEC, crate::common::RW> {
524        unsafe {
525            crate::common::Reg::<self::Sdrfcr_SPEC, crate::common::RW>::from_ptr(
526                self._svd2pac_as_ptr().add(3092usize),
527            )
528        }
529    }
530
531    #[doc = "SDRAM Auto-Refresh Control Register"]
532    #[inline(always)]
533    pub const fn sdrfen(
534        &self,
535    ) -> &'static crate::common::Reg<self::Sdrfen_SPEC, crate::common::RW> {
536        unsafe {
537            crate::common::Reg::<self::Sdrfen_SPEC, crate::common::RW>::from_ptr(
538                self._svd2pac_as_ptr().add(3094usize),
539            )
540        }
541    }
542
543    #[doc = "SDRAM Initialization Sequence Control Register"]
544    #[inline(always)]
545    pub const fn sdicr(&self) -> &'static crate::common::Reg<self::Sdicr_SPEC, crate::common::RW> {
546        unsafe {
547            crate::common::Reg::<self::Sdicr_SPEC, crate::common::RW>::from_ptr(
548                self._svd2pac_as_ptr().add(3104usize),
549            )
550        }
551    }
552
553    #[doc = "SDRAM Initialization Register"]
554    #[inline(always)]
555    pub const fn sdir(&self) -> &'static crate::common::Reg<self::Sdir_SPEC, crate::common::RW> {
556        unsafe {
557            crate::common::Reg::<self::Sdir_SPEC, crate::common::RW>::from_ptr(
558                self._svd2pac_as_ptr().add(3108usize),
559            )
560        }
561    }
562
563    #[doc = "SDRAM Address Register"]
564    #[inline(always)]
565    pub const fn sdadr(&self) -> &'static crate::common::Reg<self::Sdadr_SPEC, crate::common::RW> {
566        unsafe {
567            crate::common::Reg::<self::Sdadr_SPEC, crate::common::RW>::from_ptr(
568                self._svd2pac_as_ptr().add(3136usize),
569            )
570        }
571    }
572
573    #[doc = "SDRAM Timing Register"]
574    #[inline(always)]
575    pub const fn sdtr(&self) -> &'static crate::common::Reg<self::Sdtr_SPEC, crate::common::RW> {
576        unsafe {
577            crate::common::Reg::<self::Sdtr_SPEC, crate::common::RW>::from_ptr(
578                self._svd2pac_as_ptr().add(3140usize),
579            )
580        }
581    }
582
583    #[doc = "SDRAM Mode Register"]
584    #[inline(always)]
585    pub const fn sdmod(&self) -> &'static crate::common::Reg<self::Sdmod_SPEC, crate::common::RW> {
586        unsafe {
587            crate::common::Reg::<self::Sdmod_SPEC, crate::common::RW>::from_ptr(
588                self._svd2pac_as_ptr().add(3144usize),
589            )
590        }
591    }
592
593    #[doc = "SDRAM Status Register"]
594    #[inline(always)]
595    pub const fn sdsr(&self) -> &'static crate::common::Reg<self::Sdsr_SPEC, crate::common::R> {
596        unsafe {
597            crate::common::Reg::<self::Sdsr_SPEC, crate::common::R>::from_ptr(
598                self._svd2pac_as_ptr().add(3152usize),
599            )
600        }
601    }
602
603    #[doc = "BUS Operation After Detection Register"]
604    #[inline(always)]
605    pub const fn busoad(
606        &self,
607    ) -> &'static crate::common::Reg<self::Busoad_SPEC, crate::common::RW> {
608        unsafe {
609            crate::common::Reg::<self::Busoad_SPEC, crate::common::RW>::from_ptr(
610                self._svd2pac_as_ptr().add(4096usize),
611            )
612        }
613    }
614
615    #[doc = "BUS Operation After Detection Protect Register"]
616    #[inline(always)]
617    pub const fn busoadpt(
618        &self,
619    ) -> &'static crate::common::Reg<self::Busoadpt_SPEC, crate::common::RW> {
620        unsafe {
621            crate::common::Reg::<self::Busoadpt_SPEC, crate::common::RW>::from_ptr(
622                self._svd2pac_as_ptr().add(4100usize),
623            )
624        }
625    }
626
627    #[doc = "Master Security Attribution Operation After Detection Register"]
628    #[inline(always)]
629    pub const fn msaoad(
630        &self,
631    ) -> &'static crate::common::Reg<self::Msaoad_SPEC, crate::common::RW> {
632        unsafe {
633            crate::common::Reg::<self::Msaoad_SPEC, crate::common::RW>::from_ptr(
634                self._svd2pac_as_ptr().add(4112usize),
635            )
636        }
637    }
638
639    #[doc = "Master Security Attribution Protect Register"]
640    #[inline(always)]
641    pub const fn msapt(&self) -> &'static crate::common::Reg<self::Msapt_SPEC, crate::common::RW> {
642        unsafe {
643            crate::common::Reg::<self::Msapt_SPEC, crate::common::RW>::from_ptr(
644                self._svd2pac_as_ptr().add(4116usize),
645            )
646        }
647    }
648
649    #[doc = "Bus Master Arbitration Control Register"]
650    #[inline(always)]
651    pub const fn busmabt(
652        &self,
653    ) -> &'static crate::common::Reg<self::Busmabt_SPEC, crate::common::RW> {
654        unsafe {
655            crate::common::Reg::<self::Busmabt_SPEC, crate::common::RW>::from_ptr(
656                self._svd2pac_as_ptr().add(4352usize),
657            )
658        }
659    }
660
661    #[doc = "Bus Slave Arbitration Control Register 1(x = FHBI, S0BI, S1BI)"]
662    #[inline(always)]
663    pub const fn bussabt1fhbi(
664        &self,
665    ) -> &'static crate::common::Reg<self::Bussabt1Fhbi_SPEC, crate::common::RW> {
666        unsafe {
667            crate::common::Reg::<self::Bussabt1Fhbi_SPEC, crate::common::RW>::from_ptr(
668                self._svd2pac_as_ptr().add(4608usize),
669            )
670        }
671    }
672
673    #[doc = "Bus Slave Arbitration Control Register 0"]
674    #[inline(always)]
675    pub const fn bussabt0flbi(
676        &self,
677    ) -> &'static crate::common::Reg<self::Bussabt0Flbi_SPEC, crate::common::RW> {
678        unsafe {
679            crate::common::Reg::<self::Bussabt0Flbi_SPEC, crate::common::RW>::from_ptr(
680                self._svd2pac_as_ptr().add(4624usize),
681            )
682        }
683    }
684
685    #[doc = "Bus Slave Arbitration Control Register 1(x = FHBI, S0BI, S1BI)"]
686    #[inline(always)]
687    pub const fn bussabt1s0bi(
688        &self,
689    ) -> &'static crate::common::Reg<self::Bussabt1S0Bi_SPEC, crate::common::RW> {
690        unsafe {
691            crate::common::Reg::<self::Bussabt1S0Bi_SPEC, crate::common::RW>::from_ptr(
692                self._svd2pac_as_ptr().add(4632usize),
693            )
694        }
695    }
696
697    #[doc = "Bus Slave Arbitration Control Register 1(x = FHBI, S0BI, S1BI)"]
698    #[inline(always)]
699    pub const fn bussabt1s1bi(
700        &self,
701    ) -> &'static crate::common::Reg<self::Bussabt1S1Bi_SPEC, crate::common::RW> {
702        unsafe {
703            crate::common::Reg::<self::Bussabt1S1Bi_SPEC, crate::common::RW>::from_ptr(
704                self._svd2pac_as_ptr().add(4640usize),
705            )
706        }
707    }
708
709    #[doc = "Bus Slave Arbitration Control Register 0"]
710    #[inline(always)]
711    pub const fn bussabt0stbysbi(
712        &self,
713    ) -> &'static crate::common::Reg<self::Bussabt0Stbysbi_SPEC, crate::common::RW> {
714        unsafe {
715            crate::common::Reg::<self::Bussabt0Stbysbi_SPEC, crate::common::RW>::from_ptr(
716                self._svd2pac_as_ptr().add(4680usize),
717            )
718        }
719    }
720
721    #[doc = "Bus Slave Arbitration Control Register 0"]
722    #[inline(always)]
723    pub const fn bussabt0ecbi(
724        &self,
725    ) -> &'static crate::common::Reg<self::Bussabt0Ecbi_SPEC, crate::common::RW> {
726        unsafe {
727            crate::common::Reg::<self::Bussabt0Ecbi_SPEC, crate::common::RW>::from_ptr(
728                self._svd2pac_as_ptr().add(4688usize),
729            )
730        }
731    }
732
733    #[doc = "Bus Slave Arbitration Control Register 0"]
734    #[inline(always)]
735    pub const fn bussabt0eobi(
736        &self,
737    ) -> &'static crate::common::Reg<self::Bussabt0Eobi_SPEC, crate::common::RW> {
738        unsafe {
739            crate::common::Reg::<self::Bussabt0Eobi_SPEC, crate::common::RW>::from_ptr(
740                self._svd2pac_as_ptr().add(4696usize),
741            )
742        }
743    }
744
745    #[doc = "Bus Slave Arbitration Control Register 0"]
746    #[inline(always)]
747    pub const fn bussabt0pbbi(
748        &self,
749    ) -> &'static crate::common::Reg<self::Bussabt0Pbbi_SPEC, crate::common::RW> {
750        unsafe {
751            crate::common::Reg::<self::Bussabt0Pbbi_SPEC, crate::common::RW>::from_ptr(
752                self._svd2pac_as_ptr().add(4704usize),
753            )
754        }
755    }
756
757    #[doc = "Bus Slave Arbitration Control Register 0"]
758    #[inline(always)]
759    pub const fn bussabt0pabi(
760        &self,
761    ) -> &'static crate::common::Reg<self::Bussabt0Pabi_SPEC, crate::common::RW> {
762        unsafe {
763            crate::common::Reg::<self::Bussabt0Pabi_SPEC, crate::common::RW>::from_ptr(
764                self._svd2pac_as_ptr().add(4712usize),
765            )
766        }
767    }
768
769    #[doc = "Bus Slave Arbitration Control Register 0"]
770    #[inline(always)]
771    pub const fn bussabt0pibi(
772        &self,
773    ) -> &'static crate::common::Reg<self::Bussabt0Pibi_SPEC, crate::common::RW> {
774        unsafe {
775            crate::common::Reg::<self::Bussabt0Pibi_SPEC, crate::common::RW>::from_ptr(
776                self._svd2pac_as_ptr().add(4720usize),
777            )
778        }
779    }
780
781    #[doc = "Bus Slave Arbitration Control Register 0"]
782    #[inline(always)]
783    pub const fn bussabt0psbi(
784        &self,
785    ) -> &'static crate::common::Reg<self::Bussabt0Psbi_SPEC, crate::common::RW> {
786        unsafe {
787            crate::common::Reg::<self::Bussabt0Psbi_SPEC, crate::common::RW>::from_ptr(
788                self._svd2pac_as_ptr().add(4728usize),
789            )
790        }
791    }
792
793    #[doc = "Bus Divider Bypass Register"]
794    #[inline(always)]
795    pub const fn busdivbyp(
796        &self,
797    ) -> &'static crate::common::Reg<self::Busdivbyp_SPEC, crate::common::RW> {
798        unsafe {
799            crate::common::Reg::<self::Busdivbyp_SPEC, crate::common::RW>::from_ptr(
800                self._svd2pac_as_ptr().add(4864usize),
801            )
802        }
803    }
804
805    #[doc = "BUS Error Read Write (n = 6 to 9)"]
806    #[inline(always)]
807    pub const fn buserrrw(
808        &self,
809    ) -> &'static crate::common::ClusterRegisterArray<
810        crate::common::Reg<self::Buserrrw_SPEC, crate::common::R>,
811        4,
812        0x10,
813    > {
814        unsafe {
815            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1824usize))
816        }
817    }
818    #[inline(always)]
819    pub const fn bus6errrw(
820        &self,
821    ) -> &'static crate::common::Reg<self::Buserrrw_SPEC, crate::common::R> {
822        unsafe {
823            crate::common::Reg::<self::Buserrrw_SPEC, crate::common::R>::from_ptr(
824                self._svd2pac_as_ptr().add(0x1824usize),
825            )
826        }
827    }
828    #[inline(always)]
829    pub const fn bus7errrw(
830        &self,
831    ) -> &'static crate::common::Reg<self::Buserrrw_SPEC, crate::common::R> {
832        unsafe {
833            crate::common::Reg::<self::Buserrrw_SPEC, crate::common::R>::from_ptr(
834                self._svd2pac_as_ptr().add(0x1834usize),
835            )
836        }
837    }
838    #[inline(always)]
839    pub const fn bus8errrw(
840        &self,
841    ) -> &'static crate::common::Reg<self::Buserrrw_SPEC, crate::common::R> {
842        unsafe {
843            crate::common::Reg::<self::Buserrrw_SPEC, crate::common::R>::from_ptr(
844                self._svd2pac_as_ptr().add(0x1844usize),
845            )
846        }
847    }
848    #[inline(always)]
849    pub const fn bus9errrw(
850        &self,
851    ) -> &'static crate::common::Reg<self::Buserrrw_SPEC, crate::common::R> {
852        unsafe {
853            crate::common::Reg::<self::Buserrrw_SPEC, crate::common::R>::from_ptr(
854                self._svd2pac_as_ptr().add(0x1854usize),
855            )
856        }
857    }
858
859    #[doc = "BUS Error Address Register (n = 6 to 9)"]
860    #[inline(always)]
861    pub const fn buserradd(
862        &self,
863    ) -> &'static crate::common::ClusterRegisterArray<
864        crate::common::Reg<self::Buserradd_SPEC, crate::common::R>,
865        4,
866        0x10,
867    > {
868        unsafe {
869            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1850usize))
870        }
871    }
872    #[inline(always)]
873    pub const fn bus6erradd(
874        &self,
875    ) -> &'static crate::common::Reg<self::Buserradd_SPEC, crate::common::R> {
876        unsafe {
877            crate::common::Reg::<self::Buserradd_SPEC, crate::common::R>::from_ptr(
878                self._svd2pac_as_ptr().add(0x1850usize),
879            )
880        }
881    }
882    #[inline(always)]
883    pub const fn bus7erradd(
884        &self,
885    ) -> &'static crate::common::Reg<self::Buserradd_SPEC, crate::common::R> {
886        unsafe {
887            crate::common::Reg::<self::Buserradd_SPEC, crate::common::R>::from_ptr(
888                self._svd2pac_as_ptr().add(0x1860usize),
889            )
890        }
891    }
892    #[inline(always)]
893    pub const fn bus8erradd(
894        &self,
895    ) -> &'static crate::common::Reg<self::Buserradd_SPEC, crate::common::R> {
896        unsafe {
897            crate::common::Reg::<self::Buserradd_SPEC, crate::common::R>::from_ptr(
898                self._svd2pac_as_ptr().add(0x1870usize),
899            )
900        }
901    }
902    #[inline(always)]
903    pub const fn bus9erradd(
904        &self,
905    ) -> &'static crate::common::Reg<self::Buserradd_SPEC, crate::common::R> {
906        unsafe {
907            crate::common::Reg::<self::Buserradd_SPEC, crate::common::R>::from_ptr(
908                self._svd2pac_as_ptr().add(0x1880usize),
909            )
910        }
911    }
912
913    #[doc = "Bus Master Security Attribution Unit Error Address"]
914    #[inline(always)]
915    pub const fn bmsaerradd(
916        &self,
917    ) -> &'static crate::common::ClusterRegisterArray<
918        crate::common::Reg<self::Bmsaerradd_SPEC, crate::common::R>,
919        4,
920        0x10,
921    > {
922        unsafe {
923            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1920usize))
924        }
925    }
926    #[inline(always)]
927    pub const fn bmsa6erradd(
928        &self,
929    ) -> &'static crate::common::Reg<self::Bmsaerradd_SPEC, crate::common::R> {
930        unsafe {
931            crate::common::Reg::<self::Bmsaerradd_SPEC, crate::common::R>::from_ptr(
932                self._svd2pac_as_ptr().add(0x1920usize),
933            )
934        }
935    }
936    #[inline(always)]
937    pub const fn bmsa7erradd(
938        &self,
939    ) -> &'static crate::common::Reg<self::Bmsaerradd_SPEC, crate::common::R> {
940        unsafe {
941            crate::common::Reg::<self::Bmsaerradd_SPEC, crate::common::R>::from_ptr(
942                self._svd2pac_as_ptr().add(0x1930usize),
943            )
944        }
945    }
946    #[inline(always)]
947    pub const fn bmsa8erradd(
948        &self,
949    ) -> &'static crate::common::Reg<self::Bmsaerradd_SPEC, crate::common::R> {
950        unsafe {
951            crate::common::Reg::<self::Bmsaerradd_SPEC, crate::common::R>::from_ptr(
952                self._svd2pac_as_ptr().add(0x1940usize),
953            )
954        }
955    }
956    #[inline(always)]
957    pub const fn bmsa9erradd(
958        &self,
959    ) -> &'static crate::common::Reg<self::Bmsaerradd_SPEC, crate::common::R> {
960        unsafe {
961            crate::common::Reg::<self::Bmsaerradd_SPEC, crate::common::R>::from_ptr(
962                self._svd2pac_as_ptr().add(0x1950usize),
963            )
964        }
965    }
966
967    #[doc = "BUS Master Security Attribution Unit Error Read Write (n = 6 to 9)"]
968    #[inline(always)]
969    pub const fn bmsaerrrw(
970        &self,
971    ) -> &'static crate::common::ClusterRegisterArray<
972        crate::common::Reg<self::Bmsaerrrw_SPEC, crate::common::R>,
973        4,
974        0x10,
975    > {
976        unsafe {
977            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1924usize))
978        }
979    }
980    #[inline(always)]
981    pub const fn bmsa6errrw(
982        &self,
983    ) -> &'static crate::common::Reg<self::Bmsaerrrw_SPEC, crate::common::R> {
984        unsafe {
985            crate::common::Reg::<self::Bmsaerrrw_SPEC, crate::common::R>::from_ptr(
986                self._svd2pac_as_ptr().add(0x1924usize),
987            )
988        }
989    }
990    #[inline(always)]
991    pub const fn bmsa7errrw(
992        &self,
993    ) -> &'static crate::common::Reg<self::Bmsaerrrw_SPEC, crate::common::R> {
994        unsafe {
995            crate::common::Reg::<self::Bmsaerrrw_SPEC, crate::common::R>::from_ptr(
996                self._svd2pac_as_ptr().add(0x1934usize),
997            )
998        }
999    }
1000    #[inline(always)]
1001    pub const fn bmsa8errrw(
1002        &self,
1003    ) -> &'static crate::common::Reg<self::Bmsaerrrw_SPEC, crate::common::R> {
1004        unsafe {
1005            crate::common::Reg::<self::Bmsaerrrw_SPEC, crate::common::R>::from_ptr(
1006                self._svd2pac_as_ptr().add(0x1944usize),
1007            )
1008        }
1009    }
1010    #[inline(always)]
1011    pub const fn bmsa9errrw(
1012        &self,
1013    ) -> &'static crate::common::Reg<self::Bmsaerrrw_SPEC, crate::common::R> {
1014        unsafe {
1015            crate::common::Reg::<self::Bmsaerrrw_SPEC, crate::common::R>::from_ptr(
1016                self._svd2pac_as_ptr().add(0x1954usize),
1017            )
1018        }
1019    }
1020
1021    #[doc = "BUS Error Status Register"]
1022    #[inline(always)]
1023    pub const fn buserrstat(
1024        &self,
1025    ) -> &'static crate::common::ClusterRegisterArray<
1026        crate::common::Reg<self::Buserrstat_SPEC, crate::common::R>,
1027        4,
1028        0x10,
1029    > {
1030        unsafe {
1031            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1a50usize))
1032        }
1033    }
1034    #[inline(always)]
1035    pub const fn bus6errstat(
1036        &self,
1037    ) -> &'static crate::common::Reg<self::Buserrstat_SPEC, crate::common::R> {
1038        unsafe {
1039            crate::common::Reg::<self::Buserrstat_SPEC, crate::common::R>::from_ptr(
1040                self._svd2pac_as_ptr().add(0x1a50usize),
1041            )
1042        }
1043    }
1044    #[inline(always)]
1045    pub const fn bus7errstat(
1046        &self,
1047    ) -> &'static crate::common::Reg<self::Buserrstat_SPEC, crate::common::R> {
1048        unsafe {
1049            crate::common::Reg::<self::Buserrstat_SPEC, crate::common::R>::from_ptr(
1050                self._svd2pac_as_ptr().add(0x1a60usize),
1051            )
1052        }
1053    }
1054    #[inline(always)]
1055    pub const fn bus8errstat(
1056        &self,
1057    ) -> &'static crate::common::Reg<self::Buserrstat_SPEC, crate::common::R> {
1058        unsafe {
1059            crate::common::Reg::<self::Buserrstat_SPEC, crate::common::R>::from_ptr(
1060                self._svd2pac_as_ptr().add(0x1a70usize),
1061            )
1062        }
1063    }
1064    #[inline(always)]
1065    pub const fn bus9errstat(
1066        &self,
1067    ) -> &'static crate::common::Reg<self::Buserrstat_SPEC, crate::common::R> {
1068        unsafe {
1069            crate::common::Reg::<self::Buserrstat_SPEC, crate::common::R>::from_ptr(
1070                self._svd2pac_as_ptr().add(0x1a80usize),
1071            )
1072        }
1073    }
1074
1075    #[doc = "BUS Error Clear Register"]
1076    #[inline(always)]
1077    pub const fn buserrclr(
1078        &self,
1079    ) -> &'static crate::common::ClusterRegisterArray<
1080        crate::common::Reg<self::Buserrclr_SPEC, crate::common::RW>,
1081        4,
1082        0x10,
1083    > {
1084        unsafe {
1085            crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x1a58usize))
1086        }
1087    }
1088    #[inline(always)]
1089    pub const fn bus6errclr(
1090        &self,
1091    ) -> &'static crate::common::Reg<self::Buserrclr_SPEC, crate::common::RW> {
1092        unsafe {
1093            crate::common::Reg::<self::Buserrclr_SPEC, crate::common::RW>::from_ptr(
1094                self._svd2pac_as_ptr().add(0x1a58usize),
1095            )
1096        }
1097    }
1098    #[inline(always)]
1099    pub const fn bus7errclr(
1100        &self,
1101    ) -> &'static crate::common::Reg<self::Buserrclr_SPEC, crate::common::RW> {
1102        unsafe {
1103            crate::common::Reg::<self::Buserrclr_SPEC, crate::common::RW>::from_ptr(
1104                self._svd2pac_as_ptr().add(0x1a68usize),
1105            )
1106        }
1107    }
1108    #[inline(always)]
1109    pub const fn bus8errclr(
1110        &self,
1111    ) -> &'static crate::common::Reg<self::Buserrclr_SPEC, crate::common::RW> {
1112        unsafe {
1113            crate::common::Reg::<self::Buserrclr_SPEC, crate::common::RW>::from_ptr(
1114                self._svd2pac_as_ptr().add(0x1a78usize),
1115            )
1116        }
1117    }
1118    #[inline(always)]
1119    pub const fn bus9errclr(
1120        &self,
1121    ) -> &'static crate::common::Reg<self::Buserrclr_SPEC, crate::common::RW> {
1122        unsafe {
1123            crate::common::Reg::<self::Buserrclr_SPEC, crate::common::RW>::from_ptr(
1124                self._svd2pac_as_ptr().add(0x1a88usize),
1125            )
1126        }
1127    }
1128
1129    #[doc = "Master Bufferable Write Error Status Register"]
1130    #[inline(always)]
1131    pub const fn mbwerrstat(
1132        &self,
1133    ) -> &'static crate::common::Reg<self::Mbwerrstat_SPEC, crate::common::R> {
1134        unsafe {
1135            crate::common::Reg::<self::Mbwerrstat_SPEC, crate::common::R>::from_ptr(
1136                self._svd2pac_as_ptr().add(6912usize),
1137            )
1138        }
1139    }
1140
1141    #[doc = "Master Bufferable Write Error Clear Register"]
1142    #[inline(always)]
1143    pub const fn mbwerrclr(
1144        &self,
1145    ) -> &'static crate::common::Reg<self::Mbwerrclr_SPEC, crate::common::RW> {
1146        unsafe {
1147            crate::common::Reg::<self::Mbwerrclr_SPEC, crate::common::RW>::from_ptr(
1148                self._svd2pac_as_ptr().add(6920usize),
1149            )
1150        }
1151    }
1152
1153    #[doc = "Slave Bufferable Write Error Status Register"]
1154    #[inline(always)]
1155    pub const fn sbwerrstat(
1156        &self,
1157    ) -> &'static crate::common::Reg<self::Sbwerrstat_SPEC, crate::common::R> {
1158        unsafe {
1159            crate::common::Reg::<self::Sbwerrstat_SPEC, crate::common::R>::from_ptr(
1160                self._svd2pac_as_ptr().add(6944usize),
1161            )
1162        }
1163    }
1164
1165    #[doc = "Slave Bufferable Write Error Clear Register"]
1166    #[inline(always)]
1167    pub const fn sbwerrclr(
1168        &self,
1169    ) -> &'static crate::common::Reg<self::Sbwerrclr_SPEC, crate::common::RW> {
1170        unsafe {
1171            crate::common::Reg::<self::Sbwerrclr_SPEC, crate::common::RW>::from_ptr(
1172                self._svd2pac_as_ptr().add(6952usize),
1173            )
1174        }
1175    }
1176}
1177#[doc(hidden)]
1178#[derive(Copy, Clone, Eq, PartialEq)]
1179pub struct Csmod_SPEC;
1180impl crate::sealed::RegSpec for Csmod_SPEC {
1181    type DataType = u16;
1182}
1183
1184#[doc = "CS%s Mode Register (n = 0 to 7)"]
1185pub type Csmod = crate::RegValueT<Csmod_SPEC>;
1186
1187impl Csmod {
1188    #[doc = "Write Access Mode Select"]
1189    #[inline(always)]
1190    pub fn wrmod(
1191        self,
1192    ) -> crate::common::RegisterField<
1193        0,
1194        0x1,
1195        1,
1196        0,
1197        csmod::Wrmod,
1198        csmod::Wrmod,
1199        Csmod_SPEC,
1200        crate::common::RW,
1201    > {
1202        crate::common::RegisterField::<
1203            0,
1204            0x1,
1205            1,
1206            0,
1207            csmod::Wrmod,
1208            csmod::Wrmod,
1209            Csmod_SPEC,
1210            crate::common::RW,
1211        >::from_register(self, 0)
1212    }
1213
1214    #[doc = "External Wait Enable"]
1215    #[inline(always)]
1216    pub fn ewenb(
1217        self,
1218    ) -> crate::common::RegisterField<
1219        3,
1220        0x1,
1221        1,
1222        0,
1223        csmod::Ewenb,
1224        csmod::Ewenb,
1225        Csmod_SPEC,
1226        crate::common::RW,
1227    > {
1228        crate::common::RegisterField::<
1229            3,
1230            0x1,
1231            1,
1232            0,
1233            csmod::Ewenb,
1234            csmod::Ewenb,
1235            Csmod_SPEC,
1236            crate::common::RW,
1237        >::from_register(self, 0)
1238    }
1239
1240    #[doc = "Page Read Access Enable"]
1241    #[inline(always)]
1242    pub fn prenb(
1243        self,
1244    ) -> crate::common::RegisterField<
1245        8,
1246        0x1,
1247        1,
1248        0,
1249        csmod::Prenb,
1250        csmod::Prenb,
1251        Csmod_SPEC,
1252        crate::common::RW,
1253    > {
1254        crate::common::RegisterField::<
1255            8,
1256            0x1,
1257            1,
1258            0,
1259            csmod::Prenb,
1260            csmod::Prenb,
1261            Csmod_SPEC,
1262            crate::common::RW,
1263        >::from_register(self, 0)
1264    }
1265
1266    #[doc = "Page Write Access Enable"]
1267    #[inline(always)]
1268    pub fn pwenb(
1269        self,
1270    ) -> crate::common::RegisterField<
1271        9,
1272        0x1,
1273        1,
1274        0,
1275        csmod::Pwenb,
1276        csmod::Pwenb,
1277        Csmod_SPEC,
1278        crate::common::RW,
1279    > {
1280        crate::common::RegisterField::<
1281            9,
1282            0x1,
1283            1,
1284            0,
1285            csmod::Pwenb,
1286            csmod::Pwenb,
1287            Csmod_SPEC,
1288            crate::common::RW,
1289        >::from_register(self, 0)
1290    }
1291
1292    #[doc = "Page Read Access Mode Select"]
1293    #[inline(always)]
1294    pub fn prmod(
1295        self,
1296    ) -> crate::common::RegisterField<
1297        15,
1298        0x1,
1299        1,
1300        0,
1301        csmod::Prmod,
1302        csmod::Prmod,
1303        Csmod_SPEC,
1304        crate::common::RW,
1305    > {
1306        crate::common::RegisterField::<
1307            15,
1308            0x1,
1309            1,
1310            0,
1311            csmod::Prmod,
1312            csmod::Prmod,
1313            Csmod_SPEC,
1314            crate::common::RW,
1315        >::from_register(self, 0)
1316    }
1317}
1318impl ::core::default::Default for Csmod {
1319    #[inline(always)]
1320    fn default() -> Csmod {
1321        <crate::RegValueT<Csmod_SPEC> as RegisterValue<_>>::new(0)
1322    }
1323}
1324pub mod csmod {
1325
1326    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1327    pub struct Wrmod_SPEC;
1328    pub type Wrmod = crate::EnumBitfieldStruct<u8, Wrmod_SPEC>;
1329    impl Wrmod {
1330        #[doc = "Byte strobe mode"]
1331        pub const _0: Self = Self::new(0);
1332
1333        #[doc = "Single-write strobe mode"]
1334        pub const _1: Self = Self::new(1);
1335    }
1336    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1337    pub struct Ewenb_SPEC;
1338    pub type Ewenb = crate::EnumBitfieldStruct<u8, Ewenb_SPEC>;
1339    impl Ewenb {
1340        #[doc = "Disabled"]
1341        pub const _0: Self = Self::new(0);
1342
1343        #[doc = "Enabled"]
1344        pub const _1: Self = Self::new(1);
1345    }
1346    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1347    pub struct Prenb_SPEC;
1348    pub type Prenb = crate::EnumBitfieldStruct<u8, Prenb_SPEC>;
1349    impl Prenb {
1350        #[doc = "Disabled"]
1351        pub const _0: Self = Self::new(0);
1352
1353        #[doc = "Enabled"]
1354        pub const _1: Self = Self::new(1);
1355    }
1356    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1357    pub struct Pwenb_SPEC;
1358    pub type Pwenb = crate::EnumBitfieldStruct<u8, Pwenb_SPEC>;
1359    impl Pwenb {
1360        #[doc = "Disabled"]
1361        pub const _0: Self = Self::new(0);
1362
1363        #[doc = "Enabled"]
1364        pub const _1: Self = Self::new(1);
1365    }
1366    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1367    pub struct Prmod_SPEC;
1368    pub type Prmod = crate::EnumBitfieldStruct<u8, Prmod_SPEC>;
1369    impl Prmod {
1370        #[doc = "Normal access compatible mode"]
1371        pub const _0: Self = Self::new(0);
1372
1373        #[doc = "External data read continuous assertion mode"]
1374        pub const _1: Self = Self::new(1);
1375    }
1376}
1377#[doc(hidden)]
1378#[derive(Copy, Clone, Eq, PartialEq)]
1379pub struct Cswcr1_SPEC;
1380impl crate::sealed::RegSpec for Cswcr1_SPEC {
1381    type DataType = u32;
1382}
1383
1384#[doc = "CS%s Wait Control Register 1 (n = 0 to 7)"]
1385pub type Cswcr1 = crate::RegValueT<Cswcr1_SPEC>;
1386
1387impl Cswcr1 {
1388    #[doc = "Page Write Cycle Wait Select"]
1389    #[inline(always)]
1390    pub fn cspwwait(
1391        self,
1392    ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, Cswcr1_SPEC, crate::common::RW> {
1393        crate::common::RegisterField::<0,0x7,1,0,u8,u8,Cswcr1_SPEC,crate::common::RW>::from_register(self,0)
1394    }
1395
1396    #[doc = "Page Read Cycle Wait Select"]
1397    #[inline(always)]
1398    pub fn csprwait(
1399        self,
1400    ) -> crate::common::RegisterField<8, 0x7, 1, 0, u8, u8, Cswcr1_SPEC, crate::common::RW> {
1401        crate::common::RegisterField::<8,0x7,1,0,u8,u8,Cswcr1_SPEC,crate::common::RW>::from_register(self,0)
1402    }
1403
1404    #[doc = "Normal Write Cycle Wait Select"]
1405    #[inline(always)]
1406    pub fn cswwait(
1407        self,
1408    ) -> crate::common::RegisterField<16, 0x1f, 1, 0, u8, u8, Cswcr1_SPEC, crate::common::RW> {
1409        crate::common::RegisterField::<16,0x1f,1,0,u8,u8,Cswcr1_SPEC,crate::common::RW>::from_register(self,0)
1410    }
1411
1412    #[doc = "Normal Read Cycle Wait Select"]
1413    #[inline(always)]
1414    pub fn csrwait(
1415        self,
1416    ) -> crate::common::RegisterField<24, 0x1f, 1, 0, u8, u8, Cswcr1_SPEC, crate::common::RW> {
1417        crate::common::RegisterField::<24,0x1f,1,0,u8,u8,Cswcr1_SPEC,crate::common::RW>::from_register(self,0)
1418    }
1419}
1420impl ::core::default::Default for Cswcr1 {
1421    #[inline(always)]
1422    fn default() -> Cswcr1 {
1423        <crate::RegValueT<Cswcr1_SPEC> as RegisterValue<_>>::new(117901063)
1424    }
1425}
1426
1427#[doc(hidden)]
1428#[derive(Copy, Clone, Eq, PartialEq)]
1429pub struct Cswcr2_SPEC;
1430impl crate::sealed::RegSpec for Cswcr2_SPEC {
1431    type DataType = u32;
1432}
1433
1434#[doc = "CS%s Wait Control Register 2 (n = 0 to 7)"]
1435pub type Cswcr2 = crate::RegValueT<Cswcr2_SPEC>;
1436
1437impl Cswcr2 {
1438    #[doc = "Read Access CS Extension Cycle Select"]
1439    #[inline(always)]
1440    pub fn csroff(
1441        self,
1442    ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, Cswcr2_SPEC, crate::common::RW> {
1443        crate::common::RegisterField::<0,0x7,1,0,u8,u8,Cswcr2_SPEC,crate::common::RW>::from_register(self,0)
1444    }
1445
1446    #[doc = "Write Access CS Extension Cycle Select"]
1447    #[inline(always)]
1448    pub fn cswoff(
1449        self,
1450    ) -> crate::common::RegisterField<4, 0x7, 1, 0, u8, u8, Cswcr2_SPEC, crate::common::RW> {
1451        crate::common::RegisterField::<4,0x7,1,0,u8,u8,Cswcr2_SPEC,crate::common::RW>::from_register(self,0)
1452    }
1453
1454    #[doc = "Write Data Output Extension Cycle Select"]
1455    #[inline(always)]
1456    pub fn wdoff(
1457        self,
1458    ) -> crate::common::RegisterField<8, 0x7, 1, 0, u8, u8, Cswcr2_SPEC, crate::common::RW> {
1459        crate::common::RegisterField::<8,0x7,1,0,u8,u8,Cswcr2_SPEC,crate::common::RW>::from_register(self,0)
1460    }
1461
1462    #[doc = "Address Cycle Wait Select"]
1463    #[inline(always)]
1464    pub fn r#await(
1465        self,
1466    ) -> crate::common::RegisterField<12, 0x3, 1, 0, u8, u8, Cswcr2_SPEC, crate::common::RW> {
1467        crate::common::RegisterField::<12,0x3,1,0,u8,u8,Cswcr2_SPEC,crate::common::RW>::from_register(self,0)
1468    }
1469
1470    #[doc = "RD Assert Wait Select"]
1471    #[inline(always)]
1472    pub fn rdon(
1473        self,
1474    ) -> crate::common::RegisterField<16, 0x7, 1, 0, u8, u8, Cswcr2_SPEC, crate::common::RW> {
1475        crate::common::RegisterField::<16,0x7,1,0,u8,u8,Cswcr2_SPEC,crate::common::RW>::from_register(self,0)
1476    }
1477
1478    #[doc = "WR Assert Wait Select"]
1479    #[inline(always)]
1480    pub fn wron(
1481        self,
1482    ) -> crate::common::RegisterField<20, 0x7, 1, 0, u8, u8, Cswcr2_SPEC, crate::common::RW> {
1483        crate::common::RegisterField::<20,0x7,1,0,u8,u8,Cswcr2_SPEC,crate::common::RW>::from_register(self,0)
1484    }
1485
1486    #[doc = "Write Data Output Wait Select"]
1487    #[inline(always)]
1488    pub fn wdon(
1489        self,
1490    ) -> crate::common::RegisterField<24, 0x7, 1, 0, u8, u8, Cswcr2_SPEC, crate::common::RW> {
1491        crate::common::RegisterField::<24,0x7,1,0,u8,u8,Cswcr2_SPEC,crate::common::RW>::from_register(self,0)
1492    }
1493
1494    #[doc = "CS Assert Wait Select"]
1495    #[inline(always)]
1496    pub fn cson(
1497        self,
1498    ) -> crate::common::RegisterField<28, 0x7, 1, 0, u8, u8, Cswcr2_SPEC, crate::common::RW> {
1499        crate::common::RegisterField::<28,0x7,1,0,u8,u8,Cswcr2_SPEC,crate::common::RW>::from_register(self,0)
1500    }
1501}
1502impl ::core::default::Default for Cswcr2 {
1503    #[inline(always)]
1504    fn default() -> Cswcr2 {
1505        <crate::RegValueT<Cswcr2_SPEC> as RegisterValue<_>>::new(7)
1506    }
1507}
1508
1509#[doc(hidden)]
1510#[derive(Copy, Clone, Eq, PartialEq)]
1511pub struct Cs0Cr_SPEC;
1512impl crate::sealed::RegSpec for Cs0Cr_SPEC {
1513    type DataType = u16;
1514}
1515
1516#[doc = "CS0 Control Register"]
1517pub type Cs0Cr = crate::RegValueT<Cs0Cr_SPEC>;
1518
1519impl Cs0Cr {
1520    #[doc = "Operation Enable"]
1521    #[inline(always)]
1522    pub fn exenb(
1523        self,
1524    ) -> crate::common::RegisterField<
1525        0,
1526        0x1,
1527        1,
1528        0,
1529        cs0cr::Exenb,
1530        cs0cr::Exenb,
1531        Cs0Cr_SPEC,
1532        crate::common::RW,
1533    > {
1534        crate::common::RegisterField::<
1535            0,
1536            0x1,
1537            1,
1538            0,
1539            cs0cr::Exenb,
1540            cs0cr::Exenb,
1541            Cs0Cr_SPEC,
1542            crate::common::RW,
1543        >::from_register(self, 0)
1544    }
1545
1546    #[doc = "External Bus Width Select"]
1547    #[inline(always)]
1548    pub fn bsize(
1549        self,
1550    ) -> crate::common::RegisterField<
1551        4,
1552        0x3,
1553        1,
1554        0,
1555        cs0cr::Bsize,
1556        cs0cr::Bsize,
1557        Cs0Cr_SPEC,
1558        crate::common::RW,
1559    > {
1560        crate::common::RegisterField::<
1561            4,
1562            0x3,
1563            1,
1564            0,
1565            cs0cr::Bsize,
1566            cs0cr::Bsize,
1567            Cs0Cr_SPEC,
1568            crate::common::RW,
1569        >::from_register(self, 0)
1570    }
1571
1572    #[doc = "Endian Mode"]
1573    #[inline(always)]
1574    pub fn emode(
1575        self,
1576    ) -> crate::common::RegisterField<
1577        8,
1578        0x1,
1579        1,
1580        0,
1581        cs0cr::Emode,
1582        cs0cr::Emode,
1583        Cs0Cr_SPEC,
1584        crate::common::RW,
1585    > {
1586        crate::common::RegisterField::<
1587            8,
1588            0x1,
1589            1,
1590            0,
1591            cs0cr::Emode,
1592            cs0cr::Emode,
1593            Cs0Cr_SPEC,
1594            crate::common::RW,
1595        >::from_register(self, 0)
1596    }
1597
1598    #[doc = "Address/Data Multiplexed I/O Interface Select"]
1599    #[inline(always)]
1600    pub fn mpxen(
1601        self,
1602    ) -> crate::common::RegisterField<
1603        12,
1604        0x1,
1605        1,
1606        0,
1607        cs0cr::Mpxen,
1608        cs0cr::Mpxen,
1609        Cs0Cr_SPEC,
1610        crate::common::RW,
1611    > {
1612        crate::common::RegisterField::<
1613            12,
1614            0x1,
1615            1,
1616            0,
1617            cs0cr::Mpxen,
1618            cs0cr::Mpxen,
1619            Cs0Cr_SPEC,
1620            crate::common::RW,
1621        >::from_register(self, 0)
1622    }
1623}
1624impl ::core::default::Default for Cs0Cr {
1625    #[inline(always)]
1626    fn default() -> Cs0Cr {
1627        <crate::RegValueT<Cs0Cr_SPEC> as RegisterValue<_>>::new(1)
1628    }
1629}
1630pub mod cs0cr {
1631
1632    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1633    pub struct Exenb_SPEC;
1634    pub type Exenb = crate::EnumBitfieldStruct<u8, Exenb_SPEC>;
1635    impl Exenb {
1636        #[doc = "Disable operation"]
1637        pub const _0: Self = Self::new(0);
1638
1639        #[doc = "Enable operation"]
1640        pub const _1: Self = Self::new(1);
1641    }
1642    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1643    pub struct Bsize_SPEC;
1644    pub type Bsize = crate::EnumBitfieldStruct<u8, Bsize_SPEC>;
1645    impl Bsize {
1646        #[doc = "16-bit bus space"]
1647        pub const _00: Self = Self::new(0);
1648
1649        #[doc = "8-bit bus space"]
1650        pub const _10: Self = Self::new(2);
1651
1652        #[doc = "Setting prohibited"]
1653        pub const OTHERS: Self = Self::new(0);
1654    }
1655    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1656    pub struct Emode_SPEC;
1657    pub type Emode = crate::EnumBitfieldStruct<u8, Emode_SPEC>;
1658    impl Emode {
1659        #[doc = "Little endian"]
1660        pub const _0: Self = Self::new(0);
1661
1662        #[doc = "Big endian"]
1663        pub const _1: Self = Self::new(1);
1664    }
1665    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1666    pub struct Mpxen_SPEC;
1667    pub type Mpxen = crate::EnumBitfieldStruct<u8, Mpxen_SPEC>;
1668    impl Mpxen {
1669        #[doc = "Separate bus interface is selected for area n."]
1670        pub const _0: Self = Self::new(0);
1671
1672        #[doc = "Address/data multiplexed I/O interface is selected for area n."]
1673        pub const _1: Self = Self::new(1);
1674    }
1675}
1676#[doc(hidden)]
1677#[derive(Copy, Clone, Eq, PartialEq)]
1678pub struct Csrec_SPEC;
1679impl crate::sealed::RegSpec for Csrec_SPEC {
1680    type DataType = u16;
1681}
1682
1683#[doc = "CS%s Recovery Cycle Register (n = 0 to 7)"]
1684pub type Csrec = crate::RegValueT<Csrec_SPEC>;
1685
1686impl Csrec {
1687    #[doc = "Read Recovery"]
1688    #[inline(always)]
1689    pub fn rrcv(
1690        self,
1691    ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Csrec_SPEC, crate::common::RW> {
1692        crate::common::RegisterField::<0,0xf,1,0,u8,u8,Csrec_SPEC,crate::common::RW>::from_register(self,0)
1693    }
1694
1695    #[doc = "Write Recovery"]
1696    #[inline(always)]
1697    pub fn wrcv(
1698        self,
1699    ) -> crate::common::RegisterField<8, 0xf, 1, 0, u8, u8, Csrec_SPEC, crate::common::RW> {
1700        crate::common::RegisterField::<8,0xf,1,0,u8,u8,Csrec_SPEC,crate::common::RW>::from_register(self,0)
1701    }
1702}
1703impl ::core::default::Default for Csrec {
1704    #[inline(always)]
1705    fn default() -> Csrec {
1706        <crate::RegValueT<Csrec_SPEC> as RegisterValue<_>>::new(0)
1707    }
1708}
1709
1710#[doc(hidden)]
1711#[derive(Copy, Clone, Eq, PartialEq)]
1712pub struct Cscr_SPEC;
1713impl crate::sealed::RegSpec for Cscr_SPEC {
1714    type DataType = u16;
1715}
1716
1717#[doc = "CS%s Control Register"]
1718pub type Cscr = crate::RegValueT<Cscr_SPEC>;
1719
1720impl Cscr {
1721    #[doc = "Operation Enable"]
1722    #[inline(always)]
1723    pub fn exenb(
1724        self,
1725    ) -> crate::common::RegisterField<
1726        0,
1727        0x1,
1728        1,
1729        0,
1730        cscr::Exenb,
1731        cscr::Exenb,
1732        Cscr_SPEC,
1733        crate::common::RW,
1734    > {
1735        crate::common::RegisterField::<
1736            0,
1737            0x1,
1738            1,
1739            0,
1740            cscr::Exenb,
1741            cscr::Exenb,
1742            Cscr_SPEC,
1743            crate::common::RW,
1744        >::from_register(self, 0)
1745    }
1746
1747    #[doc = "External Bus Width Select"]
1748    #[inline(always)]
1749    pub fn bsize(
1750        self,
1751    ) -> crate::common::RegisterField<
1752        4,
1753        0x3,
1754        1,
1755        0,
1756        cscr::Bsize,
1757        cscr::Bsize,
1758        Cscr_SPEC,
1759        crate::common::RW,
1760    > {
1761        crate::common::RegisterField::<
1762            4,
1763            0x3,
1764            1,
1765            0,
1766            cscr::Bsize,
1767            cscr::Bsize,
1768            Cscr_SPEC,
1769            crate::common::RW,
1770        >::from_register(self, 0)
1771    }
1772
1773    #[doc = "Endian Mode"]
1774    #[inline(always)]
1775    pub fn emode(
1776        self,
1777    ) -> crate::common::RegisterField<
1778        8,
1779        0x1,
1780        1,
1781        0,
1782        cscr::Emode,
1783        cscr::Emode,
1784        Cscr_SPEC,
1785        crate::common::RW,
1786    > {
1787        crate::common::RegisterField::<
1788            8,
1789            0x1,
1790            1,
1791            0,
1792            cscr::Emode,
1793            cscr::Emode,
1794            Cscr_SPEC,
1795            crate::common::RW,
1796        >::from_register(self, 0)
1797    }
1798
1799    #[doc = "Address/Data Multiplexed I/O Interface Select"]
1800    #[inline(always)]
1801    pub fn mpxen(
1802        self,
1803    ) -> crate::common::RegisterField<
1804        12,
1805        0x1,
1806        1,
1807        0,
1808        cscr::Mpxen,
1809        cscr::Mpxen,
1810        Cscr_SPEC,
1811        crate::common::RW,
1812    > {
1813        crate::common::RegisterField::<
1814            12,
1815            0x1,
1816            1,
1817            0,
1818            cscr::Mpxen,
1819            cscr::Mpxen,
1820            Cscr_SPEC,
1821            crate::common::RW,
1822        >::from_register(self, 0)
1823    }
1824}
1825impl ::core::default::Default for Cscr {
1826    #[inline(always)]
1827    fn default() -> Cscr {
1828        <crate::RegValueT<Cscr_SPEC> as RegisterValue<_>>::new(0)
1829    }
1830}
1831pub mod cscr {
1832
1833    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1834    pub struct Exenb_SPEC;
1835    pub type Exenb = crate::EnumBitfieldStruct<u8, Exenb_SPEC>;
1836    impl Exenb {
1837        #[doc = "Disable operation"]
1838        pub const _0: Self = Self::new(0);
1839
1840        #[doc = "Enable operation"]
1841        pub const _1: Self = Self::new(1);
1842    }
1843    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1844    pub struct Bsize_SPEC;
1845    pub type Bsize = crate::EnumBitfieldStruct<u8, Bsize_SPEC>;
1846    impl Bsize {
1847        #[doc = "16-bit bus space"]
1848        pub const _00: Self = Self::new(0);
1849
1850        #[doc = "8-bit bus space"]
1851        pub const _10: Self = Self::new(2);
1852
1853        #[doc = "Setting prohibited"]
1854        pub const OTHERS: Self = Self::new(0);
1855    }
1856    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1857    pub struct Emode_SPEC;
1858    pub type Emode = crate::EnumBitfieldStruct<u8, Emode_SPEC>;
1859    impl Emode {
1860        #[doc = "Little endian"]
1861        pub const _0: Self = Self::new(0);
1862
1863        #[doc = "Big endian"]
1864        pub const _1: Self = Self::new(1);
1865    }
1866    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
1867    pub struct Mpxen_SPEC;
1868    pub type Mpxen = crate::EnumBitfieldStruct<u8, Mpxen_SPEC>;
1869    impl Mpxen {
1870        #[doc = "Separate bus interface is selected for area n."]
1871        pub const _0: Self = Self::new(0);
1872
1873        #[doc = "Address/data multiplexed I/O interface is selected for area n."]
1874        pub const _1: Self = Self::new(1);
1875    }
1876}
1877#[doc(hidden)]
1878#[derive(Copy, Clone, Eq, PartialEq)]
1879pub struct Csrecen_SPEC;
1880impl crate::sealed::RegSpec for Csrecen_SPEC {
1881    type DataType = u16;
1882}
1883
1884#[doc = "CS Recovery Cycle Insertion Enable Register"]
1885pub type Csrecen = crate::RegValueT<Csrecen_SPEC>;
1886
1887impl Csrecen {
1888    #[doc = "Separate Bus Recovery Cycle Insertion Enable 0"]
1889    #[inline(always)]
1890    pub fn rcven0(
1891        self,
1892    ) -> crate::common::RegisterField<
1893        0,
1894        0x1,
1895        1,
1896        0,
1897        csrecen::Rcven0,
1898        csrecen::Rcven0,
1899        Csrecen_SPEC,
1900        crate::common::RW,
1901    > {
1902        crate::common::RegisterField::<
1903            0,
1904            0x1,
1905            1,
1906            0,
1907            csrecen::Rcven0,
1908            csrecen::Rcven0,
1909            Csrecen_SPEC,
1910            crate::common::RW,
1911        >::from_register(self, 0)
1912    }
1913
1914    #[doc = "Separate Bus Recovery Cycle Insertion Enable 1"]
1915    #[inline(always)]
1916    pub fn rcven1(
1917        self,
1918    ) -> crate::common::RegisterField<
1919        1,
1920        0x1,
1921        1,
1922        0,
1923        csrecen::Rcven1,
1924        csrecen::Rcven1,
1925        Csrecen_SPEC,
1926        crate::common::RW,
1927    > {
1928        crate::common::RegisterField::<
1929            1,
1930            0x1,
1931            1,
1932            0,
1933            csrecen::Rcven1,
1934            csrecen::Rcven1,
1935            Csrecen_SPEC,
1936            crate::common::RW,
1937        >::from_register(self, 0)
1938    }
1939
1940    #[doc = "Separate Bus Recovery Cycle Insertion Enable 2"]
1941    #[inline(always)]
1942    pub fn rcven2(
1943        self,
1944    ) -> crate::common::RegisterField<
1945        2,
1946        0x1,
1947        1,
1948        0,
1949        csrecen::Rcven2,
1950        csrecen::Rcven2,
1951        Csrecen_SPEC,
1952        crate::common::RW,
1953    > {
1954        crate::common::RegisterField::<
1955            2,
1956            0x1,
1957            1,
1958            0,
1959            csrecen::Rcven2,
1960            csrecen::Rcven2,
1961            Csrecen_SPEC,
1962            crate::common::RW,
1963        >::from_register(self, 0)
1964    }
1965
1966    #[doc = "Separate Bus Recovery Cycle Insertion Enable 3"]
1967    #[inline(always)]
1968    pub fn rcven3(
1969        self,
1970    ) -> crate::common::RegisterField<
1971        3,
1972        0x1,
1973        1,
1974        0,
1975        csrecen::Rcven3,
1976        csrecen::Rcven3,
1977        Csrecen_SPEC,
1978        crate::common::RW,
1979    > {
1980        crate::common::RegisterField::<
1981            3,
1982            0x1,
1983            1,
1984            0,
1985            csrecen::Rcven3,
1986            csrecen::Rcven3,
1987            Csrecen_SPEC,
1988            crate::common::RW,
1989        >::from_register(self, 0)
1990    }
1991
1992    #[doc = "Separate Bus Recovery Cycle Insertion Enable 4"]
1993    #[inline(always)]
1994    pub fn rcven4(
1995        self,
1996    ) -> crate::common::RegisterField<
1997        4,
1998        0x1,
1999        1,
2000        0,
2001        csrecen::Rcven4,
2002        csrecen::Rcven4,
2003        Csrecen_SPEC,
2004        crate::common::RW,
2005    > {
2006        crate::common::RegisterField::<
2007            4,
2008            0x1,
2009            1,
2010            0,
2011            csrecen::Rcven4,
2012            csrecen::Rcven4,
2013            Csrecen_SPEC,
2014            crate::common::RW,
2015        >::from_register(self, 0)
2016    }
2017
2018    #[doc = "Separate Bus Recovery Cycle Insertion Enable 5"]
2019    #[inline(always)]
2020    pub fn rcven5(
2021        self,
2022    ) -> crate::common::RegisterField<
2023        5,
2024        0x1,
2025        1,
2026        0,
2027        csrecen::Rcven5,
2028        csrecen::Rcven5,
2029        Csrecen_SPEC,
2030        crate::common::RW,
2031    > {
2032        crate::common::RegisterField::<
2033            5,
2034            0x1,
2035            1,
2036            0,
2037            csrecen::Rcven5,
2038            csrecen::Rcven5,
2039            Csrecen_SPEC,
2040            crate::common::RW,
2041        >::from_register(self, 0)
2042    }
2043
2044    #[doc = "Separate Bus Recovery Cycle Insertion Enable 6"]
2045    #[inline(always)]
2046    pub fn rcven6(
2047        self,
2048    ) -> crate::common::RegisterField<
2049        6,
2050        0x1,
2051        1,
2052        0,
2053        csrecen::Rcven6,
2054        csrecen::Rcven6,
2055        Csrecen_SPEC,
2056        crate::common::RW,
2057    > {
2058        crate::common::RegisterField::<
2059            6,
2060            0x1,
2061            1,
2062            0,
2063            csrecen::Rcven6,
2064            csrecen::Rcven6,
2065            Csrecen_SPEC,
2066            crate::common::RW,
2067        >::from_register(self, 0)
2068    }
2069
2070    #[doc = "Separate Bus Recovery Cycle Insertion Enable 7"]
2071    #[inline(always)]
2072    pub fn rcven7(
2073        self,
2074    ) -> crate::common::RegisterField<
2075        7,
2076        0x1,
2077        1,
2078        0,
2079        csrecen::Rcven7,
2080        csrecen::Rcven7,
2081        Csrecen_SPEC,
2082        crate::common::RW,
2083    > {
2084        crate::common::RegisterField::<
2085            7,
2086            0x1,
2087            1,
2088            0,
2089            csrecen::Rcven7,
2090            csrecen::Rcven7,
2091            Csrecen_SPEC,
2092            crate::common::RW,
2093        >::from_register(self, 0)
2094    }
2095
2096    #[doc = "Multiplexed Bus Recovery Cycle Insertion Enable 0"]
2097    #[inline(always)]
2098    pub fn rcvenm0(
2099        self,
2100    ) -> crate::common::RegisterField<
2101        8,
2102        0x1,
2103        1,
2104        0,
2105        csrecen::Rcvenm0,
2106        csrecen::Rcvenm0,
2107        Csrecen_SPEC,
2108        crate::common::RW,
2109    > {
2110        crate::common::RegisterField::<
2111            8,
2112            0x1,
2113            1,
2114            0,
2115            csrecen::Rcvenm0,
2116            csrecen::Rcvenm0,
2117            Csrecen_SPEC,
2118            crate::common::RW,
2119        >::from_register(self, 0)
2120    }
2121
2122    #[doc = "Multiplexed Bus Recovery Cycle Insertion Enable 1"]
2123    #[inline(always)]
2124    pub fn rcvenm1(
2125        self,
2126    ) -> crate::common::RegisterField<
2127        9,
2128        0x1,
2129        1,
2130        0,
2131        csrecen::Rcvenm1,
2132        csrecen::Rcvenm1,
2133        Csrecen_SPEC,
2134        crate::common::RW,
2135    > {
2136        crate::common::RegisterField::<
2137            9,
2138            0x1,
2139            1,
2140            0,
2141            csrecen::Rcvenm1,
2142            csrecen::Rcvenm1,
2143            Csrecen_SPEC,
2144            crate::common::RW,
2145        >::from_register(self, 0)
2146    }
2147
2148    #[doc = "Multiplexed Bus Recovery Cycle Insertion Enable 2"]
2149    #[inline(always)]
2150    pub fn rcvenm2(
2151        self,
2152    ) -> crate::common::RegisterField<
2153        10,
2154        0x1,
2155        1,
2156        0,
2157        csrecen::Rcvenm2,
2158        csrecen::Rcvenm2,
2159        Csrecen_SPEC,
2160        crate::common::RW,
2161    > {
2162        crate::common::RegisterField::<
2163            10,
2164            0x1,
2165            1,
2166            0,
2167            csrecen::Rcvenm2,
2168            csrecen::Rcvenm2,
2169            Csrecen_SPEC,
2170            crate::common::RW,
2171        >::from_register(self, 0)
2172    }
2173
2174    #[doc = "Multiplexed Bus Recovery Cycle Insertion Enable 3"]
2175    #[inline(always)]
2176    pub fn rcvenm3(
2177        self,
2178    ) -> crate::common::RegisterField<
2179        11,
2180        0x1,
2181        1,
2182        0,
2183        csrecen::Rcvenm3,
2184        csrecen::Rcvenm3,
2185        Csrecen_SPEC,
2186        crate::common::RW,
2187    > {
2188        crate::common::RegisterField::<
2189            11,
2190            0x1,
2191            1,
2192            0,
2193            csrecen::Rcvenm3,
2194            csrecen::Rcvenm3,
2195            Csrecen_SPEC,
2196            crate::common::RW,
2197        >::from_register(self, 0)
2198    }
2199
2200    #[doc = "Multiplexed Bus Recovery Cycle Insertion Enable 4"]
2201    #[inline(always)]
2202    pub fn rcvenm4(
2203        self,
2204    ) -> crate::common::RegisterField<
2205        12,
2206        0x1,
2207        1,
2208        0,
2209        csrecen::Rcvenm4,
2210        csrecen::Rcvenm4,
2211        Csrecen_SPEC,
2212        crate::common::RW,
2213    > {
2214        crate::common::RegisterField::<
2215            12,
2216            0x1,
2217            1,
2218            0,
2219            csrecen::Rcvenm4,
2220            csrecen::Rcvenm4,
2221            Csrecen_SPEC,
2222            crate::common::RW,
2223        >::from_register(self, 0)
2224    }
2225
2226    #[doc = "Multiplexed Bus Recovery Cycle Insertion Enable 5"]
2227    #[inline(always)]
2228    pub fn rcvenm5(
2229        self,
2230    ) -> crate::common::RegisterField<
2231        13,
2232        0x1,
2233        1,
2234        0,
2235        csrecen::Rcvenm5,
2236        csrecen::Rcvenm5,
2237        Csrecen_SPEC,
2238        crate::common::RW,
2239    > {
2240        crate::common::RegisterField::<
2241            13,
2242            0x1,
2243            1,
2244            0,
2245            csrecen::Rcvenm5,
2246            csrecen::Rcvenm5,
2247            Csrecen_SPEC,
2248            crate::common::RW,
2249        >::from_register(self, 0)
2250    }
2251
2252    #[doc = "Multiplexed Bus Recovery Cycle Insertion Enable 6"]
2253    #[inline(always)]
2254    pub fn rcvenm6(
2255        self,
2256    ) -> crate::common::RegisterField<
2257        14,
2258        0x1,
2259        1,
2260        0,
2261        csrecen::Rcvenm6,
2262        csrecen::Rcvenm6,
2263        Csrecen_SPEC,
2264        crate::common::RW,
2265    > {
2266        crate::common::RegisterField::<
2267            14,
2268            0x1,
2269            1,
2270            0,
2271            csrecen::Rcvenm6,
2272            csrecen::Rcvenm6,
2273            Csrecen_SPEC,
2274            crate::common::RW,
2275        >::from_register(self, 0)
2276    }
2277
2278    #[doc = "Multiplexed Bus Recovery Cycle Insertion Enable 7"]
2279    #[inline(always)]
2280    pub fn rcvenm7(
2281        self,
2282    ) -> crate::common::RegisterField<
2283        15,
2284        0x1,
2285        1,
2286        0,
2287        csrecen::Rcvenm7,
2288        csrecen::Rcvenm7,
2289        Csrecen_SPEC,
2290        crate::common::RW,
2291    > {
2292        crate::common::RegisterField::<
2293            15,
2294            0x1,
2295            1,
2296            0,
2297            csrecen::Rcvenm7,
2298            csrecen::Rcvenm7,
2299            Csrecen_SPEC,
2300            crate::common::RW,
2301        >::from_register(self, 0)
2302    }
2303}
2304impl ::core::default::Default for Csrecen {
2305    #[inline(always)]
2306    fn default() -> Csrecen {
2307        <crate::RegValueT<Csrecen_SPEC> as RegisterValue<_>>::new(15934)
2308    }
2309}
2310pub mod csrecen {
2311
2312    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2313    pub struct Rcven0_SPEC;
2314    pub type Rcven0 = crate::EnumBitfieldStruct<u8, Rcven0_SPEC>;
2315    impl Rcven0 {
2316        #[doc = "Disabled"]
2317        pub const _0: Self = Self::new(0);
2318
2319        #[doc = "Enabled"]
2320        pub const _1: Self = Self::new(1);
2321    }
2322    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2323    pub struct Rcven1_SPEC;
2324    pub type Rcven1 = crate::EnumBitfieldStruct<u8, Rcven1_SPEC>;
2325    impl Rcven1 {
2326        #[doc = "Disabled"]
2327        pub const _0: Self = Self::new(0);
2328
2329        #[doc = "Enabled"]
2330        pub const _1: Self = Self::new(1);
2331    }
2332    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2333    pub struct Rcven2_SPEC;
2334    pub type Rcven2 = crate::EnumBitfieldStruct<u8, Rcven2_SPEC>;
2335    impl Rcven2 {
2336        #[doc = "Disabled"]
2337        pub const _0: Self = Self::new(0);
2338
2339        #[doc = "Enabled"]
2340        pub const _1: Self = Self::new(1);
2341    }
2342    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2343    pub struct Rcven3_SPEC;
2344    pub type Rcven3 = crate::EnumBitfieldStruct<u8, Rcven3_SPEC>;
2345    impl Rcven3 {
2346        #[doc = "Disabled"]
2347        pub const _0: Self = Self::new(0);
2348
2349        #[doc = "Enabled"]
2350        pub const _1: Self = Self::new(1);
2351    }
2352    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2353    pub struct Rcven4_SPEC;
2354    pub type Rcven4 = crate::EnumBitfieldStruct<u8, Rcven4_SPEC>;
2355    impl Rcven4 {
2356        #[doc = "Disabled"]
2357        pub const _0: Self = Self::new(0);
2358
2359        #[doc = "Enabled"]
2360        pub const _1: Self = Self::new(1);
2361    }
2362    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2363    pub struct Rcven5_SPEC;
2364    pub type Rcven5 = crate::EnumBitfieldStruct<u8, Rcven5_SPEC>;
2365    impl Rcven5 {
2366        #[doc = "Disabled"]
2367        pub const _0: Self = Self::new(0);
2368
2369        #[doc = "Enabled"]
2370        pub const _1: Self = Self::new(1);
2371    }
2372    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2373    pub struct Rcven6_SPEC;
2374    pub type Rcven6 = crate::EnumBitfieldStruct<u8, Rcven6_SPEC>;
2375    impl Rcven6 {
2376        #[doc = "Disabled"]
2377        pub const _0: Self = Self::new(0);
2378
2379        #[doc = "Enabled"]
2380        pub const _1: Self = Self::new(1);
2381    }
2382    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2383    pub struct Rcven7_SPEC;
2384    pub type Rcven7 = crate::EnumBitfieldStruct<u8, Rcven7_SPEC>;
2385    impl Rcven7 {
2386        #[doc = "Disabled"]
2387        pub const _0: Self = Self::new(0);
2388
2389        #[doc = "Enabled"]
2390        pub const _1: Self = Self::new(1);
2391    }
2392    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2393    pub struct Rcvenm0_SPEC;
2394    pub type Rcvenm0 = crate::EnumBitfieldStruct<u8, Rcvenm0_SPEC>;
2395    impl Rcvenm0 {
2396        #[doc = "Disabled"]
2397        pub const _0: Self = Self::new(0);
2398
2399        #[doc = "Enabled"]
2400        pub const _1: Self = Self::new(1);
2401    }
2402    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2403    pub struct Rcvenm1_SPEC;
2404    pub type Rcvenm1 = crate::EnumBitfieldStruct<u8, Rcvenm1_SPEC>;
2405    impl Rcvenm1 {
2406        #[doc = "Disabled"]
2407        pub const _0: Self = Self::new(0);
2408
2409        #[doc = "Enabled"]
2410        pub const _1: Self = Self::new(1);
2411    }
2412    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2413    pub struct Rcvenm2_SPEC;
2414    pub type Rcvenm2 = crate::EnumBitfieldStruct<u8, Rcvenm2_SPEC>;
2415    impl Rcvenm2 {
2416        #[doc = "Disabled"]
2417        pub const _0: Self = Self::new(0);
2418
2419        #[doc = "Enabled"]
2420        pub const _1: Self = Self::new(1);
2421    }
2422    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2423    pub struct Rcvenm3_SPEC;
2424    pub type Rcvenm3 = crate::EnumBitfieldStruct<u8, Rcvenm3_SPEC>;
2425    impl Rcvenm3 {
2426        #[doc = "Disabled"]
2427        pub const _0: Self = Self::new(0);
2428
2429        #[doc = "Enabled"]
2430        pub const _1: Self = Self::new(1);
2431    }
2432    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2433    pub struct Rcvenm4_SPEC;
2434    pub type Rcvenm4 = crate::EnumBitfieldStruct<u8, Rcvenm4_SPEC>;
2435    impl Rcvenm4 {
2436        #[doc = "Disabled"]
2437        pub const _0: Self = Self::new(0);
2438
2439        #[doc = "Enabled"]
2440        pub const _1: Self = Self::new(1);
2441    }
2442    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2443    pub struct Rcvenm5_SPEC;
2444    pub type Rcvenm5 = crate::EnumBitfieldStruct<u8, Rcvenm5_SPEC>;
2445    impl Rcvenm5 {
2446        #[doc = "Disabled"]
2447        pub const _0: Self = Self::new(0);
2448
2449        #[doc = "Enabled"]
2450        pub const _1: Self = Self::new(1);
2451    }
2452    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2453    pub struct Rcvenm6_SPEC;
2454    pub type Rcvenm6 = crate::EnumBitfieldStruct<u8, Rcvenm6_SPEC>;
2455    impl Rcvenm6 {
2456        #[doc = "Disabled"]
2457        pub const _0: Self = Self::new(0);
2458
2459        #[doc = "Enabled"]
2460        pub const _1: Self = Self::new(1);
2461    }
2462    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2463    pub struct Rcvenm7_SPEC;
2464    pub type Rcvenm7 = crate::EnumBitfieldStruct<u8, Rcvenm7_SPEC>;
2465    impl Rcvenm7 {
2466        #[doc = "Disabled"]
2467        pub const _0: Self = Self::new(0);
2468
2469        #[doc = "Enabled"]
2470        pub const _1: Self = Self::new(1);
2471    }
2472}
2473#[doc(hidden)]
2474#[derive(Copy, Clone, Eq, PartialEq)]
2475pub struct Sdccr_SPEC;
2476impl crate::sealed::RegSpec for Sdccr_SPEC {
2477    type DataType = u8;
2478}
2479
2480#[doc = "SDC Control Register"]
2481pub type Sdccr = crate::RegValueT<Sdccr_SPEC>;
2482
2483impl Sdccr {
2484    #[doc = "Operation Enable"]
2485    #[inline(always)]
2486    pub fn exenb(
2487        self,
2488    ) -> crate::common::RegisterField<
2489        0,
2490        0x1,
2491        1,
2492        0,
2493        sdccr::Exenb,
2494        sdccr::Exenb,
2495        Sdccr_SPEC,
2496        crate::common::RW,
2497    > {
2498        crate::common::RegisterField::<
2499            0,
2500            0x1,
2501            1,
2502            0,
2503            sdccr::Exenb,
2504            sdccr::Exenb,
2505            Sdccr_SPEC,
2506            crate::common::RW,
2507        >::from_register(self, 0)
2508    }
2509
2510    #[doc = "SDRAM Bus Width Select"]
2511    #[inline(always)]
2512    pub fn bsize(
2513        self,
2514    ) -> crate::common::RegisterField<
2515        4,
2516        0x3,
2517        1,
2518        0,
2519        sdccr::Bsize,
2520        sdccr::Bsize,
2521        Sdccr_SPEC,
2522        crate::common::RW,
2523    > {
2524        crate::common::RegisterField::<
2525            4,
2526            0x3,
2527            1,
2528            0,
2529            sdccr::Bsize,
2530            sdccr::Bsize,
2531            Sdccr_SPEC,
2532            crate::common::RW,
2533        >::from_register(self, 0)
2534    }
2535}
2536impl ::core::default::Default for Sdccr {
2537    #[inline(always)]
2538    fn default() -> Sdccr {
2539        <crate::RegValueT<Sdccr_SPEC> as RegisterValue<_>>::new(0)
2540    }
2541}
2542pub mod sdccr {
2543
2544    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2545    pub struct Exenb_SPEC;
2546    pub type Exenb = crate::EnumBitfieldStruct<u8, Exenb_SPEC>;
2547    impl Exenb {
2548        #[doc = "Disable"]
2549        pub const _0: Self = Self::new(0);
2550
2551        #[doc = "Enable"]
2552        pub const _1: Self = Self::new(1);
2553    }
2554    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2555    pub struct Bsize_SPEC;
2556    pub type Bsize = crate::EnumBitfieldStruct<u8, Bsize_SPEC>;
2557    impl Bsize {
2558        #[doc = "16-bit bus space"]
2559        pub const _00: Self = Self::new(0);
2560
2561        #[doc = "8-bit bus space"]
2562        pub const _10: Self = Self::new(2);
2563
2564        #[doc = "Setting prohibited"]
2565        pub const OTHERS: Self = Self::new(0);
2566    }
2567}
2568#[doc(hidden)]
2569#[derive(Copy, Clone, Eq, PartialEq)]
2570pub struct Sdcmod_SPEC;
2571impl crate::sealed::RegSpec for Sdcmod_SPEC {
2572    type DataType = u8;
2573}
2574
2575#[doc = "SDC Mode Register"]
2576pub type Sdcmod = crate::RegValueT<Sdcmod_SPEC>;
2577
2578impl Sdcmod {
2579    #[doc = "Endian Mode"]
2580    #[inline(always)]
2581    pub fn emode(
2582        self,
2583    ) -> crate::common::RegisterField<
2584        0,
2585        0x1,
2586        1,
2587        0,
2588        sdcmod::Emode,
2589        sdcmod::Emode,
2590        Sdcmod_SPEC,
2591        crate::common::RW,
2592    > {
2593        crate::common::RegisterField::<
2594            0,
2595            0x1,
2596            1,
2597            0,
2598            sdcmod::Emode,
2599            sdcmod::Emode,
2600            Sdcmod_SPEC,
2601            crate::common::RW,
2602        >::from_register(self, 0)
2603    }
2604}
2605impl ::core::default::Default for Sdcmod {
2606    #[inline(always)]
2607    fn default() -> Sdcmod {
2608        <crate::RegValueT<Sdcmod_SPEC> as RegisterValue<_>>::new(0)
2609    }
2610}
2611pub mod sdcmod {
2612
2613    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2614    pub struct Emode_SPEC;
2615    pub type Emode = crate::EnumBitfieldStruct<u8, Emode_SPEC>;
2616    impl Emode {
2617        #[doc = "Endian order of SDRAM address space is the same as the endian order of the operating mode."]
2618        pub const _0: Self = Self::new(0);
2619
2620        #[doc = "Endian order of SDRAM address space is not the endian order of the operating mode."]
2621        pub const _1: Self = Self::new(1);
2622    }
2623}
2624#[doc(hidden)]
2625#[derive(Copy, Clone, Eq, PartialEq)]
2626pub struct Sdamod_SPEC;
2627impl crate::sealed::RegSpec for Sdamod_SPEC {
2628    type DataType = u8;
2629}
2630
2631#[doc = "SDRAM Access Mode Register"]
2632pub type Sdamod = crate::RegValueT<Sdamod_SPEC>;
2633
2634impl Sdamod {
2635    #[doc = "Continuous Access Enable"]
2636    #[inline(always)]
2637    pub fn be(
2638        self,
2639    ) -> crate::common::RegisterField<
2640        0,
2641        0x1,
2642        1,
2643        0,
2644        sdamod::Be,
2645        sdamod::Be,
2646        Sdamod_SPEC,
2647        crate::common::RW,
2648    > {
2649        crate::common::RegisterField::<
2650            0,
2651            0x1,
2652            1,
2653            0,
2654            sdamod::Be,
2655            sdamod::Be,
2656            Sdamod_SPEC,
2657            crate::common::RW,
2658        >::from_register(self, 0)
2659    }
2660}
2661impl ::core::default::Default for Sdamod {
2662    #[inline(always)]
2663    fn default() -> Sdamod {
2664        <crate::RegValueT<Sdamod_SPEC> as RegisterValue<_>>::new(0)
2665    }
2666}
2667pub mod sdamod {
2668
2669    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2670    pub struct Be_SPEC;
2671    pub type Be = crate::EnumBitfieldStruct<u8, Be_SPEC>;
2672    impl Be {
2673        #[doc = "Continuous access is disabled"]
2674        pub const _0: Self = Self::new(0);
2675
2676        #[doc = "Continuous access is enabled"]
2677        pub const _1: Self = Self::new(1);
2678    }
2679}
2680#[doc(hidden)]
2681#[derive(Copy, Clone, Eq, PartialEq)]
2682pub struct Sdself_SPEC;
2683impl crate::sealed::RegSpec for Sdself_SPEC {
2684    type DataType = u8;
2685}
2686
2687#[doc = "SDRAM Self-Refresh Control Register"]
2688pub type Sdself = crate::RegValueT<Sdself_SPEC>;
2689
2690impl Sdself {
2691    #[doc = "SDRAM Self-Refresh Enable"]
2692    #[inline(always)]
2693    pub fn sfen(
2694        self,
2695    ) -> crate::common::RegisterField<
2696        0,
2697        0x1,
2698        1,
2699        0,
2700        sdself::Sfen,
2701        sdself::Sfen,
2702        Sdself_SPEC,
2703        crate::common::RW,
2704    > {
2705        crate::common::RegisterField::<
2706            0,
2707            0x1,
2708            1,
2709            0,
2710            sdself::Sfen,
2711            sdself::Sfen,
2712            Sdself_SPEC,
2713            crate::common::RW,
2714        >::from_register(self, 0)
2715    }
2716}
2717impl ::core::default::Default for Sdself {
2718    #[inline(always)]
2719    fn default() -> Sdself {
2720        <crate::RegValueT<Sdself_SPEC> as RegisterValue<_>>::new(0)
2721    }
2722}
2723pub mod sdself {
2724
2725    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2726    pub struct Sfen_SPEC;
2727    pub type Sfen = crate::EnumBitfieldStruct<u8, Sfen_SPEC>;
2728    impl Sfen {
2729        #[doc = "Disable"]
2730        pub const _0: Self = Self::new(0);
2731
2732        #[doc = "Enable"]
2733        pub const _1: Self = Self::new(1);
2734    }
2735}
2736#[doc(hidden)]
2737#[derive(Copy, Clone, Eq, PartialEq)]
2738pub struct Sdrfcr_SPEC;
2739impl crate::sealed::RegSpec for Sdrfcr_SPEC {
2740    type DataType = u16;
2741}
2742
2743#[doc = "SDRAM Refresh Control Register"]
2744pub type Sdrfcr = crate::RegValueT<Sdrfcr_SPEC>;
2745
2746impl Sdrfcr {
2747    #[doc = "Auto-Refresh Request Interval Setting"]
2748    #[inline(always)]
2749    pub fn rfc(
2750        self,
2751    ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, Sdrfcr_SPEC, crate::common::RW>
2752    {
2753        crate::common::RegisterField::<0,0xfff,1,0,u16,u16,Sdrfcr_SPEC,crate::common::RW>::from_register(self,0)
2754    }
2755
2756    #[doc = "Auto-Refresh Cycle/Self-Refresh Clearing Cycle Count Setting"]
2757    #[inline(always)]
2758    pub fn refw(
2759        self,
2760    ) -> crate::common::RegisterField<12, 0xf, 1, 0, u8, u8, Sdrfcr_SPEC, crate::common::RW> {
2761        crate::common::RegisterField::<12,0xf,1,0,u8,u8,Sdrfcr_SPEC,crate::common::RW>::from_register(self,0)
2762    }
2763}
2764impl ::core::default::Default for Sdrfcr {
2765    #[inline(always)]
2766    fn default() -> Sdrfcr {
2767        <crate::RegValueT<Sdrfcr_SPEC> as RegisterValue<_>>::new(1)
2768    }
2769}
2770
2771#[doc(hidden)]
2772#[derive(Copy, Clone, Eq, PartialEq)]
2773pub struct Sdrfen_SPEC;
2774impl crate::sealed::RegSpec for Sdrfen_SPEC {
2775    type DataType = u8;
2776}
2777
2778#[doc = "SDRAM Auto-Refresh Control Register"]
2779pub type Sdrfen = crate::RegValueT<Sdrfen_SPEC>;
2780
2781impl Sdrfen {
2782    #[doc = "Auto-Refresh Operation Enable"]
2783    #[inline(always)]
2784    pub fn rfen(
2785        self,
2786    ) -> crate::common::RegisterField<
2787        0,
2788        0x1,
2789        1,
2790        0,
2791        sdrfen::Rfen,
2792        sdrfen::Rfen,
2793        Sdrfen_SPEC,
2794        crate::common::RW,
2795    > {
2796        crate::common::RegisterField::<
2797            0,
2798            0x1,
2799            1,
2800            0,
2801            sdrfen::Rfen,
2802            sdrfen::Rfen,
2803            Sdrfen_SPEC,
2804            crate::common::RW,
2805        >::from_register(self, 0)
2806    }
2807}
2808impl ::core::default::Default for Sdrfen {
2809    #[inline(always)]
2810    fn default() -> Sdrfen {
2811        <crate::RegValueT<Sdrfen_SPEC> as RegisterValue<_>>::new(0)
2812    }
2813}
2814pub mod sdrfen {
2815
2816    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2817    pub struct Rfen_SPEC;
2818    pub type Rfen = crate::EnumBitfieldStruct<u8, Rfen_SPEC>;
2819    impl Rfen {
2820        #[doc = "Disable"]
2821        pub const _0: Self = Self::new(0);
2822
2823        #[doc = "Enable"]
2824        pub const _1: Self = Self::new(1);
2825    }
2826}
2827#[doc(hidden)]
2828#[derive(Copy, Clone, Eq, PartialEq)]
2829pub struct Sdicr_SPEC;
2830impl crate::sealed::RegSpec for Sdicr_SPEC {
2831    type DataType = u8;
2832}
2833
2834#[doc = "SDRAM Initialization Sequence Control Register"]
2835pub type Sdicr = crate::RegValueT<Sdicr_SPEC>;
2836
2837impl Sdicr {
2838    #[doc = "Initialization Sequence Start"]
2839    #[inline(always)]
2840    pub fn inirq(
2841        self,
2842    ) -> crate::common::RegisterField<
2843        0,
2844        0x1,
2845        1,
2846        0,
2847        sdicr::Inirq,
2848        sdicr::Inirq,
2849        Sdicr_SPEC,
2850        crate::common::RW,
2851    > {
2852        crate::common::RegisterField::<
2853            0,
2854            0x1,
2855            1,
2856            0,
2857            sdicr::Inirq,
2858            sdicr::Inirq,
2859            Sdicr_SPEC,
2860            crate::common::RW,
2861        >::from_register(self, 0)
2862    }
2863}
2864impl ::core::default::Default for Sdicr {
2865    #[inline(always)]
2866    fn default() -> Sdicr {
2867        <crate::RegValueT<Sdicr_SPEC> as RegisterValue<_>>::new(0)
2868    }
2869}
2870pub mod sdicr {
2871
2872    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2873    pub struct Inirq_SPEC;
2874    pub type Inirq = crate::EnumBitfieldStruct<u8, Inirq_SPEC>;
2875    impl Inirq {
2876        #[doc = "Invalid"]
2877        pub const _0: Self = Self::new(0);
2878
2879        #[doc = "Start initialization sequence"]
2880        pub const _1: Self = Self::new(1);
2881    }
2882}
2883#[doc(hidden)]
2884#[derive(Copy, Clone, Eq, PartialEq)]
2885pub struct Sdir_SPEC;
2886impl crate::sealed::RegSpec for Sdir_SPEC {
2887    type DataType = u16;
2888}
2889
2890#[doc = "SDRAM Initialization Register"]
2891pub type Sdir = crate::RegValueT<Sdir_SPEC>;
2892
2893impl Sdir {
2894    #[doc = "Initialization Auto-Refresh Interval"]
2895    #[inline(always)]
2896    pub fn arfi(
2897        self,
2898    ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, Sdir_SPEC, crate::common::RW> {
2899        crate::common::RegisterField::<0,0xf,1,0,u8,u8,Sdir_SPEC,crate::common::RW>::from_register(self,0)
2900    }
2901
2902    #[doc = "Initialization Auto-Refresh Count"]
2903    #[inline(always)]
2904    pub fn arfc(
2905        self,
2906    ) -> crate::common::RegisterField<4, 0xf, 1, 0, u8, u8, Sdir_SPEC, crate::common::RW> {
2907        crate::common::RegisterField::<4,0xf,1,0,u8,u8,Sdir_SPEC,crate::common::RW>::from_register(self,0)
2908    }
2909
2910    #[doc = "Initialization Precharge Cycle Count"]
2911    #[inline(always)]
2912    pub fn prc(
2913        self,
2914    ) -> crate::common::RegisterField<8, 0x7, 1, 0, u8, u8, Sdir_SPEC, crate::common::RW> {
2915        crate::common::RegisterField::<8,0x7,1,0,u8,u8,Sdir_SPEC,crate::common::RW>::from_register(self,0)
2916    }
2917}
2918impl ::core::default::Default for Sdir {
2919    #[inline(always)]
2920    fn default() -> Sdir {
2921        <crate::RegValueT<Sdir_SPEC> as RegisterValue<_>>::new(16)
2922    }
2923}
2924
2925#[doc(hidden)]
2926#[derive(Copy, Clone, Eq, PartialEq)]
2927pub struct Sdadr_SPEC;
2928impl crate::sealed::RegSpec for Sdadr_SPEC {
2929    type DataType = u8;
2930}
2931
2932#[doc = "SDRAM Address Register"]
2933pub type Sdadr = crate::RegValueT<Sdadr_SPEC>;
2934
2935impl Sdadr {
2936    #[doc = "Address Multiplex Select"]
2937    #[inline(always)]
2938    pub fn mxc(
2939        self,
2940    ) -> crate::common::RegisterField<
2941        0,
2942        0x3,
2943        1,
2944        0,
2945        sdadr::Mxc,
2946        sdadr::Mxc,
2947        Sdadr_SPEC,
2948        crate::common::RW,
2949    > {
2950        crate::common::RegisterField::<
2951            0,
2952            0x3,
2953            1,
2954            0,
2955            sdadr::Mxc,
2956            sdadr::Mxc,
2957            Sdadr_SPEC,
2958            crate::common::RW,
2959        >::from_register(self, 0)
2960    }
2961}
2962impl ::core::default::Default for Sdadr {
2963    #[inline(always)]
2964    fn default() -> Sdadr {
2965        <crate::RegValueT<Sdadr_SPEC> as RegisterValue<_>>::new(0)
2966    }
2967}
2968pub mod sdadr {
2969
2970    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
2971    pub struct Mxc_SPEC;
2972    pub type Mxc = crate::EnumBitfieldStruct<u8, Mxc_SPEC>;
2973    impl Mxc {
2974        #[doc = "8-bit shift"]
2975        pub const _00: Self = Self::new(0);
2976
2977        #[doc = "9-bit shift"]
2978        pub const _01: Self = Self::new(1);
2979
2980        #[doc = "10-bit shift"]
2981        pub const _10: Self = Self::new(2);
2982
2983        #[doc = "11-bit shift"]
2984        pub const _11: Self = Self::new(3);
2985    }
2986}
2987#[doc(hidden)]
2988#[derive(Copy, Clone, Eq, PartialEq)]
2989pub struct Sdtr_SPEC;
2990impl crate::sealed::RegSpec for Sdtr_SPEC {
2991    type DataType = u32;
2992}
2993
2994#[doc = "SDRAM Timing Register"]
2995pub type Sdtr = crate::RegValueT<Sdtr_SPEC>;
2996
2997impl Sdtr {
2998    #[doc = "SDRAMC Column Latency"]
2999    #[inline(always)]
3000    pub fn cl(
3001        self,
3002    ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, Sdtr_SPEC, crate::common::RW> {
3003        crate::common::RegisterField::<0,0x7,1,0,u8,u8,Sdtr_SPEC,crate::common::RW>::from_register(self,0)
3004    }
3005
3006    #[doc = "Write Recovery Interval"]
3007    #[inline(always)]
3008    pub fn wr(
3009        self,
3010    ) -> crate::common::RegisterField<8, 0x1, 1, 0, sdtr::Wr, sdtr::Wr, Sdtr_SPEC, crate::common::RW>
3011    {
3012        crate::common::RegisterField::<8,0x1,1,0,sdtr::Wr,sdtr::Wr,Sdtr_SPEC,crate::common::RW>::from_register(self,0)
3013    }
3014
3015    #[doc = "Row Precharge Interval"]
3016    #[inline(always)]
3017    pub fn rp(
3018        self,
3019    ) -> crate::common::RegisterField<9, 0x7, 1, 0, u8, u8, Sdtr_SPEC, crate::common::RW> {
3020        crate::common::RegisterField::<9,0x7,1,0,u8,u8,Sdtr_SPEC,crate::common::RW>::from_register(self,0)
3021    }
3022
3023    #[doc = "Row Column Latency"]
3024    #[inline(always)]
3025    pub fn rcd(
3026        self,
3027    ) -> crate::common::RegisterField<
3028        12,
3029        0x3,
3030        1,
3031        0,
3032        sdtr::Rcd,
3033        sdtr::Rcd,
3034        Sdtr_SPEC,
3035        crate::common::RW,
3036    > {
3037        crate::common::RegisterField::<
3038            12,
3039            0x3,
3040            1,
3041            0,
3042            sdtr::Rcd,
3043            sdtr::Rcd,
3044            Sdtr_SPEC,
3045            crate::common::RW,
3046        >::from_register(self, 0)
3047    }
3048
3049    #[doc = "Row Active Interval"]
3050    #[inline(always)]
3051    pub fn rai(
3052        self,
3053    ) -> crate::common::RegisterField<16, 0x7, 1, 0, u8, u8, Sdtr_SPEC, crate::common::RW> {
3054        crate::common::RegisterField::<16,0x7,1,0,u8,u8,Sdtr_SPEC,crate::common::RW>::from_register(self,0)
3055    }
3056}
3057impl ::core::default::Default for Sdtr {
3058    #[inline(always)]
3059    fn default() -> Sdtr {
3060        <crate::RegValueT<Sdtr_SPEC> as RegisterValue<_>>::new(2)
3061    }
3062}
3063pub mod sdtr {
3064
3065    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3066    pub struct Wr_SPEC;
3067    pub type Wr = crate::EnumBitfieldStruct<u8, Wr_SPEC>;
3068    impl Wr {
3069        #[doc = "1 cycle"]
3070        pub const _0: Self = Self::new(0);
3071
3072        #[doc = "2 cycles"]
3073        pub const _1: Self = Self::new(1);
3074    }
3075    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3076    pub struct Rcd_SPEC;
3077    pub type Rcd = crate::EnumBitfieldStruct<u8, Rcd_SPEC>;
3078    impl Rcd {
3079        #[doc = "1 cycle"]
3080        pub const _00: Self = Self::new(0);
3081
3082        #[doc = "2 cycles"]
3083        pub const _01: Self = Self::new(1);
3084
3085        #[doc = "3 cycles"]
3086        pub const _10: Self = Self::new(2);
3087
3088        #[doc = "4 cycles"]
3089        pub const _11: Self = Self::new(3);
3090    }
3091}
3092#[doc(hidden)]
3093#[derive(Copy, Clone, Eq, PartialEq)]
3094pub struct Sdmod_SPEC;
3095impl crate::sealed::RegSpec for Sdmod_SPEC {
3096    type DataType = u16;
3097}
3098
3099#[doc = "SDRAM Mode Register"]
3100pub type Sdmod = crate::RegValueT<Sdmod_SPEC>;
3101
3102impl Sdmod {
3103    #[doc = "Mode Register Setting"]
3104    #[inline(always)]
3105    pub fn mr(
3106        self,
3107    ) -> crate::common::RegisterField<0, 0x7fff, 1, 0, u16, u16, Sdmod_SPEC, crate::common::RW>
3108    {
3109        crate::common::RegisterField::<0,0x7fff,1,0,u16,u16,Sdmod_SPEC,crate::common::RW>::from_register(self,0)
3110    }
3111}
3112impl ::core::default::Default for Sdmod {
3113    #[inline(always)]
3114    fn default() -> Sdmod {
3115        <crate::RegValueT<Sdmod_SPEC> as RegisterValue<_>>::new(0)
3116    }
3117}
3118
3119#[doc(hidden)]
3120#[derive(Copy, Clone, Eq, PartialEq)]
3121pub struct Sdsr_SPEC;
3122impl crate::sealed::RegSpec for Sdsr_SPEC {
3123    type DataType = u8;
3124}
3125
3126#[doc = "SDRAM Status Register"]
3127pub type Sdsr = crate::RegValueT<Sdsr_SPEC>;
3128
3129impl Sdsr {
3130    #[doc = "Mode Register Setting Status"]
3131    #[inline(always)]
3132    pub fn mrsst(
3133        self,
3134    ) -> crate::common::RegisterField<
3135        0,
3136        0x1,
3137        1,
3138        0,
3139        sdsr::Mrsst,
3140        sdsr::Mrsst,
3141        Sdsr_SPEC,
3142        crate::common::R,
3143    > {
3144        crate::common::RegisterField::<
3145            0,
3146            0x1,
3147            1,
3148            0,
3149            sdsr::Mrsst,
3150            sdsr::Mrsst,
3151            Sdsr_SPEC,
3152            crate::common::R,
3153        >::from_register(self, 0)
3154    }
3155
3156    #[doc = "Initialization Status"]
3157    #[inline(always)]
3158    pub fn inist(
3159        self,
3160    ) -> crate::common::RegisterField<
3161        3,
3162        0x1,
3163        1,
3164        0,
3165        sdsr::Inist,
3166        sdsr::Inist,
3167        Sdsr_SPEC,
3168        crate::common::R,
3169    > {
3170        crate::common::RegisterField::<
3171            3,
3172            0x1,
3173            1,
3174            0,
3175            sdsr::Inist,
3176            sdsr::Inist,
3177            Sdsr_SPEC,
3178            crate::common::R,
3179        >::from_register(self, 0)
3180    }
3181
3182    #[doc = "Self-Refresh Transition/Recovery Status"]
3183    #[inline(always)]
3184    pub fn srfst(
3185        self,
3186    ) -> crate::common::RegisterField<
3187        4,
3188        0x1,
3189        1,
3190        0,
3191        sdsr::Srfst,
3192        sdsr::Srfst,
3193        Sdsr_SPEC,
3194        crate::common::R,
3195    > {
3196        crate::common::RegisterField::<
3197            4,
3198            0x1,
3199            1,
3200            0,
3201            sdsr::Srfst,
3202            sdsr::Srfst,
3203            Sdsr_SPEC,
3204            crate::common::R,
3205        >::from_register(self, 0)
3206    }
3207}
3208impl ::core::default::Default for Sdsr {
3209    #[inline(always)]
3210    fn default() -> Sdsr {
3211        <crate::RegValueT<Sdsr_SPEC> as RegisterValue<_>>::new(0)
3212    }
3213}
3214pub mod sdsr {
3215
3216    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3217    pub struct Mrsst_SPEC;
3218    pub type Mrsst = crate::EnumBitfieldStruct<u8, Mrsst_SPEC>;
3219    impl Mrsst {
3220        #[doc = "Mode register setting not in progress"]
3221        pub const _0: Self = Self::new(0);
3222
3223        #[doc = "Mode register setting in progress"]
3224        pub const _1: Self = Self::new(1);
3225    }
3226    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3227    pub struct Inist_SPEC;
3228    pub type Inist = crate::EnumBitfieldStruct<u8, Inist_SPEC>;
3229    impl Inist {
3230        #[doc = "Initialization sequence not in progress"]
3231        pub const _0: Self = Self::new(0);
3232
3233        #[doc = "Initialization sequence in progress"]
3234        pub const _1: Self = Self::new(1);
3235    }
3236    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3237    pub struct Srfst_SPEC;
3238    pub type Srfst = crate::EnumBitfieldStruct<u8, Srfst_SPEC>;
3239    impl Srfst {
3240        #[doc = "Transition/recovery not in progress"]
3241        pub const _0: Self = Self::new(0);
3242
3243        #[doc = "Transition/recovery in progress"]
3244        pub const _1: Self = Self::new(1);
3245    }
3246}
3247#[doc(hidden)]
3248#[derive(Copy, Clone, Eq, PartialEq)]
3249pub struct Busoad_SPEC;
3250impl crate::sealed::RegSpec for Busoad_SPEC {
3251    type DataType = u16;
3252}
3253
3254#[doc = "BUS Operation After Detection Register"]
3255pub type Busoad = crate::RegValueT<Busoad_SPEC>;
3256
3257impl Busoad {
3258    #[doc = "Illegal address access error operation after detection"]
3259    #[inline(always)]
3260    pub fn ilerroad(
3261        self,
3262    ) -> crate::common::RegisterFieldBool<0, 1, 0, Busoad_SPEC, crate::common::RW> {
3263        crate::common::RegisterFieldBool::<0, 1, 0, Busoad_SPEC, crate::common::RW>::from_register(
3264            self, 0,
3265        )
3266    }
3267
3268    #[doc = "Slave bus error operation after detection"]
3269    #[inline(always)]
3270    pub fn slerroad(
3271        self,
3272    ) -> crate::common::RegisterFieldBool<1, 1, 0, Busoad_SPEC, crate::common::RW> {
3273        crate::common::RegisterFieldBool::<1, 1, 0, Busoad_SPEC, crate::common::RW>::from_register(
3274            self, 0,
3275        )
3276    }
3277
3278    #[doc = "Bufferable write error operation after detection"]
3279    #[inline(always)]
3280    pub fn bwerroad(
3281        self,
3282    ) -> crate::common::RegisterFieldBool<2, 1, 0, Busoad_SPEC, crate::common::RW> {
3283        crate::common::RegisterFieldBool::<2, 1, 0, Busoad_SPEC, crate::common::RW>::from_register(
3284            self, 0,
3285        )
3286    }
3287}
3288impl ::core::default::Default for Busoad {
3289    #[inline(always)]
3290    fn default() -> Busoad {
3291        <crate::RegValueT<Busoad_SPEC> as RegisterValue<_>>::new(0)
3292    }
3293}
3294
3295#[doc(hidden)]
3296#[derive(Copy, Clone, Eq, PartialEq)]
3297pub struct Busoadpt_SPEC;
3298impl crate::sealed::RegSpec for Busoadpt_SPEC {
3299    type DataType = u16;
3300}
3301
3302#[doc = "BUS Operation After Detection Protect Register"]
3303pub type Busoadpt = crate::RegValueT<Busoadpt_SPEC>;
3304
3305impl Busoadpt {
3306    #[doc = "Protection of register"]
3307    #[inline(always)]
3308    pub fn protect(
3309        self,
3310    ) -> crate::common::RegisterField<
3311        0,
3312        0x1,
3313        1,
3314        0,
3315        busoadpt::Protect,
3316        busoadpt::Protect,
3317        Busoadpt_SPEC,
3318        crate::common::RW,
3319    > {
3320        crate::common::RegisterField::<
3321            0,
3322            0x1,
3323            1,
3324            0,
3325            busoadpt::Protect,
3326            busoadpt::Protect,
3327            Busoadpt_SPEC,
3328            crate::common::RW,
3329        >::from_register(self, 0)
3330    }
3331
3332    #[doc = "Key code"]
3333    #[inline(always)]
3334    pub fn key(
3335        self,
3336    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Busoadpt_SPEC, crate::common::W> {
3337        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Busoadpt_SPEC,crate::common::W>::from_register(self,0)
3338    }
3339}
3340impl ::core::default::Default for Busoadpt {
3341    #[inline(always)]
3342    fn default() -> Busoadpt {
3343        <crate::RegValueT<Busoadpt_SPEC> as RegisterValue<_>>::new(0)
3344    }
3345}
3346pub mod busoadpt {
3347
3348    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3349    pub struct Protect_SPEC;
3350    pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
3351    impl Protect {
3352        #[doc = "BUSOAD register writing is possible."]
3353        pub const _0: Self = Self::new(0);
3354
3355        #[doc = "BUSOAD register writing is protected. Read is possible."]
3356        pub const _1: Self = Self::new(1);
3357    }
3358}
3359#[doc(hidden)]
3360#[derive(Copy, Clone, Eq, PartialEq)]
3361pub struct Msaoad_SPEC;
3362impl crate::sealed::RegSpec for Msaoad_SPEC {
3363    type DataType = u16;
3364}
3365
3366#[doc = "Master Security Attribution Operation After Detection Register"]
3367pub type Msaoad = crate::RegValueT<Msaoad_SPEC>;
3368
3369impl Msaoad {
3370    #[doc = "Operation after detection"]
3371    #[inline(always)]
3372    pub fn oad(
3373        self,
3374    ) -> crate::common::RegisterField<
3375        0,
3376        0x1,
3377        1,
3378        0,
3379        msaoad::Oad,
3380        msaoad::Oad,
3381        Msaoad_SPEC,
3382        crate::common::RW,
3383    > {
3384        crate::common::RegisterField::<
3385            0,
3386            0x1,
3387            1,
3388            0,
3389            msaoad::Oad,
3390            msaoad::Oad,
3391            Msaoad_SPEC,
3392            crate::common::RW,
3393        >::from_register(self, 0)
3394    }
3395
3396    #[doc = "Key Code"]
3397    #[inline(always)]
3398    pub fn key(
3399        self,
3400    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Msaoad_SPEC, crate::common::W> {
3401        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Msaoad_SPEC,crate::common::W>::from_register(self,0)
3402    }
3403}
3404impl ::core::default::Default for Msaoad {
3405    #[inline(always)]
3406    fn default() -> Msaoad {
3407        <crate::RegValueT<Msaoad_SPEC> as RegisterValue<_>>::new(0)
3408    }
3409}
3410pub mod msaoad {
3411
3412    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3413    pub struct Oad_SPEC;
3414    pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
3415    impl Oad {
3416        #[doc = "NMI"]
3417        pub const _0: Self = Self::new(0);
3418
3419        #[doc = "Reset"]
3420        pub const _1: Self = Self::new(1);
3421    }
3422}
3423#[doc(hidden)]
3424#[derive(Copy, Clone, Eq, PartialEq)]
3425pub struct Msapt_SPEC;
3426impl crate::sealed::RegSpec for Msapt_SPEC {
3427    type DataType = u16;
3428}
3429
3430#[doc = "Master Security Attribution Protect Register"]
3431pub type Msapt = crate::RegValueT<Msapt_SPEC>;
3432
3433impl Msapt {
3434    #[doc = "Protection of register"]
3435    #[inline(always)]
3436    pub fn protect(
3437        self,
3438    ) -> crate::common::RegisterField<
3439        0,
3440        0x1,
3441        1,
3442        0,
3443        msapt::Protect,
3444        msapt::Protect,
3445        Msapt_SPEC,
3446        crate::common::RW,
3447    > {
3448        crate::common::RegisterField::<
3449            0,
3450            0x1,
3451            1,
3452            0,
3453            msapt::Protect,
3454            msapt::Protect,
3455            Msapt_SPEC,
3456            crate::common::RW,
3457        >::from_register(self, 0)
3458    }
3459
3460    #[doc = "Key Code"]
3461    #[inline(always)]
3462    pub fn key(
3463        self,
3464    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Msapt_SPEC, crate::common::W> {
3465        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Msapt_SPEC,crate::common::W>::from_register(self,0)
3466    }
3467}
3468impl ::core::default::Default for Msapt {
3469    #[inline(always)]
3470    fn default() -> Msapt {
3471        <crate::RegValueT<Msapt_SPEC> as RegisterValue<_>>::new(0)
3472    }
3473}
3474pub mod msapt {
3475
3476    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3477    pub struct Protect_SPEC;
3478    pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
3479    impl Protect {
3480        #[doc = "MSAOAD register writing is possible."]
3481        pub const _0: Self = Self::new(0);
3482
3483        #[doc = "MSAOAD register writing is protected. Read is possible."]
3484        pub const _1: Self = Self::new(1);
3485    }
3486}
3487#[doc(hidden)]
3488#[derive(Copy, Clone, Eq, PartialEq)]
3489pub struct Busmabt_SPEC;
3490impl crate::sealed::RegSpec for Busmabt_SPEC {
3491    type DataType = u32;
3492}
3493
3494#[doc = "Bus Master Arbitration Control Register"]
3495pub type Busmabt = crate::RegValueT<Busmabt_SPEC>;
3496
3497impl Busmabt {
3498    #[doc = "Arbitration Select for GDSSBI"]
3499    #[inline(always)]
3500    pub fn arbs(
3501        self,
3502    ) -> crate::common::RegisterField<
3503        0,
3504        0x1,
3505        1,
3506        0,
3507        busmabt::Arbs,
3508        busmabt::Arbs,
3509        Busmabt_SPEC,
3510        crate::common::RW,
3511    > {
3512        crate::common::RegisterField::<
3513            0,
3514            0x1,
3515            1,
3516            0,
3517            busmabt::Arbs,
3518            busmabt::Arbs,
3519            Busmabt_SPEC,
3520            crate::common::RW,
3521        >::from_register(self, 0)
3522    }
3523}
3524impl ::core::default::Default for Busmabt {
3525    #[inline(always)]
3526    fn default() -> Busmabt {
3527        <crate::RegValueT<Busmabt_SPEC> as RegisterValue<_>>::new(0)
3528    }
3529}
3530pub mod busmabt {
3531
3532    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3533    pub struct Arbs_SPEC;
3534    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
3535    impl Arbs {
3536        #[doc = "Fixed priority"]
3537        pub const _0: Self = Self::new(0);
3538
3539        #[doc = "Round-robin"]
3540        pub const _1: Self = Self::new(1);
3541    }
3542}
3543#[doc(hidden)]
3544#[derive(Copy, Clone, Eq, PartialEq)]
3545pub struct Bussabt1Fhbi_SPEC;
3546impl crate::sealed::RegSpec for Bussabt1Fhbi_SPEC {
3547    type DataType = u32;
3548}
3549
3550#[doc = "Bus Slave Arbitration Control Register 1(x = FHBI, S0BI, S1BI)"]
3551pub type Bussabt1Fhbi = crate::RegValueT<Bussabt1Fhbi_SPEC>;
3552
3553impl Bussabt1Fhbi {
3554    #[doc = "Arbitration Select for <slave>"]
3555    #[inline(always)]
3556    pub fn arbs(
3557        self,
3558    ) -> crate::common::RegisterField<
3559        0,
3560        0x3,
3561        1,
3562        0,
3563        bussabt1fhbi::Arbs,
3564        bussabt1fhbi::Arbs,
3565        Bussabt1Fhbi_SPEC,
3566        crate::common::RW,
3567    > {
3568        crate::common::RegisterField::<
3569            0,
3570            0x3,
3571            1,
3572            0,
3573            bussabt1fhbi::Arbs,
3574            bussabt1fhbi::Arbs,
3575            Bussabt1Fhbi_SPEC,
3576            crate::common::RW,
3577        >::from_register(self, 0)
3578    }
3579}
3580impl ::core::default::Default for Bussabt1Fhbi {
3581    #[inline(always)]
3582    fn default() -> Bussabt1Fhbi {
3583        <crate::RegValueT<Bussabt1Fhbi_SPEC> as RegisterValue<_>>::new(0)
3584    }
3585}
3586pub mod bussabt1fhbi {
3587
3588    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3589    pub struct Arbs_SPEC;
3590    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
3591    impl Arbs {
3592        #[doc = "Fixed priority"]
3593        pub const _00: Self = Self::new(0);
3594
3595        #[doc = "Setting prohibited"]
3596        pub const _01: Self = Self::new(1);
3597
3598        #[doc = "Combination of round-robin and fixed priority"]
3599        pub const _10: Self = Self::new(2);
3600
3601        #[doc = "Round-robin"]
3602        pub const _11: Self = Self::new(3);
3603    }
3604}
3605#[doc(hidden)]
3606#[derive(Copy, Clone, Eq, PartialEq)]
3607pub struct Bussabt0Flbi_SPEC;
3608impl crate::sealed::RegSpec for Bussabt0Flbi_SPEC {
3609    type DataType = u32;
3610}
3611
3612#[doc = "Bus Slave Arbitration Control Register 0"]
3613pub type Bussabt0Flbi = crate::RegValueT<Bussabt0Flbi_SPEC>;
3614
3615impl Bussabt0Flbi {
3616    #[doc = "Arbitration Select for <slave>"]
3617    #[inline(always)]
3618    pub fn arbs(
3619        self,
3620    ) -> crate::common::RegisterField<
3621        0,
3622        0x1,
3623        1,
3624        0,
3625        bussabt0flbi::Arbs,
3626        bussabt0flbi::Arbs,
3627        Bussabt0Flbi_SPEC,
3628        crate::common::RW,
3629    > {
3630        crate::common::RegisterField::<
3631            0,
3632            0x1,
3633            1,
3634            0,
3635            bussabt0flbi::Arbs,
3636            bussabt0flbi::Arbs,
3637            Bussabt0Flbi_SPEC,
3638            crate::common::RW,
3639        >::from_register(self, 0)
3640    }
3641}
3642impl ::core::default::Default for Bussabt0Flbi {
3643    #[inline(always)]
3644    fn default() -> Bussabt0Flbi {
3645        <crate::RegValueT<Bussabt0Flbi_SPEC> as RegisterValue<_>>::new(0)
3646    }
3647}
3648pub mod bussabt0flbi {
3649
3650    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3651    pub struct Arbs_SPEC;
3652    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
3653    impl Arbs {
3654        #[doc = "Fixed priority"]
3655        pub const _0: Self = Self::new(0);
3656
3657        #[doc = "Round-robin"]
3658        pub const _1: Self = Self::new(1);
3659    }
3660}
3661#[doc(hidden)]
3662#[derive(Copy, Clone, Eq, PartialEq)]
3663pub struct Bussabt1S0Bi_SPEC;
3664impl crate::sealed::RegSpec for Bussabt1S0Bi_SPEC {
3665    type DataType = u32;
3666}
3667
3668#[doc = "Bus Slave Arbitration Control Register 1(x = FHBI, S0BI, S1BI)"]
3669pub type Bussabt1S0Bi = crate::RegValueT<Bussabt1S0Bi_SPEC>;
3670
3671impl Bussabt1S0Bi {
3672    #[doc = "Arbitration Select for <slave>"]
3673    #[inline(always)]
3674    pub fn arbs(
3675        self,
3676    ) -> crate::common::RegisterField<
3677        0,
3678        0x3,
3679        1,
3680        0,
3681        bussabt1s0bi::Arbs,
3682        bussabt1s0bi::Arbs,
3683        Bussabt1S0Bi_SPEC,
3684        crate::common::RW,
3685    > {
3686        crate::common::RegisterField::<
3687            0,
3688            0x3,
3689            1,
3690            0,
3691            bussabt1s0bi::Arbs,
3692            bussabt1s0bi::Arbs,
3693            Bussabt1S0Bi_SPEC,
3694            crate::common::RW,
3695        >::from_register(self, 0)
3696    }
3697}
3698impl ::core::default::Default for Bussabt1S0Bi {
3699    #[inline(always)]
3700    fn default() -> Bussabt1S0Bi {
3701        <crate::RegValueT<Bussabt1S0Bi_SPEC> as RegisterValue<_>>::new(0)
3702    }
3703}
3704pub mod bussabt1s0bi {
3705
3706    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3707    pub struct Arbs_SPEC;
3708    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
3709    impl Arbs {
3710        #[doc = "Fixed priority"]
3711        pub const _00: Self = Self::new(0);
3712
3713        #[doc = "Setting prohibited"]
3714        pub const _01: Self = Self::new(1);
3715
3716        #[doc = "Combination of round-robin and fixed priority"]
3717        pub const _10: Self = Self::new(2);
3718
3719        #[doc = "Round-robin"]
3720        pub const _11: Self = Self::new(3);
3721    }
3722}
3723#[doc(hidden)]
3724#[derive(Copy, Clone, Eq, PartialEq)]
3725pub struct Bussabt1S1Bi_SPEC;
3726impl crate::sealed::RegSpec for Bussabt1S1Bi_SPEC {
3727    type DataType = u32;
3728}
3729
3730#[doc = "Bus Slave Arbitration Control Register 1(x = FHBI, S0BI, S1BI)"]
3731pub type Bussabt1S1Bi = crate::RegValueT<Bussabt1S1Bi_SPEC>;
3732
3733impl Bussabt1S1Bi {
3734    #[doc = "Arbitration Select for <slave>"]
3735    #[inline(always)]
3736    pub fn arbs(
3737        self,
3738    ) -> crate::common::RegisterField<
3739        0,
3740        0x3,
3741        1,
3742        0,
3743        bussabt1s1bi::Arbs,
3744        bussabt1s1bi::Arbs,
3745        Bussabt1S1Bi_SPEC,
3746        crate::common::RW,
3747    > {
3748        crate::common::RegisterField::<
3749            0,
3750            0x3,
3751            1,
3752            0,
3753            bussabt1s1bi::Arbs,
3754            bussabt1s1bi::Arbs,
3755            Bussabt1S1Bi_SPEC,
3756            crate::common::RW,
3757        >::from_register(self, 0)
3758    }
3759}
3760impl ::core::default::Default for Bussabt1S1Bi {
3761    #[inline(always)]
3762    fn default() -> Bussabt1S1Bi {
3763        <crate::RegValueT<Bussabt1S1Bi_SPEC> as RegisterValue<_>>::new(0)
3764    }
3765}
3766pub mod bussabt1s1bi {
3767
3768    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3769    pub struct Arbs_SPEC;
3770    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
3771    impl Arbs {
3772        #[doc = "Fixed priority"]
3773        pub const _00: Self = Self::new(0);
3774
3775        #[doc = "Setting prohibited"]
3776        pub const _01: Self = Self::new(1);
3777
3778        #[doc = "Combination of round-robin and fixed priority"]
3779        pub const _10: Self = Self::new(2);
3780
3781        #[doc = "Round-robin"]
3782        pub const _11: Self = Self::new(3);
3783    }
3784}
3785#[doc(hidden)]
3786#[derive(Copy, Clone, Eq, PartialEq)]
3787pub struct Bussabt0Stbysbi_SPEC;
3788impl crate::sealed::RegSpec for Bussabt0Stbysbi_SPEC {
3789    type DataType = u32;
3790}
3791
3792#[doc = "Bus Slave Arbitration Control Register 0"]
3793pub type Bussabt0Stbysbi = crate::RegValueT<Bussabt0Stbysbi_SPEC>;
3794
3795impl Bussabt0Stbysbi {
3796    #[doc = "Arbitration Select for <slave>"]
3797    #[inline(always)]
3798    pub fn arbs(
3799        self,
3800    ) -> crate::common::RegisterField<
3801        0,
3802        0x1,
3803        1,
3804        0,
3805        bussabt0stbysbi::Arbs,
3806        bussabt0stbysbi::Arbs,
3807        Bussabt0Stbysbi_SPEC,
3808        crate::common::RW,
3809    > {
3810        crate::common::RegisterField::<
3811            0,
3812            0x1,
3813            1,
3814            0,
3815            bussabt0stbysbi::Arbs,
3816            bussabt0stbysbi::Arbs,
3817            Bussabt0Stbysbi_SPEC,
3818            crate::common::RW,
3819        >::from_register(self, 0)
3820    }
3821}
3822impl ::core::default::Default for Bussabt0Stbysbi {
3823    #[inline(always)]
3824    fn default() -> Bussabt0Stbysbi {
3825        <crate::RegValueT<Bussabt0Stbysbi_SPEC> as RegisterValue<_>>::new(0)
3826    }
3827}
3828pub mod bussabt0stbysbi {
3829
3830    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3831    pub struct Arbs_SPEC;
3832    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
3833    impl Arbs {
3834        #[doc = "Fixed priority"]
3835        pub const _0: Self = Self::new(0);
3836
3837        #[doc = "Round-robin"]
3838        pub const _1: Self = Self::new(1);
3839    }
3840}
3841#[doc(hidden)]
3842#[derive(Copy, Clone, Eq, PartialEq)]
3843pub struct Bussabt0Ecbi_SPEC;
3844impl crate::sealed::RegSpec for Bussabt0Ecbi_SPEC {
3845    type DataType = u32;
3846}
3847
3848#[doc = "Bus Slave Arbitration Control Register 0"]
3849pub type Bussabt0Ecbi = crate::RegValueT<Bussabt0Ecbi_SPEC>;
3850
3851impl Bussabt0Ecbi {
3852    #[doc = "Arbitration Select for <slave>"]
3853    #[inline(always)]
3854    pub fn arbs(
3855        self,
3856    ) -> crate::common::RegisterField<
3857        0,
3858        0x1,
3859        1,
3860        0,
3861        bussabt0ecbi::Arbs,
3862        bussabt0ecbi::Arbs,
3863        Bussabt0Ecbi_SPEC,
3864        crate::common::RW,
3865    > {
3866        crate::common::RegisterField::<
3867            0,
3868            0x1,
3869            1,
3870            0,
3871            bussabt0ecbi::Arbs,
3872            bussabt0ecbi::Arbs,
3873            Bussabt0Ecbi_SPEC,
3874            crate::common::RW,
3875        >::from_register(self, 0)
3876    }
3877}
3878impl ::core::default::Default for Bussabt0Ecbi {
3879    #[inline(always)]
3880    fn default() -> Bussabt0Ecbi {
3881        <crate::RegValueT<Bussabt0Ecbi_SPEC> as RegisterValue<_>>::new(0)
3882    }
3883}
3884pub mod bussabt0ecbi {
3885
3886    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3887    pub struct Arbs_SPEC;
3888    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
3889    impl Arbs {
3890        #[doc = "Fixed priority"]
3891        pub const _0: Self = Self::new(0);
3892
3893        #[doc = "Round-robin"]
3894        pub const _1: Self = Self::new(1);
3895    }
3896}
3897#[doc(hidden)]
3898#[derive(Copy, Clone, Eq, PartialEq)]
3899pub struct Bussabt0Eobi_SPEC;
3900impl crate::sealed::RegSpec for Bussabt0Eobi_SPEC {
3901    type DataType = u32;
3902}
3903
3904#[doc = "Bus Slave Arbitration Control Register 0"]
3905pub type Bussabt0Eobi = crate::RegValueT<Bussabt0Eobi_SPEC>;
3906
3907impl Bussabt0Eobi {
3908    #[doc = "Arbitration Select for <slave>"]
3909    #[inline(always)]
3910    pub fn arbs(
3911        self,
3912    ) -> crate::common::RegisterField<
3913        0,
3914        0x1,
3915        1,
3916        0,
3917        bussabt0eobi::Arbs,
3918        bussabt0eobi::Arbs,
3919        Bussabt0Eobi_SPEC,
3920        crate::common::RW,
3921    > {
3922        crate::common::RegisterField::<
3923            0,
3924            0x1,
3925            1,
3926            0,
3927            bussabt0eobi::Arbs,
3928            bussabt0eobi::Arbs,
3929            Bussabt0Eobi_SPEC,
3930            crate::common::RW,
3931        >::from_register(self, 0)
3932    }
3933}
3934impl ::core::default::Default for Bussabt0Eobi {
3935    #[inline(always)]
3936    fn default() -> Bussabt0Eobi {
3937        <crate::RegValueT<Bussabt0Eobi_SPEC> as RegisterValue<_>>::new(0)
3938    }
3939}
3940pub mod bussabt0eobi {
3941
3942    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3943    pub struct Arbs_SPEC;
3944    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
3945    impl Arbs {
3946        #[doc = "Fixed priority"]
3947        pub const _0: Self = Self::new(0);
3948
3949        #[doc = "Round-robin"]
3950        pub const _1: Self = Self::new(1);
3951    }
3952}
3953#[doc(hidden)]
3954#[derive(Copy, Clone, Eq, PartialEq)]
3955pub struct Bussabt0Pbbi_SPEC;
3956impl crate::sealed::RegSpec for Bussabt0Pbbi_SPEC {
3957    type DataType = u32;
3958}
3959
3960#[doc = "Bus Slave Arbitration Control Register 0"]
3961pub type Bussabt0Pbbi = crate::RegValueT<Bussabt0Pbbi_SPEC>;
3962
3963impl Bussabt0Pbbi {
3964    #[doc = "Arbitration Select for <slave>"]
3965    #[inline(always)]
3966    pub fn arbs(
3967        self,
3968    ) -> crate::common::RegisterField<
3969        0,
3970        0x1,
3971        1,
3972        0,
3973        bussabt0pbbi::Arbs,
3974        bussabt0pbbi::Arbs,
3975        Bussabt0Pbbi_SPEC,
3976        crate::common::RW,
3977    > {
3978        crate::common::RegisterField::<
3979            0,
3980            0x1,
3981            1,
3982            0,
3983            bussabt0pbbi::Arbs,
3984            bussabt0pbbi::Arbs,
3985            Bussabt0Pbbi_SPEC,
3986            crate::common::RW,
3987        >::from_register(self, 0)
3988    }
3989}
3990impl ::core::default::Default for Bussabt0Pbbi {
3991    #[inline(always)]
3992    fn default() -> Bussabt0Pbbi {
3993        <crate::RegValueT<Bussabt0Pbbi_SPEC> as RegisterValue<_>>::new(0)
3994    }
3995}
3996pub mod bussabt0pbbi {
3997
3998    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
3999    pub struct Arbs_SPEC;
4000    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
4001    impl Arbs {
4002        #[doc = "Fixed priority"]
4003        pub const _0: Self = Self::new(0);
4004
4005        #[doc = "Round-robin"]
4006        pub const _1: Self = Self::new(1);
4007    }
4008}
4009#[doc(hidden)]
4010#[derive(Copy, Clone, Eq, PartialEq)]
4011pub struct Bussabt0Pabi_SPEC;
4012impl crate::sealed::RegSpec for Bussabt0Pabi_SPEC {
4013    type DataType = u32;
4014}
4015
4016#[doc = "Bus Slave Arbitration Control Register 0"]
4017pub type Bussabt0Pabi = crate::RegValueT<Bussabt0Pabi_SPEC>;
4018
4019impl Bussabt0Pabi {
4020    #[doc = "Arbitration Select for <slave>"]
4021    #[inline(always)]
4022    pub fn arbs(
4023        self,
4024    ) -> crate::common::RegisterField<
4025        0,
4026        0x1,
4027        1,
4028        0,
4029        bussabt0pabi::Arbs,
4030        bussabt0pabi::Arbs,
4031        Bussabt0Pabi_SPEC,
4032        crate::common::RW,
4033    > {
4034        crate::common::RegisterField::<
4035            0,
4036            0x1,
4037            1,
4038            0,
4039            bussabt0pabi::Arbs,
4040            bussabt0pabi::Arbs,
4041            Bussabt0Pabi_SPEC,
4042            crate::common::RW,
4043        >::from_register(self, 0)
4044    }
4045}
4046impl ::core::default::Default for Bussabt0Pabi {
4047    #[inline(always)]
4048    fn default() -> Bussabt0Pabi {
4049        <crate::RegValueT<Bussabt0Pabi_SPEC> as RegisterValue<_>>::new(0)
4050    }
4051}
4052pub mod bussabt0pabi {
4053
4054    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4055    pub struct Arbs_SPEC;
4056    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
4057    impl Arbs {
4058        #[doc = "Fixed priority"]
4059        pub const _0: Self = Self::new(0);
4060
4061        #[doc = "Round-robin"]
4062        pub const _1: Self = Self::new(1);
4063    }
4064}
4065#[doc(hidden)]
4066#[derive(Copy, Clone, Eq, PartialEq)]
4067pub struct Bussabt0Pibi_SPEC;
4068impl crate::sealed::RegSpec for Bussabt0Pibi_SPEC {
4069    type DataType = u32;
4070}
4071
4072#[doc = "Bus Slave Arbitration Control Register 0"]
4073pub type Bussabt0Pibi = crate::RegValueT<Bussabt0Pibi_SPEC>;
4074
4075impl Bussabt0Pibi {
4076    #[doc = "Arbitration Select for <slave>"]
4077    #[inline(always)]
4078    pub fn arbs(
4079        self,
4080    ) -> crate::common::RegisterField<
4081        0,
4082        0x1,
4083        1,
4084        0,
4085        bussabt0pibi::Arbs,
4086        bussabt0pibi::Arbs,
4087        Bussabt0Pibi_SPEC,
4088        crate::common::RW,
4089    > {
4090        crate::common::RegisterField::<
4091            0,
4092            0x1,
4093            1,
4094            0,
4095            bussabt0pibi::Arbs,
4096            bussabt0pibi::Arbs,
4097            Bussabt0Pibi_SPEC,
4098            crate::common::RW,
4099        >::from_register(self, 0)
4100    }
4101}
4102impl ::core::default::Default for Bussabt0Pibi {
4103    #[inline(always)]
4104    fn default() -> Bussabt0Pibi {
4105        <crate::RegValueT<Bussabt0Pibi_SPEC> as RegisterValue<_>>::new(0)
4106    }
4107}
4108pub mod bussabt0pibi {
4109
4110    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4111    pub struct Arbs_SPEC;
4112    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
4113    impl Arbs {
4114        #[doc = "Fixed priority"]
4115        pub const _0: Self = Self::new(0);
4116
4117        #[doc = "Round-robin"]
4118        pub const _1: Self = Self::new(1);
4119    }
4120}
4121#[doc(hidden)]
4122#[derive(Copy, Clone, Eq, PartialEq)]
4123pub struct Bussabt0Psbi_SPEC;
4124impl crate::sealed::RegSpec for Bussabt0Psbi_SPEC {
4125    type DataType = u32;
4126}
4127
4128#[doc = "Bus Slave Arbitration Control Register 0"]
4129pub type Bussabt0Psbi = crate::RegValueT<Bussabt0Psbi_SPEC>;
4130
4131impl Bussabt0Psbi {
4132    #[doc = "Arbitration Select for <slave>"]
4133    #[inline(always)]
4134    pub fn arbs(
4135        self,
4136    ) -> crate::common::RegisterField<
4137        0,
4138        0x1,
4139        1,
4140        0,
4141        bussabt0psbi::Arbs,
4142        bussabt0psbi::Arbs,
4143        Bussabt0Psbi_SPEC,
4144        crate::common::RW,
4145    > {
4146        crate::common::RegisterField::<
4147            0,
4148            0x1,
4149            1,
4150            0,
4151            bussabt0psbi::Arbs,
4152            bussabt0psbi::Arbs,
4153            Bussabt0Psbi_SPEC,
4154            crate::common::RW,
4155        >::from_register(self, 0)
4156    }
4157}
4158impl ::core::default::Default for Bussabt0Psbi {
4159    #[inline(always)]
4160    fn default() -> Bussabt0Psbi {
4161        <crate::RegValueT<Bussabt0Psbi_SPEC> as RegisterValue<_>>::new(0)
4162    }
4163}
4164pub mod bussabt0psbi {
4165
4166    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4167    pub struct Arbs_SPEC;
4168    pub type Arbs = crate::EnumBitfieldStruct<u8, Arbs_SPEC>;
4169    impl Arbs {
4170        #[doc = "Fixed priority"]
4171        pub const _0: Self = Self::new(0);
4172
4173        #[doc = "Round-robin"]
4174        pub const _1: Self = Self::new(1);
4175    }
4176}
4177#[doc(hidden)]
4178#[derive(Copy, Clone, Eq, PartialEq)]
4179pub struct Busdivbyp_SPEC;
4180impl crate::sealed::RegSpec for Busdivbyp_SPEC {
4181    type DataType = u32;
4182}
4183
4184#[doc = "Bus Divider Bypass Register"]
4185pub type Busdivbyp = crate::RegValueT<Busdivbyp_SPEC>;
4186
4187impl Busdivbyp {
4188    #[doc = "Divider for GDSSBI bypass enable"]
4189    #[inline(always)]
4190    pub fn gdssbpe(
4191        self,
4192    ) -> crate::common::RegisterField<
4193        3,
4194        0x1,
4195        1,
4196        0,
4197        busdivbyp::Gdssbpe,
4198        busdivbyp::Gdssbpe,
4199        Busdivbyp_SPEC,
4200        crate::common::RW,
4201    > {
4202        crate::common::RegisterField::<
4203            3,
4204            0x1,
4205            1,
4206            0,
4207            busdivbyp::Gdssbpe,
4208            busdivbyp::Gdssbpe,
4209            Busdivbyp_SPEC,
4210            crate::common::RW,
4211        >::from_register(self, 0)
4212    }
4213
4214    #[doc = "Divider for CPUSAHBI bypass enable"]
4215    #[inline(always)]
4216    pub fn cpu0sbpe(
4217        self,
4218    ) -> crate::common::RegisterField<
4219        16,
4220        0x1,
4221        1,
4222        0,
4223        busdivbyp::Cpu0Sbpe,
4224        busdivbyp::Cpu0Sbpe,
4225        Busdivbyp_SPEC,
4226        crate::common::RW,
4227    > {
4228        crate::common::RegisterField::<
4229            16,
4230            0x1,
4231            1,
4232            0,
4233            busdivbyp::Cpu0Sbpe,
4234            busdivbyp::Cpu0Sbpe,
4235            Busdivbyp_SPEC,
4236            crate::common::RW,
4237        >::from_register(self, 0)
4238    }
4239}
4240impl ::core::default::Default for Busdivbyp {
4241    #[inline(always)]
4242    fn default() -> Busdivbyp {
4243        <crate::RegValueT<Busdivbyp_SPEC> as RegisterValue<_>>::new(0)
4244    }
4245}
4246pub mod busdivbyp {
4247
4248    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4249    pub struct Gdssbpe_SPEC;
4250    pub type Gdssbpe = crate::EnumBitfieldStruct<u8, Gdssbpe_SPEC>;
4251    impl Gdssbpe {
4252        #[doc = "Disable"]
4253        pub const _0: Self = Self::new(0);
4254
4255        #[doc = "Enable"]
4256        pub const _1: Self = Self::new(1);
4257    }
4258    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4259    pub struct Cpu0Sbpe_SPEC;
4260    pub type Cpu0Sbpe = crate::EnumBitfieldStruct<u8, Cpu0Sbpe_SPEC>;
4261    impl Cpu0Sbpe {
4262        #[doc = "Disable"]
4263        pub const _0: Self = Self::new(0);
4264
4265        #[doc = "Enable"]
4266        pub const _1: Self = Self::new(1);
4267    }
4268}
4269#[doc(hidden)]
4270#[derive(Copy, Clone, Eq, PartialEq)]
4271pub struct Buserrrw_SPEC;
4272impl crate::sealed::RegSpec for Buserrrw_SPEC {
4273    type DataType = u8;
4274}
4275
4276#[doc = "BUS Error Read Write (n = 6 to 9)"]
4277pub type Buserrrw = crate::RegValueT<Buserrrw_SPEC>;
4278
4279impl Buserrrw {
4280    #[doc = "Error access Read/Write Status"]
4281    #[inline(always)]
4282    pub fn rwstat(
4283        self,
4284    ) -> crate::common::RegisterField<
4285        0,
4286        0x1,
4287        1,
4288        0,
4289        buserrrw::Rwstat,
4290        buserrrw::Rwstat,
4291        Buserrrw_SPEC,
4292        crate::common::R,
4293    > {
4294        crate::common::RegisterField::<
4295            0,
4296            0x1,
4297            1,
4298            0,
4299            buserrrw::Rwstat,
4300            buserrrw::Rwstat,
4301            Buserrrw_SPEC,
4302            crate::common::R,
4303        >::from_register(self, 0)
4304    }
4305}
4306impl ::core::default::Default for Buserrrw {
4307    #[inline(always)]
4308    fn default() -> Buserrrw {
4309        <crate::RegValueT<Buserrrw_SPEC> as RegisterValue<_>>::new(0)
4310    }
4311}
4312pub mod buserrrw {
4313
4314    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4315    pub struct Rwstat_SPEC;
4316    pub type Rwstat = crate::EnumBitfieldStruct<u8, Rwstat_SPEC>;
4317    impl Rwstat {
4318        #[doc = "Read access"]
4319        pub const _0: Self = Self::new(0);
4320
4321        #[doc = "Write access"]
4322        pub const _1: Self = Self::new(1);
4323    }
4324}
4325#[doc(hidden)]
4326#[derive(Copy, Clone, Eq, PartialEq)]
4327pub struct Buserradd_SPEC;
4328impl crate::sealed::RegSpec for Buserradd_SPEC {
4329    type DataType = u32;
4330}
4331
4332#[doc = "BUS Error Address Register (n = 6 to 9)"]
4333pub type Buserradd = crate::RegValueT<Buserradd_SPEC>;
4334
4335impl Buserradd {
4336    #[doc = "Bus Error Address"]
4337    #[inline(always)]
4338    pub fn berad(
4339        self,
4340    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Buserradd_SPEC, crate::common::R>
4341    {
4342        crate::common::RegisterField::<
4343            0,
4344            0xffffffff,
4345            1,
4346            0,
4347            u32,
4348            u32,
4349            Buserradd_SPEC,
4350            crate::common::R,
4351        >::from_register(self, 0)
4352    }
4353}
4354impl ::core::default::Default for Buserradd {
4355    #[inline(always)]
4356    fn default() -> Buserradd {
4357        <crate::RegValueT<Buserradd_SPEC> as RegisterValue<_>>::new(0)
4358    }
4359}
4360
4361#[doc(hidden)]
4362#[derive(Copy, Clone, Eq, PartialEq)]
4363pub struct Bmsaerradd_SPEC;
4364impl crate::sealed::RegSpec for Bmsaerradd_SPEC {
4365    type DataType = u32;
4366}
4367
4368#[doc = "Bus Master Security Attribution Unit Error Address"]
4369pub type Bmsaerradd = crate::RegValueT<Bmsaerradd_SPEC>;
4370
4371impl Bmsaerradd {
4372    #[doc = "Bus Master Security Attribution Unit Error Address"]
4373    #[inline(always)]
4374    pub fn mserad(
4375        self,
4376    ) -> crate::common::RegisterField<
4377        0,
4378        0xffffffff,
4379        1,
4380        0,
4381        u32,
4382        u32,
4383        Bmsaerradd_SPEC,
4384        crate::common::R,
4385    > {
4386        crate::common::RegisterField::<
4387            0,
4388            0xffffffff,
4389            1,
4390            0,
4391            u32,
4392            u32,
4393            Bmsaerradd_SPEC,
4394            crate::common::R,
4395        >::from_register(self, 0)
4396    }
4397}
4398impl ::core::default::Default for Bmsaerradd {
4399    #[inline(always)]
4400    fn default() -> Bmsaerradd {
4401        <crate::RegValueT<Bmsaerradd_SPEC> as RegisterValue<_>>::new(0)
4402    }
4403}
4404
4405#[doc(hidden)]
4406#[derive(Copy, Clone, Eq, PartialEq)]
4407pub struct Bmsaerrrw_SPEC;
4408impl crate::sealed::RegSpec for Bmsaerrrw_SPEC {
4409    type DataType = u8;
4410}
4411
4412#[doc = "BUS Master Security Attribution Unit Error Read Write (n = 6 to 9)"]
4413pub type Bmsaerrrw = crate::RegValueT<Bmsaerrrw_SPEC>;
4414
4415impl Bmsaerrrw {
4416    #[doc = "Master Security Attribution Unit error access Read/Write Status"]
4417    #[inline(always)]
4418    pub fn msarwstat(
4419        self,
4420    ) -> crate::common::RegisterField<
4421        0,
4422        0x1,
4423        1,
4424        0,
4425        bmsaerrrw::Msarwstat,
4426        bmsaerrrw::Msarwstat,
4427        Bmsaerrrw_SPEC,
4428        crate::common::R,
4429    > {
4430        crate::common::RegisterField::<
4431            0,
4432            0x1,
4433            1,
4434            0,
4435            bmsaerrrw::Msarwstat,
4436            bmsaerrrw::Msarwstat,
4437            Bmsaerrrw_SPEC,
4438            crate::common::R,
4439        >::from_register(self, 0)
4440    }
4441}
4442impl ::core::default::Default for Bmsaerrrw {
4443    #[inline(always)]
4444    fn default() -> Bmsaerrrw {
4445        <crate::RegValueT<Bmsaerrrw_SPEC> as RegisterValue<_>>::new(0)
4446    }
4447}
4448pub mod bmsaerrrw {
4449
4450    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4451    pub struct Msarwstat_SPEC;
4452    pub type Msarwstat = crate::EnumBitfieldStruct<u8, Msarwstat_SPEC>;
4453    impl Msarwstat {
4454        #[doc = "Read access"]
4455        pub const _0: Self = Self::new(0);
4456
4457        #[doc = "Write access"]
4458        pub const _1: Self = Self::new(1);
4459    }
4460}
4461#[doc(hidden)]
4462#[derive(Copy, Clone, Eq, PartialEq)]
4463pub struct Buserrstat_SPEC;
4464impl crate::sealed::RegSpec for Buserrstat_SPEC {
4465    type DataType = u8;
4466}
4467
4468#[doc = "BUS Error Status Register"]
4469pub type Buserrstat = crate::RegValueT<Buserrstat_SPEC>;
4470
4471impl Buserrstat {
4472    #[doc = "Slave Bus Error Status"]
4473    #[inline(always)]
4474    pub fn slerrstat(
4475        self,
4476    ) -> crate::common::RegisterField<
4477        0,
4478        0x1,
4479        1,
4480        0,
4481        buserrstat::Slerrstat,
4482        buserrstat::Slerrstat,
4483        Buserrstat_SPEC,
4484        crate::common::R,
4485    > {
4486        crate::common::RegisterField::<
4487            0,
4488            0x1,
4489            1,
4490            0,
4491            buserrstat::Slerrstat,
4492            buserrstat::Slerrstat,
4493            Buserrstat_SPEC,
4494            crate::common::R,
4495        >::from_register(self, 0)
4496    }
4497
4498    #[doc = "Master MPU Error Status"]
4499    #[inline(always)]
4500    pub fn mmerrstat(
4501        self,
4502    ) -> crate::common::RegisterField<
4503        3,
4504        0x1,
4505        1,
4506        0,
4507        buserrstat::Mmerrstat,
4508        buserrstat::Mmerrstat,
4509        Buserrstat_SPEC,
4510        crate::common::R,
4511    > {
4512        crate::common::RegisterField::<
4513            3,
4514            0x1,
4515            1,
4516            0,
4517            buserrstat::Mmerrstat,
4518            buserrstat::Mmerrstat,
4519            Buserrstat_SPEC,
4520            crate::common::R,
4521        >::from_register(self, 0)
4522    }
4523
4524    #[doc = "Illegal Address Access Error Status"]
4525    #[inline(always)]
4526    pub fn ilerrstat(
4527        self,
4528    ) -> crate::common::RegisterField<
4529        4,
4530        0x1,
4531        1,
4532        0,
4533        buserrstat::Ilerrstat,
4534        buserrstat::Ilerrstat,
4535        Buserrstat_SPEC,
4536        crate::common::R,
4537    > {
4538        crate::common::RegisterField::<
4539            4,
4540            0x1,
4541            1,
4542            0,
4543            buserrstat::Ilerrstat,
4544            buserrstat::Ilerrstat,
4545            Buserrstat_SPEC,
4546            crate::common::R,
4547        >::from_register(self, 0)
4548    }
4549
4550    #[doc = "Master Security Attribution Unit Error Status"]
4551    #[inline(always)]
4552    pub fn mserrstat(
4553        self,
4554    ) -> crate::common::RegisterField<
4555        5,
4556        0x1,
4557        1,
4558        0,
4559        buserrstat::Mserrstat,
4560        buserrstat::Mserrstat,
4561        Buserrstat_SPEC,
4562        crate::common::R,
4563    > {
4564        crate::common::RegisterField::<
4565            5,
4566            0x1,
4567            1,
4568            0,
4569            buserrstat::Mserrstat,
4570            buserrstat::Mserrstat,
4571            Buserrstat_SPEC,
4572            crate::common::R,
4573        >::from_register(self, 0)
4574    }
4575}
4576impl ::core::default::Default for Buserrstat {
4577    #[inline(always)]
4578    fn default() -> Buserrstat {
4579        <crate::RegValueT<Buserrstat_SPEC> as RegisterValue<_>>::new(0)
4580    }
4581}
4582pub mod buserrstat {
4583
4584    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4585    pub struct Slerrstat_SPEC;
4586    pub type Slerrstat = crate::EnumBitfieldStruct<u8, Slerrstat_SPEC>;
4587    impl Slerrstat {
4588        #[doc = "No error occurred"]
4589        pub const _0: Self = Self::new(0);
4590
4591        #[doc = "Error occurred"]
4592        pub const _1: Self = Self::new(1);
4593    }
4594    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4595    pub struct Mmerrstat_SPEC;
4596    pub type Mmerrstat = crate::EnumBitfieldStruct<u8, Mmerrstat_SPEC>;
4597    impl Mmerrstat {
4598        #[doc = "No error occurred"]
4599        pub const _0: Self = Self::new(0);
4600
4601        #[doc = "Error occurred"]
4602        pub const _1: Self = Self::new(1);
4603    }
4604    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4605    pub struct Ilerrstat_SPEC;
4606    pub type Ilerrstat = crate::EnumBitfieldStruct<u8, Ilerrstat_SPEC>;
4607    impl Ilerrstat {
4608        #[doc = "No error occurred"]
4609        pub const _0: Self = Self::new(0);
4610
4611        #[doc = "Error occurred"]
4612        pub const _1: Self = Self::new(1);
4613    }
4614    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4615    pub struct Mserrstat_SPEC;
4616    pub type Mserrstat = crate::EnumBitfieldStruct<u8, Mserrstat_SPEC>;
4617    impl Mserrstat {
4618        #[doc = "No error occurred"]
4619        pub const _0: Self = Self::new(0);
4620
4621        #[doc = "Error occurred"]
4622        pub const _1: Self = Self::new(1);
4623    }
4624}
4625#[doc(hidden)]
4626#[derive(Copy, Clone, Eq, PartialEq)]
4627pub struct Buserrclr_SPEC;
4628impl crate::sealed::RegSpec for Buserrclr_SPEC {
4629    type DataType = u8;
4630}
4631
4632#[doc = "BUS Error Clear Register"]
4633pub type Buserrclr = crate::RegValueT<Buserrclr_SPEC>;
4634
4635impl Buserrclr {
4636    #[doc = "Slave Bus Error Clear"]
4637    #[inline(always)]
4638    pub fn slerrclr(
4639        self,
4640    ) -> crate::common::RegisterFieldBool<0, 1, 0, Buserrclr_SPEC, crate::common::RW> {
4641        crate::common::RegisterFieldBool::<0,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
4642    }
4643
4644    #[doc = "Master MPU Error Clear"]
4645    #[inline(always)]
4646    pub fn mmerrclr(
4647        self,
4648    ) -> crate::common::RegisterFieldBool<3, 1, 0, Buserrclr_SPEC, crate::common::RW> {
4649        crate::common::RegisterFieldBool::<3,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
4650    }
4651
4652    #[doc = "Illegal Address Access Error Clear"]
4653    #[inline(always)]
4654    pub fn ilerrclr(
4655        self,
4656    ) -> crate::common::RegisterFieldBool<4, 1, 0, Buserrclr_SPEC, crate::common::RW> {
4657        crate::common::RegisterFieldBool::<4,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
4658    }
4659
4660    #[doc = "Master Security Attribution Unit Error Clear"]
4661    #[inline(always)]
4662    pub fn mserrclr(
4663        self,
4664    ) -> crate::common::RegisterFieldBool<5, 1, 0, Buserrclr_SPEC, crate::common::RW> {
4665        crate::common::RegisterFieldBool::<5,1,0,Buserrclr_SPEC,crate::common::RW>::from_register(self,0)
4666    }
4667}
4668impl ::core::default::Default for Buserrclr {
4669    #[inline(always)]
4670    fn default() -> Buserrclr {
4671        <crate::RegValueT<Buserrclr_SPEC> as RegisterValue<_>>::new(0)
4672    }
4673}
4674
4675#[doc(hidden)]
4676#[derive(Copy, Clone, Eq, PartialEq)]
4677pub struct Mbwerrstat_SPEC;
4678impl crate::sealed::RegSpec for Mbwerrstat_SPEC {
4679    type DataType = u32;
4680}
4681
4682#[doc = "Master Bufferable Write Error Status Register"]
4683pub type Mbwerrstat = crate::RegValueT<Mbwerrstat_SPEC>;
4684
4685impl Mbwerrstat {
4686    #[doc = "Master Bufferable Write Error"]
4687    #[inline(always)]
4688    pub fn mbwerr0(
4689        self,
4690    ) -> crate::common::RegisterField<
4691        0,
4692        0x1,
4693        1,
4694        0,
4695        mbwerrstat::Mbwerr0,
4696        mbwerrstat::Mbwerr0,
4697        Mbwerrstat_SPEC,
4698        crate::common::R,
4699    > {
4700        crate::common::RegisterField::<
4701            0,
4702            0x1,
4703            1,
4704            0,
4705            mbwerrstat::Mbwerr0,
4706            mbwerrstat::Mbwerr0,
4707            Mbwerrstat_SPEC,
4708            crate::common::R,
4709        >::from_register(self, 0)
4710    }
4711
4712    #[doc = "Master Bufferable Write Error"]
4713    #[inline(always)]
4714    pub fn mbwerr1(
4715        self,
4716    ) -> crate::common::RegisterField<
4717        1,
4718        0x1,
4719        1,
4720        0,
4721        mbwerrstat::Mbwerr1,
4722        mbwerrstat::Mbwerr1,
4723        Mbwerrstat_SPEC,
4724        crate::common::R,
4725    > {
4726        crate::common::RegisterField::<
4727            1,
4728            0x1,
4729            1,
4730            0,
4731            mbwerrstat::Mbwerr1,
4732            mbwerrstat::Mbwerr1,
4733            Mbwerrstat_SPEC,
4734            crate::common::R,
4735        >::from_register(self, 0)
4736    }
4737
4738    #[doc = "Master Bufferable Write Error"]
4739    #[inline(always)]
4740    pub fn mbwerr8(
4741        self,
4742    ) -> crate::common::RegisterField<
4743        8,
4744        0x1,
4745        1,
4746        0,
4747        mbwerrstat::Mbwerr8,
4748        mbwerrstat::Mbwerr8,
4749        Mbwerrstat_SPEC,
4750        crate::common::R,
4751    > {
4752        crate::common::RegisterField::<
4753            8,
4754            0x1,
4755            1,
4756            0,
4757            mbwerrstat::Mbwerr8,
4758            mbwerrstat::Mbwerr8,
4759            Mbwerrstat_SPEC,
4760            crate::common::R,
4761        >::from_register(self, 0)
4762    }
4763
4764    #[doc = "Master Bufferable Write Error"]
4765    #[inline(always)]
4766    pub fn mbwerr17(
4767        self,
4768    ) -> crate::common::RegisterField<
4769        17,
4770        0x1,
4771        1,
4772        0,
4773        mbwerrstat::Mbwerr17,
4774        mbwerrstat::Mbwerr17,
4775        Mbwerrstat_SPEC,
4776        crate::common::R,
4777    > {
4778        crate::common::RegisterField::<
4779            17,
4780            0x1,
4781            1,
4782            0,
4783            mbwerrstat::Mbwerr17,
4784            mbwerrstat::Mbwerr17,
4785            Mbwerrstat_SPEC,
4786            crate::common::R,
4787        >::from_register(self, 0)
4788    }
4789
4790    #[doc = "Master Bufferable Write Error"]
4791    #[inline(always)]
4792    pub fn mbwerr18(
4793        self,
4794    ) -> crate::common::RegisterField<
4795        18,
4796        0x1,
4797        1,
4798        0,
4799        mbwerrstat::Mbwerr18,
4800        mbwerrstat::Mbwerr18,
4801        Mbwerrstat_SPEC,
4802        crate::common::R,
4803    > {
4804        crate::common::RegisterField::<
4805            18,
4806            0x1,
4807            1,
4808            0,
4809            mbwerrstat::Mbwerr18,
4810            mbwerrstat::Mbwerr18,
4811            Mbwerrstat_SPEC,
4812            crate::common::R,
4813        >::from_register(self, 0)
4814    }
4815
4816    #[doc = "Master Bufferable Write Error"]
4817    #[inline(always)]
4818    pub fn mbwerr19(
4819        self,
4820    ) -> crate::common::RegisterField<
4821        19,
4822        0x1,
4823        1,
4824        0,
4825        mbwerrstat::Mbwerr19,
4826        mbwerrstat::Mbwerr19,
4827        Mbwerrstat_SPEC,
4828        crate::common::R,
4829    > {
4830        crate::common::RegisterField::<
4831            19,
4832            0x1,
4833            1,
4834            0,
4835            mbwerrstat::Mbwerr19,
4836            mbwerrstat::Mbwerr19,
4837            Mbwerrstat_SPEC,
4838            crate::common::R,
4839        >::from_register(self, 0)
4840    }
4841
4842    #[doc = "Master Bufferable Write Error"]
4843    #[inline(always)]
4844    pub fn mbwerr20(
4845        self,
4846    ) -> crate::common::RegisterField<
4847        20,
4848        0x1,
4849        1,
4850        0,
4851        mbwerrstat::Mbwerr20,
4852        mbwerrstat::Mbwerr20,
4853        Mbwerrstat_SPEC,
4854        crate::common::R,
4855    > {
4856        crate::common::RegisterField::<
4857            20,
4858            0x1,
4859            1,
4860            0,
4861            mbwerrstat::Mbwerr20,
4862            mbwerrstat::Mbwerr20,
4863            Mbwerrstat_SPEC,
4864            crate::common::R,
4865        >::from_register(self, 0)
4866    }
4867
4868    #[doc = "Master Bufferable Write Error"]
4869    #[inline(always)]
4870    pub fn mbwerr23(
4871        self,
4872    ) -> crate::common::RegisterField<
4873        23,
4874        0x1,
4875        1,
4876        0,
4877        mbwerrstat::Mbwerr23,
4878        mbwerrstat::Mbwerr23,
4879        Mbwerrstat_SPEC,
4880        crate::common::R,
4881    > {
4882        crate::common::RegisterField::<
4883            23,
4884            0x1,
4885            1,
4886            0,
4887            mbwerrstat::Mbwerr23,
4888            mbwerrstat::Mbwerr23,
4889            Mbwerrstat_SPEC,
4890            crate::common::R,
4891        >::from_register(self, 0)
4892    }
4893}
4894impl ::core::default::Default for Mbwerrstat {
4895    #[inline(always)]
4896    fn default() -> Mbwerrstat {
4897        <crate::RegValueT<Mbwerrstat_SPEC> as RegisterValue<_>>::new(0)
4898    }
4899}
4900pub mod mbwerrstat {
4901
4902    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4903    pub struct Mbwerr0_SPEC;
4904    pub type Mbwerr0 = crate::EnumBitfieldStruct<u8, Mbwerr0_SPEC>;
4905    impl Mbwerr0 {
4906        #[doc = "No bufferable write error in Master #0"]
4907        pub const _0: Self = Self::new(0);
4908
4909        #[doc = "Bufferable write error occurs in Master #0"]
4910        pub const _1: Self = Self::new(1);
4911    }
4912    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4913    pub struct Mbwerr1_SPEC;
4914    pub type Mbwerr1 = crate::EnumBitfieldStruct<u8, Mbwerr1_SPEC>;
4915    impl Mbwerr1 {
4916        #[doc = "No bufferable write error in Master #1"]
4917        pub const _0: Self = Self::new(0);
4918
4919        #[doc = "Bufferable write error occurs in Master #1"]
4920        pub const _1: Self = Self::new(1);
4921    }
4922    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4923    pub struct Mbwerr8_SPEC;
4924    pub type Mbwerr8 = crate::EnumBitfieldStruct<u8, Mbwerr8_SPEC>;
4925    impl Mbwerr8 {
4926        #[doc = "No bufferable write error in Master #8"]
4927        pub const _0: Self = Self::new(0);
4928
4929        #[doc = "Bufferable write error occurs in Master #8"]
4930        pub const _1: Self = Self::new(1);
4931    }
4932    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4933    pub struct Mbwerr17_SPEC;
4934    pub type Mbwerr17 = crate::EnumBitfieldStruct<u8, Mbwerr17_SPEC>;
4935    impl Mbwerr17 {
4936        #[doc = "No bufferable write error in Master #17"]
4937        pub const _0: Self = Self::new(0);
4938
4939        #[doc = "Bufferable write error occurs in Master #17"]
4940        pub const _1: Self = Self::new(1);
4941    }
4942    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4943    pub struct Mbwerr18_SPEC;
4944    pub type Mbwerr18 = crate::EnumBitfieldStruct<u8, Mbwerr18_SPEC>;
4945    impl Mbwerr18 {
4946        #[doc = "No bufferable write error in Master #18"]
4947        pub const _0: Self = Self::new(0);
4948
4949        #[doc = "Bufferable write error occurs in Master #18"]
4950        pub const _1: Self = Self::new(1);
4951    }
4952    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4953    pub struct Mbwerr19_SPEC;
4954    pub type Mbwerr19 = crate::EnumBitfieldStruct<u8, Mbwerr19_SPEC>;
4955    impl Mbwerr19 {
4956        #[doc = "No bufferable write error in Master #19"]
4957        pub const _0: Self = Self::new(0);
4958
4959        #[doc = "Bufferable write error occurs in Master #19"]
4960        pub const _1: Self = Self::new(1);
4961    }
4962    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4963    pub struct Mbwerr20_SPEC;
4964    pub type Mbwerr20 = crate::EnumBitfieldStruct<u8, Mbwerr20_SPEC>;
4965    impl Mbwerr20 {
4966        #[doc = "No bufferable write error in Master #20"]
4967        pub const _0: Self = Self::new(0);
4968
4969        #[doc = "Bufferable write error occurs in Master #20"]
4970        pub const _1: Self = Self::new(1);
4971    }
4972    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
4973    pub struct Mbwerr23_SPEC;
4974    pub type Mbwerr23 = crate::EnumBitfieldStruct<u8, Mbwerr23_SPEC>;
4975    impl Mbwerr23 {
4976        #[doc = "No bufferable write error in Master #23"]
4977        pub const _0: Self = Self::new(0);
4978
4979        #[doc = "Bufferable write error occurs in Master #23"]
4980        pub const _1: Self = Self::new(1);
4981    }
4982}
4983#[doc(hidden)]
4984#[derive(Copy, Clone, Eq, PartialEq)]
4985pub struct Mbwerrclr_SPEC;
4986impl crate::sealed::RegSpec for Mbwerrclr_SPEC {
4987    type DataType = u32;
4988}
4989
4990#[doc = "Master Bufferable Write Error Clear Register"]
4991pub type Mbwerrclr = crate::RegValueT<Mbwerrclr_SPEC>;
4992
4993impl Mbwerrclr {
4994    #[doc = "Master Bufferable Write Error Clear"]
4995    #[inline(always)]
4996    pub fn mbweclr0(
4997        self,
4998    ) -> crate::common::RegisterFieldBool<0, 1, 0, Mbwerrclr_SPEC, crate::common::RW> {
4999        crate::common::RegisterFieldBool::<0,1,0,Mbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
5000    }
5001
5002    #[doc = "Master Bufferable Write Error Clear"]
5003    #[inline(always)]
5004    pub fn mbweclr1(
5005        self,
5006    ) -> crate::common::RegisterFieldBool<1, 1, 0, Mbwerrclr_SPEC, crate::common::RW> {
5007        crate::common::RegisterFieldBool::<1,1,0,Mbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
5008    }
5009
5010    #[doc = "Master Bufferable Write Error Clear"]
5011    #[inline(always)]
5012    pub fn mbweclr8(
5013        self,
5014    ) -> crate::common::RegisterFieldBool<8, 1, 0, Mbwerrclr_SPEC, crate::common::RW> {
5015        crate::common::RegisterFieldBool::<8,1,0,Mbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
5016    }
5017
5018    #[doc = "Master Bufferable Write Error Clear"]
5019    #[inline(always)]
5020    pub fn mbweclr17(
5021        self,
5022    ) -> crate::common::RegisterFieldBool<17, 1, 0, Mbwerrclr_SPEC, crate::common::RW> {
5023        crate::common::RegisterFieldBool::<17,1,0,Mbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
5024    }
5025
5026    #[doc = "Master Bufferable Write Error Clear"]
5027    #[inline(always)]
5028    pub fn mbweclr18(
5029        self,
5030    ) -> crate::common::RegisterFieldBool<18, 1, 0, Mbwerrclr_SPEC, crate::common::RW> {
5031        crate::common::RegisterFieldBool::<18,1,0,Mbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
5032    }
5033
5034    #[doc = "Master Bufferable Write Error Clear"]
5035    #[inline(always)]
5036    pub fn mbweclr19(
5037        self,
5038    ) -> crate::common::RegisterFieldBool<19, 1, 0, Mbwerrclr_SPEC, crate::common::RW> {
5039        crate::common::RegisterFieldBool::<19,1,0,Mbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
5040    }
5041
5042    #[doc = "Master Bufferable Write Error Clear"]
5043    #[inline(always)]
5044    pub fn mbweclr20(
5045        self,
5046    ) -> crate::common::RegisterFieldBool<20, 1, 0, Mbwerrclr_SPEC, crate::common::RW> {
5047        crate::common::RegisterFieldBool::<20,1,0,Mbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
5048    }
5049
5050    #[doc = "Master Bufferable Write Error Clear"]
5051    #[inline(always)]
5052    pub fn mbweclr23(
5053        self,
5054    ) -> crate::common::RegisterFieldBool<23, 1, 0, Mbwerrclr_SPEC, crate::common::RW> {
5055        crate::common::RegisterFieldBool::<23,1,0,Mbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
5056    }
5057}
5058impl ::core::default::Default for Mbwerrclr {
5059    #[inline(always)]
5060    fn default() -> Mbwerrclr {
5061        <crate::RegValueT<Mbwerrclr_SPEC> as RegisterValue<_>>::new(0)
5062    }
5063}
5064
5065#[doc(hidden)]
5066#[derive(Copy, Clone, Eq, PartialEq)]
5067pub struct Sbwerrstat_SPEC;
5068impl crate::sealed::RegSpec for Sbwerrstat_SPEC {
5069    type DataType = u32;
5070}
5071
5072#[doc = "Slave Bufferable Write Error Status Register"]
5073pub type Sbwerrstat = crate::RegValueT<Sbwerrstat_SPEC>;
5074
5075impl Sbwerrstat {
5076    #[doc = "Slave Bufferable Write Error"]
5077    #[inline(always)]
5078    pub fn sbwerr0(
5079        self,
5080    ) -> crate::common::RegisterField<
5081        0,
5082        0x1,
5083        1,
5084        0,
5085        sbwerrstat::Sbwerr0,
5086        sbwerrstat::Sbwerr0,
5087        Sbwerrstat_SPEC,
5088        crate::common::R,
5089    > {
5090        crate::common::RegisterField::<
5091            0,
5092            0x1,
5093            1,
5094            0,
5095            sbwerrstat::Sbwerr0,
5096            sbwerrstat::Sbwerr0,
5097            Sbwerrstat_SPEC,
5098            crate::common::R,
5099        >::from_register(self, 0)
5100    }
5101
5102    #[doc = "Slave Bufferable Write Error"]
5103    #[inline(always)]
5104    pub fn sbwerr1(
5105        self,
5106    ) -> crate::common::RegisterField<
5107        1,
5108        0x1,
5109        1,
5110        0,
5111        sbwerrstat::Sbwerr1,
5112        sbwerrstat::Sbwerr1,
5113        Sbwerrstat_SPEC,
5114        crate::common::R,
5115    > {
5116        crate::common::RegisterField::<
5117            1,
5118            0x1,
5119            1,
5120            0,
5121            sbwerrstat::Sbwerr1,
5122            sbwerrstat::Sbwerr1,
5123            Sbwerrstat_SPEC,
5124            crate::common::R,
5125        >::from_register(self, 0)
5126    }
5127
5128    #[doc = "Slave Bufferable Write Error"]
5129    #[inline(always)]
5130    pub fn sbwerr2(
5131        self,
5132    ) -> crate::common::RegisterField<
5133        2,
5134        0x1,
5135        1,
5136        0,
5137        sbwerrstat::Sbwerr2,
5138        sbwerrstat::Sbwerr2,
5139        Sbwerrstat_SPEC,
5140        crate::common::R,
5141    > {
5142        crate::common::RegisterField::<
5143            2,
5144            0x1,
5145            1,
5146            0,
5147            sbwerrstat::Sbwerr2,
5148            sbwerrstat::Sbwerr2,
5149            Sbwerrstat_SPEC,
5150            crate::common::R,
5151        >::from_register(self, 0)
5152    }
5153
5154    #[doc = "Slave Bufferable Write Error"]
5155    #[inline(always)]
5156    pub fn sbwerr3(
5157        self,
5158    ) -> crate::common::RegisterField<
5159        3,
5160        0x1,
5161        1,
5162        0,
5163        sbwerrstat::Sbwerr3,
5164        sbwerrstat::Sbwerr3,
5165        Sbwerrstat_SPEC,
5166        crate::common::R,
5167    > {
5168        crate::common::RegisterField::<
5169            3,
5170            0x1,
5171            1,
5172            0,
5173            sbwerrstat::Sbwerr3,
5174            sbwerrstat::Sbwerr3,
5175            Sbwerrstat_SPEC,
5176            crate::common::R,
5177        >::from_register(self, 0)
5178    }
5179
5180    #[doc = "Slave Bufferable Write Error"]
5181    #[inline(always)]
5182    pub fn sbwerr4(
5183        self,
5184    ) -> crate::common::RegisterField<
5185        4,
5186        0x1,
5187        1,
5188        0,
5189        sbwerrstat::Sbwerr4,
5190        sbwerrstat::Sbwerr4,
5191        Sbwerrstat_SPEC,
5192        crate::common::R,
5193    > {
5194        crate::common::RegisterField::<
5195            4,
5196            0x1,
5197            1,
5198            0,
5199            sbwerrstat::Sbwerr4,
5200            sbwerrstat::Sbwerr4,
5201            Sbwerrstat_SPEC,
5202            crate::common::R,
5203        >::from_register(self, 0)
5204    }
5205
5206    #[doc = "Slave Bufferable Write Error"]
5207    #[inline(always)]
5208    pub fn sbwerr5(
5209        self,
5210    ) -> crate::common::RegisterField<
5211        5,
5212        0x1,
5213        1,
5214        0,
5215        sbwerrstat::Sbwerr5,
5216        sbwerrstat::Sbwerr5,
5217        Sbwerrstat_SPEC,
5218        crate::common::R,
5219    > {
5220        crate::common::RegisterField::<
5221            5,
5222            0x1,
5223            1,
5224            0,
5225            sbwerrstat::Sbwerr5,
5226            sbwerrstat::Sbwerr5,
5227            Sbwerrstat_SPEC,
5228            crate::common::R,
5229        >::from_register(self, 0)
5230    }
5231
5232    #[doc = "Slave Bufferable Write Error"]
5233    #[inline(always)]
5234    pub fn sbwerr6(
5235        self,
5236    ) -> crate::common::RegisterField<
5237        6,
5238        0x1,
5239        1,
5240        0,
5241        sbwerrstat::Sbwerr6,
5242        sbwerrstat::Sbwerr6,
5243        Sbwerrstat_SPEC,
5244        crate::common::R,
5245    > {
5246        crate::common::RegisterField::<
5247            6,
5248            0x1,
5249            1,
5250            0,
5251            sbwerrstat::Sbwerr6,
5252            sbwerrstat::Sbwerr6,
5253            Sbwerrstat_SPEC,
5254            crate::common::R,
5255        >::from_register(self, 0)
5256    }
5257
5258    #[doc = "Slave Bufferable Write Error"]
5259    #[inline(always)]
5260    pub fn sbwerr7(
5261        self,
5262    ) -> crate::common::RegisterField<
5263        7,
5264        0x1,
5265        1,
5266        0,
5267        sbwerrstat::Sbwerr7,
5268        sbwerrstat::Sbwerr7,
5269        Sbwerrstat_SPEC,
5270        crate::common::R,
5271    > {
5272        crate::common::RegisterField::<
5273            7,
5274            0x1,
5275            1,
5276            0,
5277            sbwerrstat::Sbwerr7,
5278            sbwerrstat::Sbwerr7,
5279            Sbwerrstat_SPEC,
5280            crate::common::R,
5281        >::from_register(self, 0)
5282    }
5283
5284    #[doc = "Slave Bufferable Write Error"]
5285    #[inline(always)]
5286    pub fn sbwerr8(
5287        self,
5288    ) -> crate::common::RegisterField<
5289        8,
5290        0x1,
5291        1,
5292        0,
5293        sbwerrstat::Sbwerr8,
5294        sbwerrstat::Sbwerr8,
5295        Sbwerrstat_SPEC,
5296        crate::common::R,
5297    > {
5298        crate::common::RegisterField::<
5299            8,
5300            0x1,
5301            1,
5302            0,
5303            sbwerrstat::Sbwerr8,
5304            sbwerrstat::Sbwerr8,
5305            Sbwerrstat_SPEC,
5306            crate::common::R,
5307        >::from_register(self, 0)
5308    }
5309
5310    #[doc = "Slave Bufferable Write Error"]
5311    #[inline(always)]
5312    pub fn sbwerr9(
5313        self,
5314    ) -> crate::common::RegisterField<
5315        9,
5316        0x1,
5317        1,
5318        0,
5319        sbwerrstat::Sbwerr9,
5320        sbwerrstat::Sbwerr9,
5321        Sbwerrstat_SPEC,
5322        crate::common::R,
5323    > {
5324        crate::common::RegisterField::<
5325            9,
5326            0x1,
5327            1,
5328            0,
5329            sbwerrstat::Sbwerr9,
5330            sbwerrstat::Sbwerr9,
5331            Sbwerrstat_SPEC,
5332            crate::common::R,
5333        >::from_register(self, 0)
5334    }
5335
5336    #[doc = "Slave Bufferable Write Error"]
5337    #[inline(always)]
5338    pub fn sbwerr10(
5339        self,
5340    ) -> crate::common::RegisterField<
5341        10,
5342        0x1,
5343        1,
5344        0,
5345        sbwerrstat::Sbwerr10,
5346        sbwerrstat::Sbwerr10,
5347        Sbwerrstat_SPEC,
5348        crate::common::R,
5349    > {
5350        crate::common::RegisterField::<
5351            10,
5352            0x1,
5353            1,
5354            0,
5355            sbwerrstat::Sbwerr10,
5356            sbwerrstat::Sbwerr10,
5357            Sbwerrstat_SPEC,
5358            crate::common::R,
5359        >::from_register(self, 0)
5360    }
5361
5362    #[doc = "Slave Bufferable Write Error"]
5363    #[inline(always)]
5364    pub fn sbwerr11(
5365        self,
5366    ) -> crate::common::RegisterField<
5367        11,
5368        0x1,
5369        1,
5370        0,
5371        sbwerrstat::Sbwerr11,
5372        sbwerrstat::Sbwerr11,
5373        Sbwerrstat_SPEC,
5374        crate::common::R,
5375    > {
5376        crate::common::RegisterField::<
5377            11,
5378            0x1,
5379            1,
5380            0,
5381            sbwerrstat::Sbwerr11,
5382            sbwerrstat::Sbwerr11,
5383            Sbwerrstat_SPEC,
5384            crate::common::R,
5385        >::from_register(self, 0)
5386    }
5387
5388    #[doc = "Slave Bufferable Write Error"]
5389    #[inline(always)]
5390    pub fn sbwerr12(
5391        self,
5392    ) -> crate::common::RegisterField<
5393        12,
5394        0x1,
5395        1,
5396        0,
5397        sbwerrstat::Sbwerr12,
5398        sbwerrstat::Sbwerr12,
5399        Sbwerrstat_SPEC,
5400        crate::common::R,
5401    > {
5402        crate::common::RegisterField::<
5403            12,
5404            0x1,
5405            1,
5406            0,
5407            sbwerrstat::Sbwerr12,
5408            sbwerrstat::Sbwerr12,
5409            Sbwerrstat_SPEC,
5410            crate::common::R,
5411        >::from_register(self, 0)
5412    }
5413}
5414impl ::core::default::Default for Sbwerrstat {
5415    #[inline(always)]
5416    fn default() -> Sbwerrstat {
5417        <crate::RegValueT<Sbwerrstat_SPEC> as RegisterValue<_>>::new(0)
5418    }
5419}
5420pub mod sbwerrstat {
5421
5422    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5423    pub struct Sbwerr0_SPEC;
5424    pub type Sbwerr0 = crate::EnumBitfieldStruct<u8, Sbwerr0_SPEC>;
5425    impl Sbwerr0 {
5426        #[doc = "No bufferable write error in Slave #0"]
5427        pub const _0: Self = Self::new(0);
5428
5429        #[doc = "Bufferable write error occurs in Slave #0"]
5430        pub const _1: Self = Self::new(1);
5431    }
5432    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5433    pub struct Sbwerr1_SPEC;
5434    pub type Sbwerr1 = crate::EnumBitfieldStruct<u8, Sbwerr1_SPEC>;
5435    impl Sbwerr1 {
5436        #[doc = "No bufferable write error in Slave #1"]
5437        pub const _0: Self = Self::new(0);
5438
5439        #[doc = "Bufferable write error occurs in Slave #1"]
5440        pub const _1: Self = Self::new(1);
5441    }
5442    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5443    pub struct Sbwerr2_SPEC;
5444    pub type Sbwerr2 = crate::EnumBitfieldStruct<u8, Sbwerr2_SPEC>;
5445    impl Sbwerr2 {
5446        #[doc = "No bufferable write error in Slave #2"]
5447        pub const _0: Self = Self::new(0);
5448
5449        #[doc = "Bufferable write error occurs in Slave #2"]
5450        pub const _1: Self = Self::new(1);
5451    }
5452    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5453    pub struct Sbwerr3_SPEC;
5454    pub type Sbwerr3 = crate::EnumBitfieldStruct<u8, Sbwerr3_SPEC>;
5455    impl Sbwerr3 {
5456        #[doc = "No bufferable write error in Slave #3"]
5457        pub const _0: Self = Self::new(0);
5458
5459        #[doc = "Bufferable write error occurs in Slave #3"]
5460        pub const _1: Self = Self::new(1);
5461    }
5462    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5463    pub struct Sbwerr4_SPEC;
5464    pub type Sbwerr4 = crate::EnumBitfieldStruct<u8, Sbwerr4_SPEC>;
5465    impl Sbwerr4 {
5466        #[doc = "No bufferable write error in Slave #4"]
5467        pub const _0: Self = Self::new(0);
5468
5469        #[doc = "Bufferable write error occurs in Slave #4"]
5470        pub const _1: Self = Self::new(1);
5471    }
5472    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5473    pub struct Sbwerr5_SPEC;
5474    pub type Sbwerr5 = crate::EnumBitfieldStruct<u8, Sbwerr5_SPEC>;
5475    impl Sbwerr5 {
5476        #[doc = "No bufferable write error in Slave #5"]
5477        pub const _0: Self = Self::new(0);
5478
5479        #[doc = "Bufferable write error occurs in Slave #5"]
5480        pub const _1: Self = Self::new(1);
5481    }
5482    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5483    pub struct Sbwerr6_SPEC;
5484    pub type Sbwerr6 = crate::EnumBitfieldStruct<u8, Sbwerr6_SPEC>;
5485    impl Sbwerr6 {
5486        #[doc = "No bufferable write error in Slave #6"]
5487        pub const _0: Self = Self::new(0);
5488
5489        #[doc = "Bufferable write error occurs in Slave #6"]
5490        pub const _1: Self = Self::new(1);
5491    }
5492    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5493    pub struct Sbwerr7_SPEC;
5494    pub type Sbwerr7 = crate::EnumBitfieldStruct<u8, Sbwerr7_SPEC>;
5495    impl Sbwerr7 {
5496        #[doc = "No bufferable write error in Slave #7"]
5497        pub const _0: Self = Self::new(0);
5498
5499        #[doc = "Bufferable write error occurs in Slave #7"]
5500        pub const _1: Self = Self::new(1);
5501    }
5502    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5503    pub struct Sbwerr8_SPEC;
5504    pub type Sbwerr8 = crate::EnumBitfieldStruct<u8, Sbwerr8_SPEC>;
5505    impl Sbwerr8 {
5506        #[doc = "No bufferable write error in Slave #8"]
5507        pub const _0: Self = Self::new(0);
5508
5509        #[doc = "Bufferable write error occurs in Slave #8"]
5510        pub const _1: Self = Self::new(1);
5511    }
5512    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5513    pub struct Sbwerr9_SPEC;
5514    pub type Sbwerr9 = crate::EnumBitfieldStruct<u8, Sbwerr9_SPEC>;
5515    impl Sbwerr9 {
5516        #[doc = "No bufferable write error in Slave #9"]
5517        pub const _0: Self = Self::new(0);
5518
5519        #[doc = "Bufferable write error occurs in Slave #9"]
5520        pub const _1: Self = Self::new(1);
5521    }
5522    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5523    pub struct Sbwerr10_SPEC;
5524    pub type Sbwerr10 = crate::EnumBitfieldStruct<u8, Sbwerr10_SPEC>;
5525    impl Sbwerr10 {
5526        #[doc = "No bufferable write error in Slave #10"]
5527        pub const _0: Self = Self::new(0);
5528
5529        #[doc = "Bufferable write error occurs in Slave #10"]
5530        pub const _1: Self = Self::new(1);
5531    }
5532    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5533    pub struct Sbwerr11_SPEC;
5534    pub type Sbwerr11 = crate::EnumBitfieldStruct<u8, Sbwerr11_SPEC>;
5535    impl Sbwerr11 {
5536        #[doc = "No bufferable write error in Slave #11"]
5537        pub const _0: Self = Self::new(0);
5538
5539        #[doc = "Bufferable write error occurs in Slave #11"]
5540        pub const _1: Self = Self::new(1);
5541    }
5542    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
5543    pub struct Sbwerr12_SPEC;
5544    pub type Sbwerr12 = crate::EnumBitfieldStruct<u8, Sbwerr12_SPEC>;
5545    impl Sbwerr12 {
5546        #[doc = "No bufferable write error in Slave #12"]
5547        pub const _0: Self = Self::new(0);
5548
5549        #[doc = "Bufferable write error occurs in Slave #12"]
5550        pub const _1: Self = Self::new(1);
5551    }
5552}
5553#[doc(hidden)]
5554#[derive(Copy, Clone, Eq, PartialEq)]
5555pub struct Sbwerrclr_SPEC;
5556impl crate::sealed::RegSpec for Sbwerrclr_SPEC {
5557    type DataType = u32;
5558}
5559
5560#[doc = "Slave Bufferable Write Error Clear Register"]
5561pub type Sbwerrclr = crate::RegValueT<Sbwerrclr_SPEC>;
5562
5563impl Sbwerrclr {
5564    #[doc = "Slave Bufferable Write Error Clear"]
5565    #[inline(always)]
5566    pub fn sbweclr0(
5567        self,
5568    ) -> crate::common::RegisterFieldBool<0, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
5569        crate::common::RegisterFieldBool::<0,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
5570    }
5571
5572    #[doc = "Slave Bufferable Write Error Clear"]
5573    #[inline(always)]
5574    pub fn sbweclr1(
5575        self,
5576    ) -> crate::common::RegisterFieldBool<1, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
5577        crate::common::RegisterFieldBool::<1,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
5578    }
5579
5580    #[doc = "Slave Bufferable Write Error Clear"]
5581    #[inline(always)]
5582    pub fn sbweclr2(
5583        self,
5584    ) -> crate::common::RegisterFieldBool<2, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
5585        crate::common::RegisterFieldBool::<2,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
5586    }
5587
5588    #[doc = "Slave Bufferable Write Error Clear"]
5589    #[inline(always)]
5590    pub fn sbweclr3(
5591        self,
5592    ) -> crate::common::RegisterFieldBool<3, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
5593        crate::common::RegisterFieldBool::<3,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
5594    }
5595
5596    #[doc = "Slave Bufferable Write Error Clear"]
5597    #[inline(always)]
5598    pub fn sbweclr4(
5599        self,
5600    ) -> crate::common::RegisterFieldBool<4, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
5601        crate::common::RegisterFieldBool::<4,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
5602    }
5603
5604    #[doc = "Slave Bufferable Write Error Clear"]
5605    #[inline(always)]
5606    pub fn sbweclr5(
5607        self,
5608    ) -> crate::common::RegisterFieldBool<5, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
5609        crate::common::RegisterFieldBool::<5,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
5610    }
5611
5612    #[doc = "Slave Bufferable Write Error Clear"]
5613    #[inline(always)]
5614    pub fn sbweclr6(
5615        self,
5616    ) -> crate::common::RegisterFieldBool<6, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
5617        crate::common::RegisterFieldBool::<6,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
5618    }
5619
5620    #[doc = "Slave Bufferable Write Error Clear"]
5621    #[inline(always)]
5622    pub fn sbweclr7(
5623        self,
5624    ) -> crate::common::RegisterFieldBool<7, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
5625        crate::common::RegisterFieldBool::<7,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
5626    }
5627
5628    #[doc = "Slave Bufferable Write Error Clear"]
5629    #[inline(always)]
5630    pub fn sbweclr8(
5631        self,
5632    ) -> crate::common::RegisterFieldBool<8, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
5633        crate::common::RegisterFieldBool::<8,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
5634    }
5635
5636    #[doc = "Slave Bufferable Write Error Clear"]
5637    #[inline(always)]
5638    pub fn sbweclr9(
5639        self,
5640    ) -> crate::common::RegisterFieldBool<9, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
5641        crate::common::RegisterFieldBool::<9,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
5642    }
5643
5644    #[doc = "Slave Bufferable Write Error Clear"]
5645    #[inline(always)]
5646    pub fn sbweclr10(
5647        self,
5648    ) -> crate::common::RegisterFieldBool<10, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
5649        crate::common::RegisterFieldBool::<10,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
5650    }
5651
5652    #[doc = "Slave Bufferable Write Error Clear"]
5653    #[inline(always)]
5654    pub fn sbweclr11(
5655        self,
5656    ) -> crate::common::RegisterFieldBool<11, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
5657        crate::common::RegisterFieldBool::<11,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
5658    }
5659
5660    #[doc = "Slave Bufferable Write Error Clear"]
5661    #[inline(always)]
5662    pub fn sbweclr12(
5663        self,
5664    ) -> crate::common::RegisterFieldBool<12, 1, 0, Sbwerrclr_SPEC, crate::common::RW> {
5665        crate::common::RegisterFieldBool::<12,1,0,Sbwerrclr_SPEC,crate::common::RW>::from_register(self,0)
5666    }
5667}
5668impl ::core::default::Default for Sbwerrclr {
5669    #[inline(always)]
5670    fn default() -> Sbwerrclr {
5671        <crate::RegValueT<Sbwerrclr_SPEC> as RegisterValue<_>>::new(0)
5672    }
5673}