ra8e2_pac/
sram.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.00.01, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:54:26 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"SRAM Control"]
28unsafe impl ::core::marker::Send for super::Sram {}
29unsafe impl ::core::marker::Sync for super::Sram {}
30impl super::Sram {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "SRAM Protection Control Register for Secure"]
38    #[inline(always)]
39    pub const fn sramprcr_s(
40        &self,
41    ) -> &'static crate::common::Reg<self::SramprcrS_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::SramprcrS_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(0usize),
45            )
46        }
47    }
48
49    #[doc = "SRAM Wait State Control Register"]
50    #[inline(always)]
51    pub const fn sramwtsc(
52        &self,
53    ) -> &'static crate::common::Reg<self::Sramwtsc_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::Sramwtsc_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(8usize),
57            )
58        }
59    }
60
61    #[doc = "SRAM Control Register 1"]
62    #[inline(always)]
63    pub const fn sramcr1(
64        &self,
65    ) -> &'static crate::common::Reg<self::Sramcr1_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::Sramcr1_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(20usize),
69            )
70        }
71    }
72
73    #[doc = "SRAM Error Status Register"]
74    #[inline(always)]
75    pub const fn sramesr(
76        &self,
77    ) -> &'static crate::common::Reg<self::Sramesr_SPEC, crate::common::R> {
78        unsafe {
79            crate::common::Reg::<self::Sramesr_SPEC, crate::common::R>::from_ptr(
80                self._svd2pac_as_ptr().add(64usize),
81            )
82        }
83    }
84
85    #[doc = "SRAM Error Status Clear Register"]
86    #[inline(always)]
87    pub const fn sramesclr(
88        &self,
89    ) -> &'static crate::common::Reg<self::Sramesclr_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::Sramesclr_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(72usize),
93            )
94        }
95    }
96
97    #[doc = "SRAM Error Address Register"]
98    #[inline(always)]
99    pub const fn sramear2(
100        &self,
101    ) -> &'static crate::common::Reg<self::Sramear2_SPEC, crate::common::R> {
102        unsafe {
103            crate::common::Reg::<self::Sramear2_SPEC, crate::common::R>::from_ptr(
104                self._svd2pac_as_ptr().add(88usize),
105            )
106        }
107    }
108
109    #[doc = "Standby SRAM Control Register"]
110    #[inline(always)]
111    pub const fn stbramcr(
112        &self,
113    ) -> &'static crate::common::Reg<self::Stbramcr_SPEC, crate::common::RW> {
114        unsafe {
115            crate::common::Reg::<self::Stbramcr_SPEC, crate::common::RW>::from_ptr(
116                self._svd2pac_as_ptr().add(272usize),
117            )
118        }
119    }
120
121    #[doc = "Standby SRAM Error Address Register"]
122    #[inline(always)]
123    pub const fn stbramear(
124        &self,
125    ) -> &'static crate::common::Reg<self::Stbramear_SPEC, crate::common::R> {
126        unsafe {
127            crate::common::Reg::<self::Stbramear_SPEC, crate::common::R>::from_ptr(
128                self._svd2pac_as_ptr().add(336usize),
129            )
130        }
131    }
132}
133#[doc(hidden)]
134#[derive(Copy, Clone, Eq, PartialEq)]
135pub struct SramprcrS_SPEC;
136impl crate::sealed::RegSpec for SramprcrS_SPEC {
137    type DataType = u16;
138}
139
140#[doc = "SRAM Protection Control Register for Secure"]
141pub type SramprcrS = crate::RegValueT<SramprcrS_SPEC>;
142
143impl SramprcrS {
144    #[doc = "Register Write Control"]
145    #[inline(always)]
146    pub fn pr(
147        self,
148    ) -> crate::common::RegisterField<
149        0,
150        0x1,
151        1,
152        0,
153        sramprcr_s::Pr,
154        sramprcr_s::Pr,
155        SramprcrS_SPEC,
156        crate::common::RW,
157    > {
158        crate::common::RegisterField::<
159            0,
160            0x1,
161            1,
162            0,
163            sramprcr_s::Pr,
164            sramprcr_s::Pr,
165            SramprcrS_SPEC,
166            crate::common::RW,
167        >::from_register(self, 0)
168    }
169
170    #[doc = "Write Key Code"]
171    #[inline(always)]
172    pub fn kw(
173        self,
174    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, SramprcrS_SPEC, crate::common::RW>
175    {
176        crate::common::RegisterField::<8,0xff,1,0,u8,u8,SramprcrS_SPEC,crate::common::RW>::from_register(self,0)
177    }
178}
179impl ::core::default::Default for SramprcrS {
180    #[inline(always)]
181    fn default() -> SramprcrS {
182        <crate::RegValueT<SramprcrS_SPEC> as RegisterValue<_>>::new(0)
183    }
184}
185pub mod sramprcr_s {
186
187    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
188    pub struct Pr_SPEC;
189    pub type Pr = crate::EnumBitfieldStruct<u8, Pr_SPEC>;
190    impl Pr {
191        #[doc = "Writing to registers are disabled"]
192        pub const _0: Self = Self::new(0);
193
194        #[doc = "Writing to registers are enabled"]
195        pub const _1: Self = Self::new(1);
196    }
197}
198#[doc(hidden)]
199#[derive(Copy, Clone, Eq, PartialEq)]
200pub struct Sramwtsc_SPEC;
201impl crate::sealed::RegSpec for Sramwtsc_SPEC {
202    type DataType = u8;
203}
204
205#[doc = "SRAM Wait State Control Register"]
206pub type Sramwtsc = crate::RegValueT<Sramwtsc_SPEC>;
207
208impl Sramwtsc {
209    #[doc = "SRAM Wait Enable"]
210    #[inline(always)]
211    pub fn wten(
212        self,
213    ) -> crate::common::RegisterField<
214        0,
215        0x1,
216        1,
217        0,
218        sramwtsc::Wten,
219        sramwtsc::Wten,
220        Sramwtsc_SPEC,
221        crate::common::RW,
222    > {
223        crate::common::RegisterField::<
224            0,
225            0x1,
226            1,
227            0,
228            sramwtsc::Wten,
229            sramwtsc::Wten,
230            Sramwtsc_SPEC,
231            crate::common::RW,
232        >::from_register(self, 0)
233    }
234}
235impl ::core::default::Default for Sramwtsc {
236    #[inline(always)]
237    fn default() -> Sramwtsc {
238        <crate::RegValueT<Sramwtsc_SPEC> as RegisterValue<_>>::new(1)
239    }
240}
241pub mod sramwtsc {
242
243    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
244    pub struct Wten_SPEC;
245    pub type Wten = crate::EnumBitfieldStruct<u8, Wten_SPEC>;
246    impl Wten {
247        #[doc = "No wait"]
248        pub const _0: Self = Self::new(0);
249
250        #[doc = "Add wait state in read access cycle to SRAMs"]
251        pub const _1: Self = Self::new(1);
252    }
253}
254#[doc(hidden)]
255#[derive(Copy, Clone, Eq, PartialEq)]
256pub struct Sramcr1_SPEC;
257impl crate::sealed::RegSpec for Sramcr1_SPEC {
258    type DataType = u8;
259}
260
261#[doc = "SRAM Control Register 1"]
262pub type Sramcr1 = crate::RegValueT<Sramcr1_SPEC>;
263
264impl Sramcr1 {
265    #[doc = "Operation after Detection for Parity Error Detection"]
266    #[inline(always)]
267    pub fn oad(
268        self,
269    ) -> crate::common::RegisterField<
270        0,
271        0x1,
272        1,
273        0,
274        sramcr1::Oad,
275        sramcr1::Oad,
276        Sramcr1_SPEC,
277        crate::common::RW,
278    > {
279        crate::common::RegisterField::<
280            0,
281            0x1,
282            1,
283            0,
284            sramcr1::Oad,
285            sramcr1::Oad,
286            Sramcr1_SPEC,
287            crate::common::RW,
288        >::from_register(self, 0)
289    }
290}
291impl ::core::default::Default for Sramcr1 {
292    #[inline(always)]
293    fn default() -> Sramcr1 {
294        <crate::RegValueT<Sramcr1_SPEC> as RegisterValue<_>>::new(0)
295    }
296}
297pub mod sramcr1 {
298
299    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
300    pub struct Oad_SPEC;
301    pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
302    impl Oad {
303        #[doc = "Non-maskable interrupt"]
304        pub const _0: Self = Self::new(0);
305
306        #[doc = "Reset."]
307        pub const _1: Self = Self::new(1);
308    }
309}
310#[doc(hidden)]
311#[derive(Copy, Clone, Eq, PartialEq)]
312pub struct Sramesr_SPEC;
313impl crate::sealed::RegSpec for Sramesr_SPEC {
314    type DataType = u16;
315}
316
317#[doc = "SRAM Error Status Register"]
318pub type Sramesr = crate::RegValueT<Sramesr_SPEC>;
319
320impl Sramesr {
321    #[doc = "SRAM1 Parity Error Status"]
322    #[inline(always)]
323    pub fn err1(
324        self,
325    ) -> crate::common::RegisterField<
326        2,
327        0x1,
328        1,
329        0,
330        sramesr::Err1,
331        sramesr::Err1,
332        Sramesr_SPEC,
333        crate::common::R,
334    > {
335        crate::common::RegisterField::<
336            2,
337            0x1,
338            1,
339            0,
340            sramesr::Err1,
341            sramesr::Err1,
342            Sramesr_SPEC,
343            crate::common::R,
344        >::from_register(self, 0)
345    }
346
347    #[doc = "Standby SRAM Parity Error status"]
348    #[inline(always)]
349    pub fn errs(
350        self,
351    ) -> crate::common::RegisterField<
352        14,
353        0x1,
354        1,
355        0,
356        sramesr::Errs,
357        sramesr::Errs,
358        Sramesr_SPEC,
359        crate::common::R,
360    > {
361        crate::common::RegisterField::<
362            14,
363            0x1,
364            1,
365            0,
366            sramesr::Errs,
367            sramesr::Errs,
368            Sramesr_SPEC,
369            crate::common::R,
370        >::from_register(self, 0)
371    }
372}
373impl ::core::default::Default for Sramesr {
374    #[inline(always)]
375    fn default() -> Sramesr {
376        <crate::RegValueT<Sramesr_SPEC> as RegisterValue<_>>::new(0)
377    }
378}
379pub mod sramesr {
380
381    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
382    pub struct Err1_SPEC;
383    pub type Err1 = crate::EnumBitfieldStruct<u8, Err1_SPEC>;
384    impl Err1 {
385        #[doc = "Parity error has not occurred."]
386        pub const _0: Self = Self::new(0);
387
388        #[doc = "Parity error has occurred."]
389        pub const _1: Self = Self::new(1);
390    }
391    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
392    pub struct Errs_SPEC;
393    pub type Errs = crate::EnumBitfieldStruct<u8, Errs_SPEC>;
394    impl Errs {
395        #[doc = "Parity error has not occurred."]
396        pub const _0: Self = Self::new(0);
397
398        #[doc = "Parity error has occurred."]
399        pub const _1: Self = Self::new(1);
400    }
401}
402#[doc(hidden)]
403#[derive(Copy, Clone, Eq, PartialEq)]
404pub struct Sramesclr_SPEC;
405impl crate::sealed::RegSpec for Sramesclr_SPEC {
406    type DataType = u16;
407}
408
409#[doc = "SRAM Error Status Clear Register"]
410pub type Sramesclr = crate::RegValueT<Sramesclr_SPEC>;
411
412impl Sramesclr {
413    #[doc = "SRAM1 Parity Error Status Clear"]
414    #[inline(always)]
415    pub fn clr1(
416        self,
417    ) -> crate::common::RegisterField<
418        2,
419        0x1,
420        1,
421        0,
422        sramesclr::Clr1,
423        sramesclr::Clr1,
424        Sramesclr_SPEC,
425        crate::common::RW,
426    > {
427        crate::common::RegisterField::<
428            2,
429            0x1,
430            1,
431            0,
432            sramesclr::Clr1,
433            sramesclr::Clr1,
434            Sramesclr_SPEC,
435            crate::common::RW,
436        >::from_register(self, 0)
437    }
438
439    #[doc = "Standby SRAM Parity Error Status Clear"]
440    #[inline(always)]
441    pub fn clrs(
442        self,
443    ) -> crate::common::RegisterField<
444        14,
445        0x1,
446        1,
447        0,
448        sramesclr::Clrs,
449        sramesclr::Clrs,
450        Sramesclr_SPEC,
451        crate::common::RW,
452    > {
453        crate::common::RegisterField::<
454            14,
455            0x1,
456            1,
457            0,
458            sramesclr::Clrs,
459            sramesclr::Clrs,
460            Sramesclr_SPEC,
461            crate::common::RW,
462        >::from_register(self, 0)
463    }
464}
465impl ::core::default::Default for Sramesclr {
466    #[inline(always)]
467    fn default() -> Sramesclr {
468        <crate::RegValueT<Sramesclr_SPEC> as RegisterValue<_>>::new(0)
469    }
470}
471pub mod sramesclr {
472
473    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
474    pub struct Clr1_SPEC;
475    pub type Clr1 = crate::EnumBitfieldStruct<u8, Clr1_SPEC>;
476    impl Clr1 {
477        #[doc = "Clear Parity error."]
478        pub const _1: Self = Self::new(1);
479    }
480    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
481    pub struct Clrs_SPEC;
482    pub type Clrs = crate::EnumBitfieldStruct<u8, Clrs_SPEC>;
483    impl Clrs {
484        #[doc = "Clear Parity error."]
485        pub const _1: Self = Self::new(1);
486    }
487}
488#[doc(hidden)]
489#[derive(Copy, Clone, Eq, PartialEq)]
490pub struct Sramear2_SPEC;
491impl crate::sealed::RegSpec for Sramear2_SPEC {
492    type DataType = u32;
493}
494
495#[doc = "SRAM Error Address Register"]
496pub type Sramear2 = crate::RegValueT<Sramear2_SPEC>;
497
498impl NoBitfieldReg<Sramear2_SPEC> for Sramear2 {}
499impl ::core::default::Default for Sramear2 {
500    #[inline(always)]
501    fn default() -> Sramear2 {
502        <crate::RegValueT<Sramear2_SPEC> as RegisterValue<_>>::new(0)
503    }
504}
505
506#[doc(hidden)]
507#[derive(Copy, Clone, Eq, PartialEq)]
508pub struct Stbramcr_SPEC;
509impl crate::sealed::RegSpec for Stbramcr_SPEC {
510    type DataType = u8;
511}
512
513#[doc = "Standby SRAM Control Register"]
514pub type Stbramcr = crate::RegValueT<Stbramcr_SPEC>;
515
516impl Stbramcr {
517    #[doc = "Operation after detection"]
518    #[inline(always)]
519    pub fn oad(
520        self,
521    ) -> crate::common::RegisterField<
522        0,
523        0x1,
524        1,
525        0,
526        stbramcr::Oad,
527        stbramcr::Oad,
528        Stbramcr_SPEC,
529        crate::common::RW,
530    > {
531        crate::common::RegisterField::<
532            0,
533            0x1,
534            1,
535            0,
536            stbramcr::Oad,
537            stbramcr::Oad,
538            Stbramcr_SPEC,
539            crate::common::RW,
540        >::from_register(self, 0)
541    }
542}
543impl ::core::default::Default for Stbramcr {
544    #[inline(always)]
545    fn default() -> Stbramcr {
546        <crate::RegValueT<Stbramcr_SPEC> as RegisterValue<_>>::new(0)
547    }
548}
549pub mod stbramcr {
550
551    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
552    pub struct Oad_SPEC;
553    pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
554    impl Oad {
555        #[doc = "Non-maskable interrupt."]
556        pub const _0: Self = Self::new(0);
557
558        #[doc = "Reset."]
559        pub const _1: Self = Self::new(1);
560    }
561}
562#[doc(hidden)]
563#[derive(Copy, Clone, Eq, PartialEq)]
564pub struct Stbramear_SPEC;
565impl crate::sealed::RegSpec for Stbramear_SPEC {
566    type DataType = u32;
567}
568
569#[doc = "Standby SRAM Error Address Register"]
570pub type Stbramear = crate::RegValueT<Stbramear_SPEC>;
571
572impl NoBitfieldReg<Stbramear_SPEC> for Stbramear {}
573impl ::core::default::Default for Stbramear {
574    #[inline(always)]
575    fn default() -> Stbramear {
576        <crate::RegValueT<Stbramear_SPEC> as RegisterValue<_>>::new(0)
577    }
578}
ra8e2_pac/sram.rs

ra8e2_pac/
sram.rs
