1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - Channel Processing Status Register"]
5 pub iircprcs: IIRCPRCS,
6 #[doc = "0x04 - Channel Processing Completion Flag Register"]
7 pub iircprcff: IIRCPRCFF,
8 #[doc = "0x08 - Output Data Preparation Completion Flag Register"]
9 pub iirordyf: IIRORDYF,
10 #[doc = "0x0c - Operation Error Flag Register"]
11 pub iircerrf: IIRCERRF,
12 #[doc = "0x10 - Operation Control Register"]
13 pub iiropcnt: IIROPCNT,
14 _reserved5: [u8; 0x0c],
15 #[doc = "0x20 - ECC Control Register"]
16 pub iirecccnt: IIRECCCNT,
17 _reserved6: [u8; 0x04],
18 #[doc = "0x28 - ECC Interrupt Enable Register"]
19 pub iireccint: IIRECCINT,
20 _reserved7: [u8; 0x04],
21 #[doc = "0x30 - ECC Error Flag Register"]
22 pub iireccef: IIRECCEF,
23 #[doc = "0x34 - ECC Error Flag Clear Register"]
24 pub iireccefclr: IIRECCEFCLR,
25 #[doc = "0x38 - ECC 1-bit Error Address Register"]
26 pub iireseadr: IIRESEADR,
27 #[doc = "0x3c - ECC 2-bit Error Address Register"]
28 pub iiredeadr: IIREDEADR,
29 _reserved11: [u8; 0xc0],
30 #[doc = "0x100 - Channel %s Input Register"]
31 pub iirch0inp: IIRCHINP,
32 #[doc = "0x104 - Channel %s Output Register"]
33 pub iirch0out: IIRCHOUT,
34 #[doc = "0x108 - Channel %s Control Register"]
35 pub iirch0cnt: IIRCHCNT,
36 #[doc = "0x10c - Channel %s Interrupt Enable Register"]
37 pub iirch0int: IIRCHINT,
38 #[doc = "0x10d - Channel %s Status Register"]
39 pub iirch0sts: IIRCHSTS,
40 #[doc = "0x10e - Channel %s Flag Clear Register"]
41 pub iirch0fclr: IIRCHFCLR,
42 _reserved17: [u8; 0x01],
43 #[doc = "0x110 - Channel %s Input Register"]
44 pub iirch1inp: IIRCHINP,
45 #[doc = "0x114 - Channel %s Output Register"]
46 pub iirch1out: IIRCHOUT,
47 #[doc = "0x118 - Channel %s Control Register"]
48 pub iirch1cnt: IIRCHCNT,
49 #[doc = "0x11c - Channel %s Interrupt Enable Register"]
50 pub iirch1int: IIRCHINT,
51 #[doc = "0x11d - Channel %s Status Register"]
52 pub iirch1sts: IIRCHSTS,
53 #[doc = "0x11e - Channel %s Flag Clear Register"]
54 pub iirch1fclr: IIRCHFCLR,
55 _reserved23: [u8; 0x01],
56 #[doc = "0x120 - Channel %s Input Register"]
57 pub iirch2inp: IIRCHINP,
58 #[doc = "0x124 - Channel %s Output Register"]
59 pub iirch2out: IIRCHOUT,
60 #[doc = "0x128 - Channel %s Control Register"]
61 pub iirch2cnt: IIRCHCNT,
62 #[doc = "0x12c - Channel %s Interrupt Enable Register"]
63 pub iirch2int: IIRCHINT,
64 #[doc = "0x12d - Channel %s Status Register"]
65 pub iirch2sts: IIRCHSTS,
66 #[doc = "0x12e - Channel %s Flag Clear Register"]
67 pub iirch2fclr: IIRCHFCLR,
68 _reserved29: [u8; 0x01],
69 #[doc = "0x130 - Channel %s Input Register"]
70 pub iirch3inp: IIRCHINP,
71 #[doc = "0x134 - Channel %s Output Register"]
72 pub iirch3out: IIRCHOUT,
73 #[doc = "0x138 - Channel %s Control Register"]
74 pub iirch3cnt: IIRCHCNT,
75 #[doc = "0x13c - Channel %s Interrupt Enable Register"]
76 pub iirch3int: IIRCHINT,
77 #[doc = "0x13d - Channel %s Status Register"]
78 pub iirch3sts: IIRCHSTS,
79 #[doc = "0x13e - Channel %s Flag Clear Register"]
80 pub iirch3fclr: IIRCHFCLR,
81 _reserved35: [u8; 0x01],
82 #[doc = "0x140 - Channel %s Input Register"]
83 pub iirch4inp: IIRCHINP,
84 #[doc = "0x144 - Channel %s Output Register"]
85 pub iirch4out: IIRCHOUT,
86 #[doc = "0x148 - Channel %s Control Register"]
87 pub iirch4cnt: IIRCHCNT,
88 #[doc = "0x14c - Channel %s Interrupt Enable Register"]
89 pub iirch4int: IIRCHINT,
90 #[doc = "0x14d - Channel %s Status Register"]
91 pub iirch4sts: IIRCHSTS,
92 #[doc = "0x14e - Channel %s Flag Clear Register"]
93 pub iirch4fclr: IIRCHFCLR,
94 _reserved41: [u8; 0x01],
95 #[doc = "0x150 - Channel %s Input Register"]
96 pub iirch5inp: IIRCHINP,
97 #[doc = "0x154 - Channel %s Output Register"]
98 pub iirch5out: IIRCHOUT,
99 #[doc = "0x158 - Channel %s Control Register"]
100 pub iirch5cnt: IIRCHCNT,
101 #[doc = "0x15c - Channel %s Interrupt Enable Register"]
102 pub iirch5int: IIRCHINT,
103 #[doc = "0x15d - Channel %s Status Register"]
104 pub iirch5sts: IIRCHSTS,
105 #[doc = "0x15e - Channel %s Flag Clear Register"]
106 pub iirch5fclr: IIRCHFCLR,
107 _reserved47: [u8; 0x01],
108 #[doc = "0x160 - Channel %s Input Register"]
109 pub iirch6inp: IIRCHINP,
110 #[doc = "0x164 - Channel %s Output Register"]
111 pub iirch6out: IIRCHOUT,
112 #[doc = "0x168 - Channel %s Control Register"]
113 pub iirch6cnt: IIRCHCNT,
114 #[doc = "0x16c - Channel %s Interrupt Enable Register"]
115 pub iirch6int: IIRCHINT,
116 #[doc = "0x16d - Channel %s Status Register"]
117 pub iirch6sts: IIRCHSTS,
118 #[doc = "0x16e - Channel %s Flag Clear Register"]
119 pub iirch6fclr: IIRCHFCLR,
120 _reserved53: [u8; 0x01],
121 #[doc = "0x170 - Channel %s Input Register"]
122 pub iirch7inp: IIRCHINP,
123 #[doc = "0x174 - Channel %s Output Register"]
124 pub iirch7out: IIRCHOUT,
125 #[doc = "0x178 - Channel %s Control Register"]
126 pub iirch7cnt: IIRCHCNT,
127 #[doc = "0x17c - Channel %s Interrupt Enable Register"]
128 pub iirch7int: IIRCHINT,
129 #[doc = "0x17d - Channel %s Status Register"]
130 pub iirch7sts: IIRCHSTS,
131 #[doc = "0x17e - Channel %s Flag Clear Register"]
132 pub iirch7fclr: IIRCHFCLR,
133 _reserved59: [u8; 0x01],
134 #[doc = "0x180 - Channel %s Input Register"]
135 pub iirch8inp: IIRCHINP,
136 #[doc = "0x184 - Channel %s Output Register"]
137 pub iirch8out: IIRCHOUT,
138 #[doc = "0x188 - Channel %s Control Register"]
139 pub iirch8cnt: IIRCHCNT,
140 #[doc = "0x18c - Channel %s Interrupt Enable Register"]
141 pub iirch8int: IIRCHINT,
142 #[doc = "0x18d - Channel %s Status Register"]
143 pub iirch8sts: IIRCHSTS,
144 #[doc = "0x18e - Channel %s Flag Clear Register"]
145 pub iirch8fclr: IIRCHFCLR,
146 _reserved65: [u8; 0x01],
147 #[doc = "0x190 - Channel %s Input Register"]
148 pub iirch9inp: IIRCHINP,
149 #[doc = "0x194 - Channel %s Output Register"]
150 pub iirch9out: IIRCHOUT,
151 #[doc = "0x198 - Channel %s Control Register"]
152 pub iirch9cnt: IIRCHCNT,
153 #[doc = "0x19c - Channel %s Interrupt Enable Register"]
154 pub iirch9int: IIRCHINT,
155 #[doc = "0x19d - Channel %s Status Register"]
156 pub iirch9sts: IIRCHSTS,
157 #[doc = "0x19e - Channel %s Flag Clear Register"]
158 pub iirch9fclr: IIRCHFCLR,
159 _reserved71: [u8; 0x01],
160 #[doc = "0x1a0 - Channel %s Input Register"]
161 pub iirch10inp: IIRCHINP,
162 #[doc = "0x1a4 - Channel %s Output Register"]
163 pub iirch10out: IIRCHOUT,
164 #[doc = "0x1a8 - Channel %s Control Register"]
165 pub iirch10cnt: IIRCHCNT,
166 #[doc = "0x1ac - Channel %s Interrupt Enable Register"]
167 pub iirch10int: IIRCHINT,
168 #[doc = "0x1ad - Channel %s Status Register"]
169 pub iirch10sts: IIRCHSTS,
170 #[doc = "0x1ae - Channel %s Flag Clear Register"]
171 pub iirch10fclr: IIRCHFCLR,
172 _reserved77: [u8; 0x01],
173 #[doc = "0x1b0 - Channel %s Input Register"]
174 pub iirch11inp: IIRCHINP,
175 #[doc = "0x1b4 - Channel %s Output Register"]
176 pub iirch11out: IIRCHOUT,
177 #[doc = "0x1b8 - Channel %s Control Register"]
178 pub iirch11cnt: IIRCHCNT,
179 #[doc = "0x1bc - Channel %s Interrupt Enable Register"]
180 pub iirch11int: IIRCHINT,
181 #[doc = "0x1bd - Channel %s Status Register"]
182 pub iirch11sts: IIRCHSTS,
183 #[doc = "0x1be - Channel %s Flag Clear Register"]
184 pub iirch11fclr: IIRCHFCLR,
185 _reserved83: [u8; 0x01],
186 #[doc = "0x1c0 - Channel %s Input Register"]
187 pub iirch12inp: IIRCHINP,
188 #[doc = "0x1c4 - Channel %s Output Register"]
189 pub iirch12out: IIRCHOUT,
190 #[doc = "0x1c8 - Channel %s Control Register"]
191 pub iirch12cnt: IIRCHCNT,
192 #[doc = "0x1cc - Channel %s Interrupt Enable Register"]
193 pub iirch12int: IIRCHINT,
194 #[doc = "0x1cd - Channel %s Status Register"]
195 pub iirch12sts: IIRCHSTS,
196 #[doc = "0x1ce - Channel %s Flag Clear Register"]
197 pub iirch12fclr: IIRCHFCLR,
198 _reserved89: [u8; 0x01],
199 #[doc = "0x1d0 - Channel %s Input Register"]
200 pub iirch13inp: IIRCHINP,
201 #[doc = "0x1d4 - Channel %s Output Register"]
202 pub iirch13out: IIRCHOUT,
203 #[doc = "0x1d8 - Channel %s Control Register"]
204 pub iirch13cnt: IIRCHCNT,
205 #[doc = "0x1dc - Channel %s Interrupt Enable Register"]
206 pub iirch13int: IIRCHINT,
207 #[doc = "0x1dd - Channel %s Status Register"]
208 pub iirch13sts: IIRCHSTS,
209 #[doc = "0x1de - Channel %s Flag Clear Register"]
210 pub iirch13fclr: IIRCHFCLR,
211 _reserved95: [u8; 0x01],
212 #[doc = "0x1e0 - Channel %s Input Register"]
213 pub iirch14inp: IIRCHINP,
214 #[doc = "0x1e4 - Channel %s Output Register"]
215 pub iirch14out: IIRCHOUT,
216 #[doc = "0x1e8 - Channel %s Control Register"]
217 pub iirch14cnt: IIRCHCNT,
218 #[doc = "0x1ec - Channel %s Interrupt Enable Register"]
219 pub iirch14int: IIRCHINT,
220 #[doc = "0x1ed - Channel %s Status Register"]
221 pub iirch14sts: IIRCHSTS,
222 #[doc = "0x1ee - Channel %s Flag Clear Register"]
223 pub iirch14fclr: IIRCHFCLR,
224 _reserved101: [u8; 0x01],
225 #[doc = "0x1f0 - Channel %s Input Register"]
226 pub iirch15inp: IIRCHINP,
227 #[doc = "0x1f4 - Channel %s Output Register"]
228 pub iirch15out: IIRCHOUT,
229 #[doc = "0x1f8 - Channel %s Control Register"]
230 pub iirch15cnt: IIRCHCNT,
231 #[doc = "0x1fc - Channel %s Interrupt Enable Register"]
232 pub iirch15int: IIRCHINT,
233 #[doc = "0x1fd - Channel %s Status Register"]
234 pub iirch15sts: IIRCHSTS,
235 #[doc = "0x1fe - Channel %s Flag Clear Register"]
236 pub iirch15fclr: IIRCHFCLR,
237 _reserved107: [u8; 0x0201],
238 #[doc = "0x400 - Stage %s Coefficient b0 Register"]
239 pub iirstg0b0: IIRSTGB0,
240 #[doc = "0x404 - Stage %s Coefficient b1 Register"]
241 pub iirstg0b1: IIRSTGB1,
242 #[doc = "0x408 - Stage %s Coefficient b2 Register"]
243 pub iirstg0b2: IIRSTGB2,
244 #[doc = "0x40c - Stage %s Coefficient a1 Register"]
245 pub iirstg0a1: IIRSTGA1,
246 #[doc = "0x410 - Stage %s Coefficient a2 Register"]
247 pub iirstg0a2: IIRSTGA2,
248 #[doc = "0x414 - Stage %s Delay Data D0 Register"]
249 pub iirstg0d0: IIRSTGD0,
250 #[doc = "0x418 - Stage %s Delay Data D1 Register"]
251 pub iirstg0d1: IIRSTGD1,
252 _reserved114: [u8; 0x04],
253 #[doc = "0x420 - Stage %s Coefficient b0 Register"]
254 pub iirstg1b0: IIRSTGB0,
255 #[doc = "0x424 - Stage %s Coefficient b1 Register"]
256 pub iirstg1b1: IIRSTGB1,
257 #[doc = "0x428 - Stage %s Coefficient b2 Register"]
258 pub iirstg1b2: IIRSTGB2,
259 #[doc = "0x42c - Stage %s Coefficient a1 Register"]
260 pub iirstg1a1: IIRSTGA1,
261 #[doc = "0x430 - Stage %s Coefficient a2 Register"]
262 pub iirstg1a2: IIRSTGA2,
263 #[doc = "0x434 - Stage %s Delay Data D0 Register"]
264 pub iirstg1d0: IIRSTGD0,
265 #[doc = "0x438 - Stage %s Delay Data D1 Register"]
266 pub iirstg1d1: IIRSTGD1,
267 _reserved121: [u8; 0x04],
268 #[doc = "0x440 - Stage %s Coefficient b0 Register"]
269 pub iirstg2b0: IIRSTGB0,
270 #[doc = "0x444 - Stage %s Coefficient b1 Register"]
271 pub iirstg2b1: IIRSTGB1,
272 #[doc = "0x448 - Stage %s Coefficient b2 Register"]
273 pub iirstg2b2: IIRSTGB2,
274 #[doc = "0x44c - Stage %s Coefficient a1 Register"]
275 pub iirstg2a1: IIRSTGA1,
276 #[doc = "0x450 - Stage %s Coefficient a2 Register"]
277 pub iirstg2a2: IIRSTGA2,
278 #[doc = "0x454 - Stage %s Delay Data D0 Register"]
279 pub iirstg2d0: IIRSTGD0,
280 #[doc = "0x458 - Stage %s Delay Data D1 Register"]
281 pub iirstg2d1: IIRSTGD1,
282 _reserved128: [u8; 0x04],
283 #[doc = "0x460 - Stage %s Coefficient b0 Register"]
284 pub iirstg3b0: IIRSTGB0,
285 #[doc = "0x464 - Stage %s Coefficient b1 Register"]
286 pub iirstg3b1: IIRSTGB1,
287 #[doc = "0x468 - Stage %s Coefficient b2 Register"]
288 pub iirstg3b2: IIRSTGB2,
289 #[doc = "0x46c - Stage %s Coefficient a1 Register"]
290 pub iirstg3a1: IIRSTGA1,
291 #[doc = "0x470 - Stage %s Coefficient a2 Register"]
292 pub iirstg3a2: IIRSTGA2,
293 #[doc = "0x474 - Stage %s Delay Data D0 Register"]
294 pub iirstg3d0: IIRSTGD0,
295 #[doc = "0x478 - Stage %s Delay Data D1 Register"]
296 pub iirstg3d1: IIRSTGD1,
297 _reserved135: [u8; 0x04],
298 #[doc = "0x480 - Stage %s Coefficient b0 Register"]
299 pub iirstg4b0: IIRSTGB0,
300 #[doc = "0x484 - Stage %s Coefficient b1 Register"]
301 pub iirstg4b1: IIRSTGB1,
302 #[doc = "0x488 - Stage %s Coefficient b2 Register"]
303 pub iirstg4b2: IIRSTGB2,
304 #[doc = "0x48c - Stage %s Coefficient a1 Register"]
305 pub iirstg4a1: IIRSTGA1,
306 #[doc = "0x490 - Stage %s Coefficient a2 Register"]
307 pub iirstg4a2: IIRSTGA2,
308 #[doc = "0x494 - Stage %s Delay Data D0 Register"]
309 pub iirstg4d0: IIRSTGD0,
310 #[doc = "0x498 - Stage %s Delay Data D1 Register"]
311 pub iirstg4d1: IIRSTGD1,
312 _reserved142: [u8; 0x04],
313 #[doc = "0x4a0 - Stage %s Coefficient b0 Register"]
314 pub iirstg5b0: IIRSTGB0,
315 #[doc = "0x4a4 - Stage %s Coefficient b1 Register"]
316 pub iirstg5b1: IIRSTGB1,
317 #[doc = "0x4a8 - Stage %s Coefficient b2 Register"]
318 pub iirstg5b2: IIRSTGB2,
319 #[doc = "0x4ac - Stage %s Coefficient a1 Register"]
320 pub iirstg5a1: IIRSTGA1,
321 #[doc = "0x4b0 - Stage %s Coefficient a2 Register"]
322 pub iirstg5a2: IIRSTGA2,
323 #[doc = "0x4b4 - Stage %s Delay Data D0 Register"]
324 pub iirstg5d0: IIRSTGD0,
325 #[doc = "0x4b8 - Stage %s Delay Data D1 Register"]
326 pub iirstg5d1: IIRSTGD1,
327 _reserved149: [u8; 0x04],
328 #[doc = "0x4c0 - Stage %s Coefficient b0 Register"]
329 pub iirstg6b0: IIRSTGB0,
330 #[doc = "0x4c4 - Stage %s Coefficient b1 Register"]
331 pub iirstg6b1: IIRSTGB1,
332 #[doc = "0x4c8 - Stage %s Coefficient b2 Register"]
333 pub iirstg6b2: IIRSTGB2,
334 #[doc = "0x4cc - Stage %s Coefficient a1 Register"]
335 pub iirstg6a1: IIRSTGA1,
336 #[doc = "0x4d0 - Stage %s Coefficient a2 Register"]
337 pub iirstg6a2: IIRSTGA2,
338 #[doc = "0x4d4 - Stage %s Delay Data D0 Register"]
339 pub iirstg6d0: IIRSTGD0,
340 #[doc = "0x4d8 - Stage %s Delay Data D1 Register"]
341 pub iirstg6d1: IIRSTGD1,
342 _reserved156: [u8; 0x04],
343 #[doc = "0x4e0 - Stage %s Coefficient b0 Register"]
344 pub iirstg7b0: IIRSTGB0,
345 #[doc = "0x4e4 - Stage %s Coefficient b1 Register"]
346 pub iirstg7b1: IIRSTGB1,
347 #[doc = "0x4e8 - Stage %s Coefficient b2 Register"]
348 pub iirstg7b2: IIRSTGB2,
349 #[doc = "0x4ec - Stage %s Coefficient a1 Register"]
350 pub iirstg7a1: IIRSTGA1,
351 #[doc = "0x4f0 - Stage %s Coefficient a2 Register"]
352 pub iirstg7a2: IIRSTGA2,
353 #[doc = "0x4f4 - Stage %s Delay Data D0 Register"]
354 pub iirstg7d0: IIRSTGD0,
355 #[doc = "0x4f8 - Stage %s Delay Data D1 Register"]
356 pub iirstg7d1: IIRSTGD1,
357 _reserved163: [u8; 0x04],
358 #[doc = "0x500 - Stage %s Coefficient b0 Register"]
359 pub iirstg8b0: IIRSTGB0,
360 #[doc = "0x504 - Stage %s Coefficient b1 Register"]
361 pub iirstg8b1: IIRSTGB1,
362 #[doc = "0x508 - Stage %s Coefficient b2 Register"]
363 pub iirstg8b2: IIRSTGB2,
364 #[doc = "0x50c - Stage %s Coefficient a1 Register"]
365 pub iirstg8a1: IIRSTGA1,
366 #[doc = "0x510 - Stage %s Coefficient a2 Register"]
367 pub iirstg8a2: IIRSTGA2,
368 #[doc = "0x514 - Stage %s Delay Data D0 Register"]
369 pub iirstg8d0: IIRSTGD0,
370 #[doc = "0x518 - Stage %s Delay Data D1 Register"]
371 pub iirstg8d1: IIRSTGD1,
372 _reserved170: [u8; 0x04],
373 #[doc = "0x520 - Stage %s Coefficient b0 Register"]
374 pub iirstg9b0: IIRSTGB0,
375 #[doc = "0x524 - Stage %s Coefficient b1 Register"]
376 pub iirstg9b1: IIRSTGB1,
377 #[doc = "0x528 - Stage %s Coefficient b2 Register"]
378 pub iirstg9b2: IIRSTGB2,
379 #[doc = "0x52c - Stage %s Coefficient a1 Register"]
380 pub iirstg9a1: IIRSTGA1,
381 #[doc = "0x530 - Stage %s Coefficient a2 Register"]
382 pub iirstg9a2: IIRSTGA2,
383 #[doc = "0x534 - Stage %s Delay Data D0 Register"]
384 pub iirstg9d0: IIRSTGD0,
385 #[doc = "0x538 - Stage %s Delay Data D1 Register"]
386 pub iirstg9d1: IIRSTGD1,
387 _reserved177: [u8; 0x04],
388 #[doc = "0x540 - Stage %s Coefficient b0 Register"]
389 pub iirstg10b0: IIRSTGB0,
390 #[doc = "0x544 - Stage %s Coefficient b1 Register"]
391 pub iirstg10b1: IIRSTGB1,
392 #[doc = "0x548 - Stage %s Coefficient b2 Register"]
393 pub iirstg10b2: IIRSTGB2,
394 #[doc = "0x54c - Stage %s Coefficient a1 Register"]
395 pub iirstg10a1: IIRSTGA1,
396 #[doc = "0x550 - Stage %s Coefficient a2 Register"]
397 pub iirstg10a2: IIRSTGA2,
398 #[doc = "0x554 - Stage %s Delay Data D0 Register"]
399 pub iirstg10d0: IIRSTGD0,
400 #[doc = "0x558 - Stage %s Delay Data D1 Register"]
401 pub iirstg10d1: IIRSTGD1,
402 _reserved184: [u8; 0x04],
403 #[doc = "0x560 - Stage %s Coefficient b0 Register"]
404 pub iirstg11b0: IIRSTGB0,
405 #[doc = "0x564 - Stage %s Coefficient b1 Register"]
406 pub iirstg11b1: IIRSTGB1,
407 #[doc = "0x568 - Stage %s Coefficient b2 Register"]
408 pub iirstg11b2: IIRSTGB2,
409 #[doc = "0x56c - Stage %s Coefficient a1 Register"]
410 pub iirstg11a1: IIRSTGA1,
411 #[doc = "0x570 - Stage %s Coefficient a2 Register"]
412 pub iirstg11a2: IIRSTGA2,
413 #[doc = "0x574 - Stage %s Delay Data D0 Register"]
414 pub iirstg11d0: IIRSTGD0,
415 #[doc = "0x578 - Stage %s Delay Data D1 Register"]
416 pub iirstg11d1: IIRSTGD1,
417 _reserved191: [u8; 0x04],
418 #[doc = "0x580 - Stage %s Coefficient b0 Register"]
419 pub iirstg12b0: IIRSTGB0,
420 #[doc = "0x584 - Stage %s Coefficient b1 Register"]
421 pub iirstg12b1: IIRSTGB1,
422 #[doc = "0x588 - Stage %s Coefficient b2 Register"]
423 pub iirstg12b2: IIRSTGB2,
424 #[doc = "0x58c - Stage %s Coefficient a1 Register"]
425 pub iirstg12a1: IIRSTGA1,
426 #[doc = "0x590 - Stage %s Coefficient a2 Register"]
427 pub iirstg12a2: IIRSTGA2,
428 #[doc = "0x594 - Stage %s Delay Data D0 Register"]
429 pub iirstg12d0: IIRSTGD0,
430 #[doc = "0x598 - Stage %s Delay Data D1 Register"]
431 pub iirstg12d1: IIRSTGD1,
432 _reserved198: [u8; 0x04],
433 #[doc = "0x5a0 - Stage %s Coefficient b0 Register"]
434 pub iirstg13b0: IIRSTGB0,
435 #[doc = "0x5a4 - Stage %s Coefficient b1 Register"]
436 pub iirstg13b1: IIRSTGB1,
437 #[doc = "0x5a8 - Stage %s Coefficient b2 Register"]
438 pub iirstg13b2: IIRSTGB2,
439 #[doc = "0x5ac - Stage %s Coefficient a1 Register"]
440 pub iirstg13a1: IIRSTGA1,
441 #[doc = "0x5b0 - Stage %s Coefficient a2 Register"]
442 pub iirstg13a2: IIRSTGA2,
443 #[doc = "0x5b4 - Stage %s Delay Data D0 Register"]
444 pub iirstg13d0: IIRSTGD0,
445 #[doc = "0x5b8 - Stage %s Delay Data D1 Register"]
446 pub iirstg13d1: IIRSTGD1,
447 _reserved205: [u8; 0x04],
448 #[doc = "0x5c0 - Stage %s Coefficient b0 Register"]
449 pub iirstg14b0: IIRSTGB0,
450 #[doc = "0x5c4 - Stage %s Coefficient b1 Register"]
451 pub iirstg14b1: IIRSTGB1,
452 #[doc = "0x5c8 - Stage %s Coefficient b2 Register"]
453 pub iirstg14b2: IIRSTGB2,
454 #[doc = "0x5cc - Stage %s Coefficient a1 Register"]
455 pub iirstg14a1: IIRSTGA1,
456 #[doc = "0x5d0 - Stage %s Coefficient a2 Register"]
457 pub iirstg14a2: IIRSTGA2,
458 #[doc = "0x5d4 - Stage %s Delay Data D0 Register"]
459 pub iirstg14d0: IIRSTGD0,
460 #[doc = "0x5d8 - Stage %s Delay Data D1 Register"]
461 pub iirstg14d1: IIRSTGD1,
462 _reserved212: [u8; 0x04],
463 #[doc = "0x5e0 - Stage %s Coefficient b0 Register"]
464 pub iirstg15b0: IIRSTGB0,
465 #[doc = "0x5e4 - Stage %s Coefficient b1 Register"]
466 pub iirstg15b1: IIRSTGB1,
467 #[doc = "0x5e8 - Stage %s Coefficient b2 Register"]
468 pub iirstg15b2: IIRSTGB2,
469 #[doc = "0x5ec - Stage %s Coefficient a1 Register"]
470 pub iirstg15a1: IIRSTGA1,
471 #[doc = "0x5f0 - Stage %s Coefficient a2 Register"]
472 pub iirstg15a2: IIRSTGA2,
473 #[doc = "0x5f4 - Stage %s Delay Data D0 Register"]
474 pub iirstg15d0: IIRSTGD0,
475 #[doc = "0x5f8 - Stage %s Delay Data D1 Register"]
476 pub iirstg15d1: IIRSTGD1,
477 _reserved219: [u8; 0x04],
478 #[doc = "0x600 - Stage %s Coefficient b0 Register"]
479 pub iirstg16b0: IIRSTGB0,
480 #[doc = "0x604 - Stage %s Coefficient b1 Register"]
481 pub iirstg16b1: IIRSTGB1,
482 #[doc = "0x608 - Stage %s Coefficient b2 Register"]
483 pub iirstg16b2: IIRSTGB2,
484 #[doc = "0x60c - Stage %s Coefficient a1 Register"]
485 pub iirstg16a1: IIRSTGA1,
486 #[doc = "0x610 - Stage %s Coefficient a2 Register"]
487 pub iirstg16a2: IIRSTGA2,
488 #[doc = "0x614 - Stage %s Delay Data D0 Register"]
489 pub iirstg16d0: IIRSTGD0,
490 #[doc = "0x618 - Stage %s Delay Data D1 Register"]
491 pub iirstg16d1: IIRSTGD1,
492 _reserved226: [u8; 0x04],
493 #[doc = "0x620 - Stage %s Coefficient b0 Register"]
494 pub iirstg17b0: IIRSTGB0,
495 #[doc = "0x624 - Stage %s Coefficient b1 Register"]
496 pub iirstg17b1: IIRSTGB1,
497 #[doc = "0x628 - Stage %s Coefficient b2 Register"]
498 pub iirstg17b2: IIRSTGB2,
499 #[doc = "0x62c - Stage %s Coefficient a1 Register"]
500 pub iirstg17a1: IIRSTGA1,
501 #[doc = "0x630 - Stage %s Coefficient a2 Register"]
502 pub iirstg17a2: IIRSTGA2,
503 #[doc = "0x634 - Stage %s Delay Data D0 Register"]
504 pub iirstg17d0: IIRSTGD0,
505 #[doc = "0x638 - Stage %s Delay Data D1 Register"]
506 pub iirstg17d1: IIRSTGD1,
507 _reserved233: [u8; 0x04],
508 #[doc = "0x640 - Stage %s Coefficient b0 Register"]
509 pub iirstg18b0: IIRSTGB0,
510 #[doc = "0x644 - Stage %s Coefficient b1 Register"]
511 pub iirstg18b1: IIRSTGB1,
512 #[doc = "0x648 - Stage %s Coefficient b2 Register"]
513 pub iirstg18b2: IIRSTGB2,
514 #[doc = "0x64c - Stage %s Coefficient a1 Register"]
515 pub iirstg18a1: IIRSTGA1,
516 #[doc = "0x650 - Stage %s Coefficient a2 Register"]
517 pub iirstg18a2: IIRSTGA2,
518 #[doc = "0x654 - Stage %s Delay Data D0 Register"]
519 pub iirstg18d0: IIRSTGD0,
520 #[doc = "0x658 - Stage %s Delay Data D1 Register"]
521 pub iirstg18d1: IIRSTGD1,
522 _reserved240: [u8; 0x04],
523 #[doc = "0x660 - Stage %s Coefficient b0 Register"]
524 pub iirstg19b0: IIRSTGB0,
525 #[doc = "0x664 - Stage %s Coefficient b1 Register"]
526 pub iirstg19b1: IIRSTGB1,
527 #[doc = "0x668 - Stage %s Coefficient b2 Register"]
528 pub iirstg19b2: IIRSTGB2,
529 #[doc = "0x66c - Stage %s Coefficient a1 Register"]
530 pub iirstg19a1: IIRSTGA1,
531 #[doc = "0x670 - Stage %s Coefficient a2 Register"]
532 pub iirstg19a2: IIRSTGA2,
533 #[doc = "0x674 - Stage %s Delay Data D0 Register"]
534 pub iirstg19d0: IIRSTGD0,
535 #[doc = "0x678 - Stage %s Delay Data D1 Register"]
536 pub iirstg19d1: IIRSTGD1,
537 _reserved247: [u8; 0x04],
538 #[doc = "0x680 - Stage %s Coefficient b0 Register"]
539 pub iirstg20b0: IIRSTGB0,
540 #[doc = "0x684 - Stage %s Coefficient b1 Register"]
541 pub iirstg20b1: IIRSTGB1,
542 #[doc = "0x688 - Stage %s Coefficient b2 Register"]
543 pub iirstg20b2: IIRSTGB2,
544 #[doc = "0x68c - Stage %s Coefficient a1 Register"]
545 pub iirstg20a1: IIRSTGA1,
546 #[doc = "0x690 - Stage %s Coefficient a2 Register"]
547 pub iirstg20a2: IIRSTGA2,
548 #[doc = "0x694 - Stage %s Delay Data D0 Register"]
549 pub iirstg20d0: IIRSTGD0,
550 #[doc = "0x698 - Stage %s Delay Data D1 Register"]
551 pub iirstg20d1: IIRSTGD1,
552 _reserved254: [u8; 0x04],
553 #[doc = "0x6a0 - Stage %s Coefficient b0 Register"]
554 pub iirstg21b0: IIRSTGB0,
555 #[doc = "0x6a4 - Stage %s Coefficient b1 Register"]
556 pub iirstg21b1: IIRSTGB1,
557 #[doc = "0x6a8 - Stage %s Coefficient b2 Register"]
558 pub iirstg21b2: IIRSTGB2,
559 #[doc = "0x6ac - Stage %s Coefficient a1 Register"]
560 pub iirstg21a1: IIRSTGA1,
561 #[doc = "0x6b0 - Stage %s Coefficient a2 Register"]
562 pub iirstg21a2: IIRSTGA2,
563 #[doc = "0x6b4 - Stage %s Delay Data D0 Register"]
564 pub iirstg21d0: IIRSTGD0,
565 #[doc = "0x6b8 - Stage %s Delay Data D1 Register"]
566 pub iirstg21d1: IIRSTGD1,
567 _reserved261: [u8; 0x04],
568 #[doc = "0x6c0 - Stage %s Coefficient b0 Register"]
569 pub iirstg22b0: IIRSTGB0,
570 #[doc = "0x6c4 - Stage %s Coefficient b1 Register"]
571 pub iirstg22b1: IIRSTGB1,
572 #[doc = "0x6c8 - Stage %s Coefficient b2 Register"]
573 pub iirstg22b2: IIRSTGB2,
574 #[doc = "0x6cc - Stage %s Coefficient a1 Register"]
575 pub iirstg22a1: IIRSTGA1,
576 #[doc = "0x6d0 - Stage %s Coefficient a2 Register"]
577 pub iirstg22a2: IIRSTGA2,
578 #[doc = "0x6d4 - Stage %s Delay Data D0 Register"]
579 pub iirstg22d0: IIRSTGD0,
580 #[doc = "0x6d8 - Stage %s Delay Data D1 Register"]
581 pub iirstg22d1: IIRSTGD1,
582 _reserved268: [u8; 0x04],
583 #[doc = "0x6e0 - Stage %s Coefficient b0 Register"]
584 pub iirstg23b0: IIRSTGB0,
585 #[doc = "0x6e4 - Stage %s Coefficient b1 Register"]
586 pub iirstg23b1: IIRSTGB1,
587 #[doc = "0x6e8 - Stage %s Coefficient b2 Register"]
588 pub iirstg23b2: IIRSTGB2,
589 #[doc = "0x6ec - Stage %s Coefficient a1 Register"]
590 pub iirstg23a1: IIRSTGA1,
591 #[doc = "0x6f0 - Stage %s Coefficient a2 Register"]
592 pub iirstg23a2: IIRSTGA2,
593 #[doc = "0x6f4 - Stage %s Delay Data D0 Register"]
594 pub iirstg23d0: IIRSTGD0,
595 #[doc = "0x6f8 - Stage %s Delay Data D1 Register"]
596 pub iirstg23d1: IIRSTGD1,
597 _reserved275: [u8; 0x04],
598 #[doc = "0x700 - Stage %s Coefficient b0 Register"]
599 pub iirstg24b0: IIRSTGB0,
600 #[doc = "0x704 - Stage %s Coefficient b1 Register"]
601 pub iirstg24b1: IIRSTGB1,
602 #[doc = "0x708 - Stage %s Coefficient b2 Register"]
603 pub iirstg24b2: IIRSTGB2,
604 #[doc = "0x70c - Stage %s Coefficient a1 Register"]
605 pub iirstg24a1: IIRSTGA1,
606 #[doc = "0x710 - Stage %s Coefficient a2 Register"]
607 pub iirstg24a2: IIRSTGA2,
608 #[doc = "0x714 - Stage %s Delay Data D0 Register"]
609 pub iirstg24d0: IIRSTGD0,
610 #[doc = "0x718 - Stage %s Delay Data D1 Register"]
611 pub iirstg24d1: IIRSTGD1,
612 _reserved282: [u8; 0x04],
613 #[doc = "0x720 - Stage %s Coefficient b0 Register"]
614 pub iirstg25b0: IIRSTGB0,
615 #[doc = "0x724 - Stage %s Coefficient b1 Register"]
616 pub iirstg25b1: IIRSTGB1,
617 #[doc = "0x728 - Stage %s Coefficient b2 Register"]
618 pub iirstg25b2: IIRSTGB2,
619 #[doc = "0x72c - Stage %s Coefficient a1 Register"]
620 pub iirstg25a1: IIRSTGA1,
621 #[doc = "0x730 - Stage %s Coefficient a2 Register"]
622 pub iirstg25a2: IIRSTGA2,
623 #[doc = "0x734 - Stage %s Delay Data D0 Register"]
624 pub iirstg25d0: IIRSTGD0,
625 #[doc = "0x738 - Stage %s Delay Data D1 Register"]
626 pub iirstg25d1: IIRSTGD1,
627 _reserved289: [u8; 0x04],
628 #[doc = "0x740 - Stage %s Coefficient b0 Register"]
629 pub iirstg26b0: IIRSTGB0,
630 #[doc = "0x744 - Stage %s Coefficient b1 Register"]
631 pub iirstg26b1: IIRSTGB1,
632 #[doc = "0x748 - Stage %s Coefficient b2 Register"]
633 pub iirstg26b2: IIRSTGB2,
634 #[doc = "0x74c - Stage %s Coefficient a1 Register"]
635 pub iirstg26a1: IIRSTGA1,
636 #[doc = "0x750 - Stage %s Coefficient a2 Register"]
637 pub iirstg26a2: IIRSTGA2,
638 #[doc = "0x754 - Stage %s Delay Data D0 Register"]
639 pub iirstg26d0: IIRSTGD0,
640 #[doc = "0x758 - Stage %s Delay Data D1 Register"]
641 pub iirstg26d1: IIRSTGD1,
642 _reserved296: [u8; 0x04],
643 #[doc = "0x760 - Stage %s Coefficient b0 Register"]
644 pub iirstg27b0: IIRSTGB0,
645 #[doc = "0x764 - Stage %s Coefficient b1 Register"]
646 pub iirstg27b1: IIRSTGB1,
647 #[doc = "0x768 - Stage %s Coefficient b2 Register"]
648 pub iirstg27b2: IIRSTGB2,
649 #[doc = "0x76c - Stage %s Coefficient a1 Register"]
650 pub iirstg27a1: IIRSTGA1,
651 #[doc = "0x770 - Stage %s Coefficient a2 Register"]
652 pub iirstg27a2: IIRSTGA2,
653 #[doc = "0x774 - Stage %s Delay Data D0 Register"]
654 pub iirstg27d0: IIRSTGD0,
655 #[doc = "0x778 - Stage %s Delay Data D1 Register"]
656 pub iirstg27d1: IIRSTGD1,
657 _reserved303: [u8; 0x04],
658 #[doc = "0x780 - Stage %s Coefficient b0 Register"]
659 pub iirstg28b0: IIRSTGB0,
660 #[doc = "0x784 - Stage %s Coefficient b1 Register"]
661 pub iirstg28b1: IIRSTGB1,
662 #[doc = "0x788 - Stage %s Coefficient b2 Register"]
663 pub iirstg28b2: IIRSTGB2,
664 #[doc = "0x78c - Stage %s Coefficient a1 Register"]
665 pub iirstg28a1: IIRSTGA1,
666 #[doc = "0x790 - Stage %s Coefficient a2 Register"]
667 pub iirstg28a2: IIRSTGA2,
668 #[doc = "0x794 - Stage %s Delay Data D0 Register"]
669 pub iirstg28d0: IIRSTGD0,
670 #[doc = "0x798 - Stage %s Delay Data D1 Register"]
671 pub iirstg28d1: IIRSTGD1,
672 _reserved310: [u8; 0x04],
673 #[doc = "0x7a0 - Stage %s Coefficient b0 Register"]
674 pub iirstg29b0: IIRSTGB0,
675 #[doc = "0x7a4 - Stage %s Coefficient b1 Register"]
676 pub iirstg29b1: IIRSTGB1,
677 #[doc = "0x7a8 - Stage %s Coefficient b2 Register"]
678 pub iirstg29b2: IIRSTGB2,
679 #[doc = "0x7ac - Stage %s Coefficient a1 Register"]
680 pub iirstg29a1: IIRSTGA1,
681 #[doc = "0x7b0 - Stage %s Coefficient a2 Register"]
682 pub iirstg29a2: IIRSTGA2,
683 #[doc = "0x7b4 - Stage %s Delay Data D0 Register"]
684 pub iirstg29d0: IIRSTGD0,
685 #[doc = "0x7b8 - Stage %s Delay Data D1 Register"]
686 pub iirstg29d1: IIRSTGD1,
687 _reserved317: [u8; 0x04],
688 #[doc = "0x7c0 - Stage %s Coefficient b0 Register"]
689 pub iirstg30b0: IIRSTGB0,
690 #[doc = "0x7c4 - Stage %s Coefficient b1 Register"]
691 pub iirstg30b1: IIRSTGB1,
692 #[doc = "0x7c8 - Stage %s Coefficient b2 Register"]
693 pub iirstg30b2: IIRSTGB2,
694 #[doc = "0x7cc - Stage %s Coefficient a1 Register"]
695 pub iirstg30a1: IIRSTGA1,
696 #[doc = "0x7d0 - Stage %s Coefficient a2 Register"]
697 pub iirstg30a2: IIRSTGA2,
698 #[doc = "0x7d4 - Stage %s Delay Data D0 Register"]
699 pub iirstg30d0: IIRSTGD0,
700 #[doc = "0x7d8 - Stage %s Delay Data D1 Register"]
701 pub iirstg30d1: IIRSTGD1,
702 _reserved324: [u8; 0x04],
703 #[doc = "0x7e0 - Stage %s Coefficient b0 Register"]
704 pub iirstg31b0: IIRSTGB0,
705 #[doc = "0x7e4 - Stage %s Coefficient b1 Register"]
706 pub iirstg31b1: IIRSTGB1,
707 #[doc = "0x7e8 - Stage %s Coefficient b2 Register"]
708 pub iirstg31b2: IIRSTGB2,
709 #[doc = "0x7ec - Stage %s Coefficient a1 Register"]
710 pub iirstg31a1: IIRSTGA1,
711 #[doc = "0x7f0 - Stage %s Coefficient a2 Register"]
712 pub iirstg31a2: IIRSTGA2,
713 #[doc = "0x7f4 - Stage %s Delay Data D0 Register"]
714 pub iirstg31d0: IIRSTGD0,
715 #[doc = "0x7f8 - Stage %s Delay Data D1 Register"]
716 pub iirstg31d1: IIRSTGD1,
717}
718#[doc = "IIRCPRCS (r) register accessor: an alias for `Reg<IIRCPRCS_SPEC>`"]
719pub type IIRCPRCS = crate::Reg<iircprcs::IIRCPRCS_SPEC>;
720#[doc = "Channel Processing Status Register"]
721pub mod iircprcs;
722#[doc = "IIRCPRCFF (r) register accessor: an alias for `Reg<IIRCPRCFF_SPEC>`"]
723pub type IIRCPRCFF = crate::Reg<iircprcff::IIRCPRCFF_SPEC>;
724#[doc = "Channel Processing Completion Flag Register"]
725pub mod iircprcff;
726#[doc = "IIRORDYF (r) register accessor: an alias for `Reg<IIRORDYF_SPEC>`"]
727pub type IIRORDYF = crate::Reg<iirordyf::IIRORDYF_SPEC>;
728#[doc = "Output Data Preparation Completion Flag Register"]
729pub mod iirordyf;
730#[doc = "IIRCERRF (r) register accessor: an alias for `Reg<IIRCERRF_SPEC>`"]
731pub type IIRCERRF = crate::Reg<iircerrf::IIRCERRF_SPEC>;
732#[doc = "Operation Error Flag Register"]
733pub mod iircerrf;
734#[doc = "IIROPCNT (rw) register accessor: an alias for `Reg<IIROPCNT_SPEC>`"]
735pub type IIROPCNT = crate::Reg<iiropcnt::IIROPCNT_SPEC>;
736#[doc = "Operation Control Register"]
737pub mod iiropcnt;
738#[doc = "IIRECCCNT (rw) register accessor: an alias for `Reg<IIRECCCNT_SPEC>`"]
739pub type IIRECCCNT = crate::Reg<iirecccnt::IIRECCCNT_SPEC>;
740#[doc = "ECC Control Register"]
741pub mod iirecccnt;
742#[doc = "IIRECCINT (rw) register accessor: an alias for `Reg<IIRECCINT_SPEC>`"]
743pub type IIRECCINT = crate::Reg<iireccint::IIRECCINT_SPEC>;
744#[doc = "ECC Interrupt Enable Register"]
745pub mod iireccint;
746#[doc = "IIRECCEF (r) register accessor: an alias for `Reg<IIRECCEF_SPEC>`"]
747pub type IIRECCEF = crate::Reg<iireccef::IIRECCEF_SPEC>;
748#[doc = "ECC Error Flag Register"]
749pub mod iireccef;
750#[doc = "IIRECCEFCLR (w) register accessor: an alias for `Reg<IIRECCEFCLR_SPEC>`"]
751pub type IIRECCEFCLR = crate::Reg<iireccefclr::IIRECCEFCLR_SPEC>;
752#[doc = "ECC Error Flag Clear Register"]
753pub mod iireccefclr;
754#[doc = "IIRESEADR (r) register accessor: an alias for `Reg<IIRESEADR_SPEC>`"]
755pub type IIRESEADR = crate::Reg<iireseadr::IIRESEADR_SPEC>;
756#[doc = "ECC 1-bit Error Address Register"]
757pub mod iireseadr;
758#[doc = "IIREDEADR (r) register accessor: an alias for `Reg<IIREDEADR_SPEC>`"]
759pub type IIREDEADR = crate::Reg<iiredeadr::IIREDEADR_SPEC>;
760#[doc = "ECC 2-bit Error Address Register"]
761pub mod iiredeadr;
762#[doc = "IIRCHINP (w) register accessor: an alias for `Reg<IIRCHINP_SPEC>`"]
763pub type IIRCHINP = crate::Reg<iirchinp::IIRCHINP_SPEC>;
764#[doc = "Channel %s Input Register"]
765pub mod iirchinp;
766#[doc = "IIRCHOUT (r) register accessor: an alias for `Reg<IIRCHOUT_SPEC>`"]
767pub type IIRCHOUT = crate::Reg<iirchout::IIRCHOUT_SPEC>;
768#[doc = "Channel %s Output Register"]
769pub mod iirchout;
770#[doc = "IIRCHCNT (rw) register accessor: an alias for `Reg<IIRCHCNT_SPEC>`"]
771pub type IIRCHCNT = crate::Reg<iirchcnt::IIRCHCNT_SPEC>;
772#[doc = "Channel %s Control Register"]
773pub mod iirchcnt;
774#[doc = "IIRCHINT (rw) register accessor: an alias for `Reg<IIRCHINT_SPEC>`"]
775pub type IIRCHINT = crate::Reg<iirchint::IIRCHINT_SPEC>;
776#[doc = "Channel %s Interrupt Enable Register"]
777pub mod iirchint;
778#[doc = "IIRCHSTS (r) register accessor: an alias for `Reg<IIRCHSTS_SPEC>`"]
779pub type IIRCHSTS = crate::Reg<iirchsts::IIRCHSTS_SPEC>;
780#[doc = "Channel %s Status Register"]
781pub mod iirchsts;
782#[doc = "IIRCHFCLR (w) register accessor: an alias for `Reg<IIRCHFCLR_SPEC>`"]
783pub type IIRCHFCLR = crate::Reg<iirchfclr::IIRCHFCLR_SPEC>;
784#[doc = "Channel %s Flag Clear Register"]
785pub mod iirchfclr;
786#[doc = "IIRSTGB0 (rw) register accessor: an alias for `Reg<IIRSTGB0_SPEC>`"]
787pub type IIRSTGB0 = crate::Reg<iirstgb0::IIRSTGB0_SPEC>;
788#[doc = "Stage %s Coefficient b0 Register"]
789pub mod iirstgb0;
790#[doc = "IIRSTGB1 (rw) register accessor: an alias for `Reg<IIRSTGB1_SPEC>`"]
791pub type IIRSTGB1 = crate::Reg<iirstgb1::IIRSTGB1_SPEC>;
792#[doc = "Stage %s Coefficient b1 Register"]
793pub mod iirstgb1;
794#[doc = "IIRSTGB2 (rw) register accessor: an alias for `Reg<IIRSTGB2_SPEC>`"]
795pub type IIRSTGB2 = crate::Reg<iirstgb2::IIRSTGB2_SPEC>;
796#[doc = "Stage %s Coefficient b2 Register"]
797pub mod iirstgb2;
798#[doc = "IIRSTGA1 (rw) register accessor: an alias for `Reg<IIRSTGA1_SPEC>`"]
799pub type IIRSTGA1 = crate::Reg<iirstga1::IIRSTGA1_SPEC>;
800#[doc = "Stage %s Coefficient a1 Register"]
801pub mod iirstga1;
802#[doc = "IIRSTGA2 (rw) register accessor: an alias for `Reg<IIRSTGA2_SPEC>`"]
803pub type IIRSTGA2 = crate::Reg<iirstga2::IIRSTGA2_SPEC>;
804#[doc = "Stage %s Coefficient a2 Register"]
805pub mod iirstga2;
806#[doc = "IIRSTGD0 (rw) register accessor: an alias for `Reg<IIRSTGD0_SPEC>`"]
807pub type IIRSTGD0 = crate::Reg<iirstgd0::IIRSTGD0_SPEC>;
808#[doc = "Stage %s Delay Data D0 Register"]
809pub mod iirstgd0;
810#[doc = "IIRSTGD1 (rw) register accessor: an alias for `Reg<IIRSTGD1_SPEC>`"]
811pub type IIRSTGD1 = crate::Reg<iirstgd1::IIRSTGD1_SPEC>;
812#[doc = "Stage %s Delay Data D1 Register"]
813pub mod iirstgd1;