1#[doc = "Register `PRSTDBG` reader"]
2pub struct R(crate::R<PRSTDBG_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<PRSTDBG_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<PRSTDBG_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<PRSTDBG_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Field `SCILV` reader - SCL Line Signal Level"]
17pub type SCILV_R = crate::BitReader<bool>;
18#[doc = "Field `SDILV` reader - SDA Line Signal Level"]
19pub type SDILV_R = crate::BitReader<bool>;
20#[doc = "Field `SCOLV` reader - SCL Output Level"]
21pub type SCOLV_R = crate::BitReader<SCOLV_A>;
22#[doc = "SCL Output Level\n\nValue on reset: 0"]
23#[derive(Clone, Copy, Debug, PartialEq, Eq)]
24pub enum SCOLV_A {
25 #[doc = "0: IIC has driven the SCL pin low."]
26 _0 = 0,
27 #[doc = "1: IIC has released the SCL pin."]
28 _1 = 1,
29}
30impl From<SCOLV_A> for bool {
31 #[inline(always)]
32 fn from(variant: SCOLV_A) -> Self {
33 variant as u8 != 0
34 }
35}
36impl SCOLV_R {
37 #[doc = "Get enumerated values variant"]
38 #[inline(always)]
39 pub fn variant(&self) -> SCOLV_A {
40 match self.bits {
41 false => SCOLV_A::_0,
42 true => SCOLV_A::_1,
43 }
44 }
45 #[doc = "Checks if the value of the field is `_0`"]
46 #[inline(always)]
47 pub fn is_0(&self) -> bool {
48 *self == SCOLV_A::_0
49 }
50 #[doc = "Checks if the value of the field is `_1`"]
51 #[inline(always)]
52 pub fn is_1(&self) -> bool {
53 *self == SCOLV_A::_1
54 }
55}
56#[doc = "Field `SDOLV` reader - SDA Output Level"]
57pub type SDOLV_R = crate::BitReader<SDOLV_A>;
58#[doc = "SDA Output Level\n\nValue on reset: 0"]
59#[derive(Clone, Copy, Debug, PartialEq, Eq)]
60pub enum SDOLV_A {
61 #[doc = "0: IIC has driven the SDA pin low."]
62 _0 = 0,
63 #[doc = "1: IIC has released the SDA pin."]
64 _1 = 1,
65}
66impl From<SDOLV_A> for bool {
67 #[inline(always)]
68 fn from(variant: SDOLV_A) -> Self {
69 variant as u8 != 0
70 }
71}
72impl SDOLV_R {
73 #[doc = "Get enumerated values variant"]
74 #[inline(always)]
75 pub fn variant(&self) -> SDOLV_A {
76 match self.bits {
77 false => SDOLV_A::_0,
78 true => SDOLV_A::_1,
79 }
80 }
81 #[doc = "Checks if the value of the field is `_0`"]
82 #[inline(always)]
83 pub fn is_0(&self) -> bool {
84 *self == SDOLV_A::_0
85 }
86 #[doc = "Checks if the value of the field is `_1`"]
87 #[inline(always)]
88 pub fn is_1(&self) -> bool {
89 *self == SDOLV_A::_1
90 }
91}
92impl R {
93 #[doc = "Bit 0 - SCL Line Signal Level"]
94 #[inline(always)]
95 pub fn scilv(&self) -> SCILV_R {
96 SCILV_R::new((self.bits & 1) != 0)
97 }
98 #[doc = "Bit 1 - SDA Line Signal Level"]
99 #[inline(always)]
100 pub fn sdilv(&self) -> SDILV_R {
101 SDILV_R::new(((self.bits >> 1) & 1) != 0)
102 }
103 #[doc = "Bit 2 - SCL Output Level"]
104 #[inline(always)]
105 pub fn scolv(&self) -> SCOLV_R {
106 SCOLV_R::new(((self.bits >> 2) & 1) != 0)
107 }
108 #[doc = "Bit 3 - SDA Output Level"]
109 #[inline(always)]
110 pub fn sdolv(&self) -> SDOLV_R {
111 SDOLV_R::new(((self.bits >> 3) & 1) != 0)
112 }
113}
114#[doc = "Present State Debug Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prstdbg](index.html) module"]
115pub struct PRSTDBG_SPEC;
116impl crate::RegisterSpec for PRSTDBG_SPEC {
117 type Ux = u32;
118}
119#[doc = "`read()` method returns [prstdbg::R](R) reader structure"]
120impl crate::Readable for PRSTDBG_SPEC {
121 type Reader = R;
122}
123#[doc = "`reset()` method sets PRSTDBG to value 0"]
124impl crate::Resettable for PRSTDBG_SPEC {
125 const RESET_VALUE: Self::Ux = 0;
126}