1#[doc = "Register `SSICR` reader"]
2pub struct R(crate::R<SSICR_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SSICR_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SSICR_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SSICR_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `SSICR` writer"]
17pub struct W(crate::W<SSICR_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SSICR_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SSICR_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SSICR_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `REN` reader - Reception Enable"]
38pub type REN_R = crate::BitReader<REN_A>;
39#[doc = "Reception Enable\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum REN_A {
42 #[doc = "0: Disables reception"]
43 _0 = 0,
44 #[doc = "1: Enables reception (starts reception)"]
45 _1 = 1,
46}
47impl From<REN_A> for bool {
48 #[inline(always)]
49 fn from(variant: REN_A) -> Self {
50 variant as u8 != 0
51 }
52}
53impl REN_R {
54 #[doc = "Get enumerated values variant"]
55 #[inline(always)]
56 pub fn variant(&self) -> REN_A {
57 match self.bits {
58 false => REN_A::_0,
59 true => REN_A::_1,
60 }
61 }
62 #[doc = "Checks if the value of the field is `_0`"]
63 #[inline(always)]
64 pub fn is_0(&self) -> bool {
65 *self == REN_A::_0
66 }
67 #[doc = "Checks if the value of the field is `_1`"]
68 #[inline(always)]
69 pub fn is_1(&self) -> bool {
70 *self == REN_A::_1
71 }
72}
73#[doc = "Field `REN` writer - Reception Enable"]
74pub type REN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SSICR_SPEC, REN_A, O>;
75impl<'a, const O: u8> REN_W<'a, O> {
76 #[doc = "Disables reception"]
77 #[inline(always)]
78 pub fn _0(self) -> &'a mut W {
79 self.variant(REN_A::_0)
80 }
81 #[doc = "Enables reception (starts reception)"]
82 #[inline(always)]
83 pub fn _1(self) -> &'a mut W {
84 self.variant(REN_A::_1)
85 }
86}
87#[doc = "Field `TEN` reader - Transmission Enable"]
88pub type TEN_R = crate::BitReader<TEN_A>;
89#[doc = "Transmission Enable\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum TEN_A {
92 #[doc = "0: Disables transmission"]
93 _0 = 0,
94 #[doc = "1: Enables transmission (starts transmission)"]
95 _1 = 1,
96}
97impl From<TEN_A> for bool {
98 #[inline(always)]
99 fn from(variant: TEN_A) -> Self {
100 variant as u8 != 0
101 }
102}
103impl TEN_R {
104 #[doc = "Get enumerated values variant"]
105 #[inline(always)]
106 pub fn variant(&self) -> TEN_A {
107 match self.bits {
108 false => TEN_A::_0,
109 true => TEN_A::_1,
110 }
111 }
112 #[doc = "Checks if the value of the field is `_0`"]
113 #[inline(always)]
114 pub fn is_0(&self) -> bool {
115 *self == TEN_A::_0
116 }
117 #[doc = "Checks if the value of the field is `_1`"]
118 #[inline(always)]
119 pub fn is_1(&self) -> bool {
120 *self == TEN_A::_1
121 }
122}
123#[doc = "Field `TEN` writer - Transmission Enable"]
124pub type TEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SSICR_SPEC, TEN_A, O>;
125impl<'a, const O: u8> TEN_W<'a, O> {
126 #[doc = "Disables transmission"]
127 #[inline(always)]
128 pub fn _0(self) -> &'a mut W {
129 self.variant(TEN_A::_0)
130 }
131 #[doc = "Enables transmission (starts transmission)"]
132 #[inline(always)]
133 pub fn _1(self) -> &'a mut W {
134 self.variant(TEN_A::_1)
135 }
136}
137#[doc = "Field `MUEN` reader - Mute Enable"]
138pub type MUEN_R = crate::BitReader<MUEN_A>;
139#[doc = "Mute Enable\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum MUEN_A {
142 #[doc = "0: Disables muting on the next frame boundary"]
143 _0 = 0,
144 #[doc = "1: Enables muting on the next frame boundary"]
145 _1 = 1,
146}
147impl From<MUEN_A> for bool {
148 #[inline(always)]
149 fn from(variant: MUEN_A) -> Self {
150 variant as u8 != 0
151 }
152}
153impl MUEN_R {
154 #[doc = "Get enumerated values variant"]
155 #[inline(always)]
156 pub fn variant(&self) -> MUEN_A {
157 match self.bits {
158 false => MUEN_A::_0,
159 true => MUEN_A::_1,
160 }
161 }
162 #[doc = "Checks if the value of the field is `_0`"]
163 #[inline(always)]
164 pub fn is_0(&self) -> bool {
165 *self == MUEN_A::_0
166 }
167 #[doc = "Checks if the value of the field is `_1`"]
168 #[inline(always)]
169 pub fn is_1(&self) -> bool {
170 *self == MUEN_A::_1
171 }
172}
173#[doc = "Field `MUEN` writer - Mute Enable"]
174pub type MUEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SSICR_SPEC, MUEN_A, O>;
175impl<'a, const O: u8> MUEN_W<'a, O> {
176 #[doc = "Disables muting on the next frame boundary"]
177 #[inline(always)]
178 pub fn _0(self) -> &'a mut W {
179 self.variant(MUEN_A::_0)
180 }
181 #[doc = "Enables muting on the next frame boundary"]
182 #[inline(always)]
183 pub fn _1(self) -> &'a mut W {
184 self.variant(MUEN_A::_1)
185 }
186}
187#[doc = "Field `CKDV` reader - Selects Bit Clock Division Ratio"]
188pub type CKDV_R = crate::FieldReader<u8, CKDV_A>;
189#[doc = "Selects Bit Clock Division Ratio\n\nValue on reset: 0"]
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191#[repr(u8)]
192pub enum CKDV_A {
193 #[doc = "0: AUDIO_MCK"]
194 _0X0 = 0,
195 #[doc = "1: AUDIO_MCK/2"]
196 _0X1 = 1,
197 #[doc = "2: AUDIO_MCK/4"]
198 _0X2 = 2,
199 #[doc = "3: AUDIO_MCK/8"]
200 _0X3 = 3,
201 #[doc = "4: AUDIO_MCK/16"]
202 _0X4 = 4,
203 #[doc = "5: AUDIO_MCK/32"]
204 _0X5 = 5,
205 #[doc = "6: AUDIO_MCK/64"]
206 _0X6 = 6,
207 #[doc = "7: AUDIO_MCK/128"]
208 _0X7 = 7,
209 #[doc = "8: AUDIO_MCK/6"]
210 _0X8 = 8,
211 #[doc = "9: AUDIO_MCK/12"]
212 _0X9 = 9,
213 #[doc = "10: AUDIO_MCK/24"]
214 _0X_A = 10,
215 #[doc = "11: AUDIO_MCK/48"]
216 _0X_B = 11,
217 #[doc = "12: AUDIO_MCK/96"]
218 _0X_C = 12,
219}
220impl From<CKDV_A> for u8 {
221 #[inline(always)]
222 fn from(variant: CKDV_A) -> Self {
223 variant as _
224 }
225}
226impl CKDV_R {
227 #[doc = "Get enumerated values variant"]
228 #[inline(always)]
229 pub fn variant(&self) -> Option<CKDV_A> {
230 match self.bits {
231 0 => Some(CKDV_A::_0X0),
232 1 => Some(CKDV_A::_0X1),
233 2 => Some(CKDV_A::_0X2),
234 3 => Some(CKDV_A::_0X3),
235 4 => Some(CKDV_A::_0X4),
236 5 => Some(CKDV_A::_0X5),
237 6 => Some(CKDV_A::_0X6),
238 7 => Some(CKDV_A::_0X7),
239 8 => Some(CKDV_A::_0X8),
240 9 => Some(CKDV_A::_0X9),
241 10 => Some(CKDV_A::_0X_A),
242 11 => Some(CKDV_A::_0X_B),
243 12 => Some(CKDV_A::_0X_C),
244 _ => None,
245 }
246 }
247 #[doc = "Checks if the value of the field is `_0X0`"]
248 #[inline(always)]
249 pub fn is_0x0(&self) -> bool {
250 *self == CKDV_A::_0X0
251 }
252 #[doc = "Checks if the value of the field is `_0X1`"]
253 #[inline(always)]
254 pub fn is_0x1(&self) -> bool {
255 *self == CKDV_A::_0X1
256 }
257 #[doc = "Checks if the value of the field is `_0X2`"]
258 #[inline(always)]
259 pub fn is_0x2(&self) -> bool {
260 *self == CKDV_A::_0X2
261 }
262 #[doc = "Checks if the value of the field is `_0X3`"]
263 #[inline(always)]
264 pub fn is_0x3(&self) -> bool {
265 *self == CKDV_A::_0X3
266 }
267 #[doc = "Checks if the value of the field is `_0X4`"]
268 #[inline(always)]
269 pub fn is_0x4(&self) -> bool {
270 *self == CKDV_A::_0X4
271 }
272 #[doc = "Checks if the value of the field is `_0X5`"]
273 #[inline(always)]
274 pub fn is_0x5(&self) -> bool {
275 *self == CKDV_A::_0X5
276 }
277 #[doc = "Checks if the value of the field is `_0X6`"]
278 #[inline(always)]
279 pub fn is_0x6(&self) -> bool {
280 *self == CKDV_A::_0X6
281 }
282 #[doc = "Checks if the value of the field is `_0X7`"]
283 #[inline(always)]
284 pub fn is_0x7(&self) -> bool {
285 *self == CKDV_A::_0X7
286 }
287 #[doc = "Checks if the value of the field is `_0X8`"]
288 #[inline(always)]
289 pub fn is_0x8(&self) -> bool {
290 *self == CKDV_A::_0X8
291 }
292 #[doc = "Checks if the value of the field is `_0X9`"]
293 #[inline(always)]
294 pub fn is_0x9(&self) -> bool {
295 *self == CKDV_A::_0X9
296 }
297 #[doc = "Checks if the value of the field is `_0X_A`"]
298 #[inline(always)]
299 pub fn is_0x_a(&self) -> bool {
300 *self == CKDV_A::_0X_A
301 }
302 #[doc = "Checks if the value of the field is `_0X_B`"]
303 #[inline(always)]
304 pub fn is_0x_b(&self) -> bool {
305 *self == CKDV_A::_0X_B
306 }
307 #[doc = "Checks if the value of the field is `_0X_C`"]
308 #[inline(always)]
309 pub fn is_0x_c(&self) -> bool {
310 *self == CKDV_A::_0X_C
311 }
312}
313#[doc = "Field `CKDV` writer - Selects Bit Clock Division Ratio"]
314pub type CKDV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SSICR_SPEC, u8, CKDV_A, 4, O>;
315impl<'a, const O: u8> CKDV_W<'a, O> {
316 #[doc = "AUDIO_MCK"]
317 #[inline(always)]
318 pub fn _0x0(self) -> &'a mut W {
319 self.variant(CKDV_A::_0X0)
320 }
321 #[doc = "AUDIO_MCK/2"]
322 #[inline(always)]
323 pub fn _0x1(self) -> &'a mut W {
324 self.variant(CKDV_A::_0X1)
325 }
326 #[doc = "AUDIO_MCK/4"]
327 #[inline(always)]
328 pub fn _0x2(self) -> &'a mut W {
329 self.variant(CKDV_A::_0X2)
330 }
331 #[doc = "AUDIO_MCK/8"]
332 #[inline(always)]
333 pub fn _0x3(self) -> &'a mut W {
334 self.variant(CKDV_A::_0X3)
335 }
336 #[doc = "AUDIO_MCK/16"]
337 #[inline(always)]
338 pub fn _0x4(self) -> &'a mut W {
339 self.variant(CKDV_A::_0X4)
340 }
341 #[doc = "AUDIO_MCK/32"]
342 #[inline(always)]
343 pub fn _0x5(self) -> &'a mut W {
344 self.variant(CKDV_A::_0X5)
345 }
346 #[doc = "AUDIO_MCK/64"]
347 #[inline(always)]
348 pub fn _0x6(self) -> &'a mut W {
349 self.variant(CKDV_A::_0X6)
350 }
351 #[doc = "AUDIO_MCK/128"]
352 #[inline(always)]
353 pub fn _0x7(self) -> &'a mut W {
354 self.variant(CKDV_A::_0X7)
355 }
356 #[doc = "AUDIO_MCK/6"]
357 #[inline(always)]
358 pub fn _0x8(self) -> &'a mut W {
359 self.variant(CKDV_A::_0X8)
360 }
361 #[doc = "AUDIO_MCK/12"]
362 #[inline(always)]
363 pub fn _0x9(self) -> &'a mut W {
364 self.variant(CKDV_A::_0X9)
365 }
366 #[doc = "AUDIO_MCK/24"]
367 #[inline(always)]
368 pub fn _0x_a(self) -> &'a mut W {
369 self.variant(CKDV_A::_0X_A)
370 }
371 #[doc = "AUDIO_MCK/48"]
372 #[inline(always)]
373 pub fn _0x_b(self) -> &'a mut W {
374 self.variant(CKDV_A::_0X_B)
375 }
376 #[doc = "AUDIO_MCK/96"]
377 #[inline(always)]
378 pub fn _0x_c(self) -> &'a mut W {
379 self.variant(CKDV_A::_0X_C)
380 }
381}
382#[doc = "Field `DEL` reader - Selects Serial Data Delay"]
383pub type DEL_R = crate::BitReader<DEL_A>;
384#[doc = "Selects Serial Data Delay\n\nValue on reset: 0"]
385#[derive(Clone, Copy, Debug, PartialEq, Eq)]
386pub enum DEL_A {
387 #[doc = "0: Delay of 1 cycle of SSIBCK between SSILRCK/SSIFS and SSITXD0/SSIRXD0/SSIDATA0"]
388 _0 = 0,
389 #[doc = "1: No delay between SSILRCK/SSIFS and SSITXD0/SSIRXD0/SSIDATA0"]
390 _1 = 1,
391}
392impl From<DEL_A> for bool {
393 #[inline(always)]
394 fn from(variant: DEL_A) -> Self {
395 variant as u8 != 0
396 }
397}
398impl DEL_R {
399 #[doc = "Get enumerated values variant"]
400 #[inline(always)]
401 pub fn variant(&self) -> DEL_A {
402 match self.bits {
403 false => DEL_A::_0,
404 true => DEL_A::_1,
405 }
406 }
407 #[doc = "Checks if the value of the field is `_0`"]
408 #[inline(always)]
409 pub fn is_0(&self) -> bool {
410 *self == DEL_A::_0
411 }
412 #[doc = "Checks if the value of the field is `_1`"]
413 #[inline(always)]
414 pub fn is_1(&self) -> bool {
415 *self == DEL_A::_1
416 }
417}
418#[doc = "Field `DEL` writer - Selects Serial Data Delay"]
419pub type DEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, SSICR_SPEC, DEL_A, O>;
420impl<'a, const O: u8> DEL_W<'a, O> {
421 #[doc = "Delay of 1 cycle of SSIBCK between SSILRCK/SSIFS and SSITXD0/SSIRXD0/SSIDATA0"]
422 #[inline(always)]
423 pub fn _0(self) -> &'a mut W {
424 self.variant(DEL_A::_0)
425 }
426 #[doc = "No delay between SSILRCK/SSIFS and SSITXD0/SSIRXD0/SSIDATA0"]
427 #[inline(always)]
428 pub fn _1(self) -> &'a mut W {
429 self.variant(DEL_A::_1)
430 }
431}
432#[doc = "Field `PDTA` reader - Selects Placement Data Alignment"]
433pub type PDTA_R = crate::BitReader<PDTA_A>;
434#[doc = "Selects Placement Data Alignment\n\nValue on reset: 0"]
435#[derive(Clone, Copy, Debug, PartialEq, Eq)]
436pub enum PDTA_A {
437 #[doc = "0: Left-justifies placement data (SSIFTDR, SSIFRDR)"]
438 _0 = 0,
439 #[doc = "1: Right-justifies placement data (SSIFTDR, SSIFRDR)"]
440 _1 = 1,
441}
442impl From<PDTA_A> for bool {
443 #[inline(always)]
444 fn from(variant: PDTA_A) -> Self {
445 variant as u8 != 0
446 }
447}
448impl PDTA_R {
449 #[doc = "Get enumerated values variant"]
450 #[inline(always)]
451 pub fn variant(&self) -> PDTA_A {
452 match self.bits {
453 false => PDTA_A::_0,
454 true => PDTA_A::_1,
455 }
456 }
457 #[doc = "Checks if the value of the field is `_0`"]
458 #[inline(always)]
459 pub fn is_0(&self) -> bool {
460 *self == PDTA_A::_0
461 }
462 #[doc = "Checks if the value of the field is `_1`"]
463 #[inline(always)]
464 pub fn is_1(&self) -> bool {
465 *self == PDTA_A::_1
466 }
467}
468#[doc = "Field `PDTA` writer - Selects Placement Data Alignment"]
469pub type PDTA_W<'a, const O: u8> = crate::BitWriter<'a, u32, SSICR_SPEC, PDTA_A, O>;
470impl<'a, const O: u8> PDTA_W<'a, O> {
471 #[doc = "Left-justifies placement data (SSIFTDR, SSIFRDR)"]
472 #[inline(always)]
473 pub fn _0(self) -> &'a mut W {
474 self.variant(PDTA_A::_0)
475 }
476 #[doc = "Right-justifies placement data (SSIFTDR, SSIFRDR)"]
477 #[inline(always)]
478 pub fn _1(self) -> &'a mut W {
479 self.variant(PDTA_A::_1)
480 }
481}
482#[doc = "Field `SDTA` reader - Selects Serial Data Alignment"]
483pub type SDTA_R = crate::BitReader<SDTA_A>;
484#[doc = "Selects Serial Data Alignment\n\nValue on reset: 0"]
485#[derive(Clone, Copy, Debug, PartialEq, Eq)]
486pub enum SDTA_A {
487 #[doc = "0: Transmits and receives serial data first and then padding bits"]
488 _0 = 0,
489 #[doc = "1: Transmit and receives padding bits first and then serial data"]
490 _1 = 1,
491}
492impl From<SDTA_A> for bool {
493 #[inline(always)]
494 fn from(variant: SDTA_A) -> Self {
495 variant as u8 != 0
496 }
497}
498impl SDTA_R {
499 #[doc = "Get enumerated values variant"]
500 #[inline(always)]
501 pub fn variant(&self) -> SDTA_A {
502 match self.bits {
503 false => SDTA_A::_0,
504 true => SDTA_A::_1,
505 }
506 }
507 #[doc = "Checks if the value of the field is `_0`"]
508 #[inline(always)]
509 pub fn is_0(&self) -> bool {
510 *self == SDTA_A::_0
511 }
512 #[doc = "Checks if the value of the field is `_1`"]
513 #[inline(always)]
514 pub fn is_1(&self) -> bool {
515 *self == SDTA_A::_1
516 }
517}
518#[doc = "Field `SDTA` writer - Selects Serial Data Alignment"]
519pub type SDTA_W<'a, const O: u8> = crate::BitWriter<'a, u32, SSICR_SPEC, SDTA_A, O>;
520impl<'a, const O: u8> SDTA_W<'a, O> {
521 #[doc = "Transmits and receives serial data first and then padding bits"]
522 #[inline(always)]
523 pub fn _0(self) -> &'a mut W {
524 self.variant(SDTA_A::_0)
525 }
526 #[doc = "Transmit and receives padding bits first and then serial data"]
527 #[inline(always)]
528 pub fn _1(self) -> &'a mut W {
529 self.variant(SDTA_A::_1)
530 }
531}
532#[doc = "Field `SPDP` reader - Selects Serial Padding Polarity"]
533pub type SPDP_R = crate::BitReader<SPDP_A>;
534#[doc = "Selects Serial Padding Polarity\n\nValue on reset: 0"]
535#[derive(Clone, Copy, Debug, PartialEq, Eq)]
536pub enum SPDP_A {
537 #[doc = "0: Padding data is at a low level"]
538 _0 = 0,
539 #[doc = "1: Padding data is at a high level"]
540 _1 = 1,
541}
542impl From<SPDP_A> for bool {
543 #[inline(always)]
544 fn from(variant: SPDP_A) -> Self {
545 variant as u8 != 0
546 }
547}
548impl SPDP_R {
549 #[doc = "Get enumerated values variant"]
550 #[inline(always)]
551 pub fn variant(&self) -> SPDP_A {
552 match self.bits {
553 false => SPDP_A::_0,
554 true => SPDP_A::_1,
555 }
556 }
557 #[doc = "Checks if the value of the field is `_0`"]
558 #[inline(always)]
559 pub fn is_0(&self) -> bool {
560 *self == SPDP_A::_0
561 }
562 #[doc = "Checks if the value of the field is `_1`"]
563 #[inline(always)]
564 pub fn is_1(&self) -> bool {
565 *self == SPDP_A::_1
566 }
567}
568#[doc = "Field `SPDP` writer - Selects Serial Padding Polarity"]
569pub type SPDP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SSICR_SPEC, SPDP_A, O>;
570impl<'a, const O: u8> SPDP_W<'a, O> {
571 #[doc = "Padding data is at a low level"]
572 #[inline(always)]
573 pub fn _0(self) -> &'a mut W {
574 self.variant(SPDP_A::_0)
575 }
576 #[doc = "Padding data is at a high level"]
577 #[inline(always)]
578 pub fn _1(self) -> &'a mut W {
579 self.variant(SPDP_A::_1)
580 }
581}
582#[doc = "Field `LRCKP` reader - Selects the Initial Value and Polarity of LR Clock/Frame Synchronization Signal"]
583pub type LRCKP_R = crate::BitReader<LRCKP_A>;
584#[doc = "Selects the Initial Value and Polarity of LR Clock/Frame Synchronization Signal\n\nValue on reset: 0"]
585#[derive(Clone, Copy, Debug, PartialEq, Eq)]
586pub enum LRCKP_A {
587 #[doc = "0: The initial value is at a high level. The start trigger for a frame is synchronized with a falling edge of SSILRCK/SSIFS."]
588 _0 = 0,
589 #[doc = "1: The initial value is at a low level. The start trigger for a frame is synchronized with a rising edge of SSILRCK/SSIFS."]
590 _1 = 1,
591}
592impl From<LRCKP_A> for bool {
593 #[inline(always)]
594 fn from(variant: LRCKP_A) -> Self {
595 variant as u8 != 0
596 }
597}
598impl LRCKP_R {
599 #[doc = "Get enumerated values variant"]
600 #[inline(always)]
601 pub fn variant(&self) -> LRCKP_A {
602 match self.bits {
603 false => LRCKP_A::_0,
604 true => LRCKP_A::_1,
605 }
606 }
607 #[doc = "Checks if the value of the field is `_0`"]
608 #[inline(always)]
609 pub fn is_0(&self) -> bool {
610 *self == LRCKP_A::_0
611 }
612 #[doc = "Checks if the value of the field is `_1`"]
613 #[inline(always)]
614 pub fn is_1(&self) -> bool {
615 *self == LRCKP_A::_1
616 }
617}
618#[doc = "Field `LRCKP` writer - Selects the Initial Value and Polarity of LR Clock/Frame Synchronization Signal"]
619pub type LRCKP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SSICR_SPEC, LRCKP_A, O>;
620impl<'a, const O: u8> LRCKP_W<'a, O> {
621 #[doc = "The initial value is at a high level. The start trigger for a frame is synchronized with a falling edge of SSILRCK/SSIFS."]
622 #[inline(always)]
623 pub fn _0(self) -> &'a mut W {
624 self.variant(LRCKP_A::_0)
625 }
626 #[doc = "The initial value is at a low level. The start trigger for a frame is synchronized with a rising edge of SSILRCK/SSIFS."]
627 #[inline(always)]
628 pub fn _1(self) -> &'a mut W {
629 self.variant(LRCKP_A::_1)
630 }
631}
632#[doc = "Field `BCKP` reader - Selects Bit Clock Polarity"]
633pub type BCKP_R = crate::BitReader<BCKP_A>;
634#[doc = "Selects Bit Clock Polarity\n\nValue on reset: 0"]
635#[derive(Clone, Copy, Debug, PartialEq, Eq)]
636pub enum BCKP_A {
637 #[doc = "0: SSILRCK/SSIFS and SSITXD0/SSIRXD0/SSIDATA0 change at a falling edge (SSILRCK/SSIFS and SSIRXD0/SSIDATA0 are sampled at a rising edge of SSIBCK)."]
638 _0 = 0,
639 #[doc = "1: SSILRCK/SSIFS and SSITXD0/SSIRXD0/SSIDATA0 change at a rising edge (SSILRCK/SSIFS and SSIRXD0/SSIDATA0 are sampled at a falling edge of SSIBCK)."]
640 _1 = 1,
641}
642impl From<BCKP_A> for bool {
643 #[inline(always)]
644 fn from(variant: BCKP_A) -> Self {
645 variant as u8 != 0
646 }
647}
648impl BCKP_R {
649 #[doc = "Get enumerated values variant"]
650 #[inline(always)]
651 pub fn variant(&self) -> BCKP_A {
652 match self.bits {
653 false => BCKP_A::_0,
654 true => BCKP_A::_1,
655 }
656 }
657 #[doc = "Checks if the value of the field is `_0`"]
658 #[inline(always)]
659 pub fn is_0(&self) -> bool {
660 *self == BCKP_A::_0
661 }
662 #[doc = "Checks if the value of the field is `_1`"]
663 #[inline(always)]
664 pub fn is_1(&self) -> bool {
665 *self == BCKP_A::_1
666 }
667}
668#[doc = "Field `BCKP` writer - Selects Bit Clock Polarity"]
669pub type BCKP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SSICR_SPEC, BCKP_A, O>;
670impl<'a, const O: u8> BCKP_W<'a, O> {
671 #[doc = "SSILRCK/SSIFS and SSITXD0/SSIRXD0/SSIDATA0 change at a falling edge (SSILRCK/SSIFS and SSIRXD0/SSIDATA0 are sampled at a rising edge of SSIBCK)."]
672 #[inline(always)]
673 pub fn _0(self) -> &'a mut W {
674 self.variant(BCKP_A::_0)
675 }
676 #[doc = "SSILRCK/SSIFS and SSITXD0/SSIRXD0/SSIDATA0 change at a rising edge (SSILRCK/SSIFS and SSIRXD0/SSIDATA0 are sampled at a falling edge of SSIBCK)."]
677 #[inline(always)]
678 pub fn _1(self) -> &'a mut W {
679 self.variant(BCKP_A::_1)
680 }
681}
682#[doc = "Field `MST` reader - Master Enable"]
683pub type MST_R = crate::BitReader<MST_A>;
684#[doc = "Master Enable\n\nValue on reset: 0"]
685#[derive(Clone, Copy, Debug, PartialEq, Eq)]
686pub enum MST_A {
687 #[doc = "0: Slave-mode communication"]
688 _0 = 0,
689 #[doc = "1: Master-mode communication"]
690 _1 = 1,
691}
692impl From<MST_A> for bool {
693 #[inline(always)]
694 fn from(variant: MST_A) -> Self {
695 variant as u8 != 0
696 }
697}
698impl MST_R {
699 #[doc = "Get enumerated values variant"]
700 #[inline(always)]
701 pub fn variant(&self) -> MST_A {
702 match self.bits {
703 false => MST_A::_0,
704 true => MST_A::_1,
705 }
706 }
707 #[doc = "Checks if the value of the field is `_0`"]
708 #[inline(always)]
709 pub fn is_0(&self) -> bool {
710 *self == MST_A::_0
711 }
712 #[doc = "Checks if the value of the field is `_1`"]
713 #[inline(always)]
714 pub fn is_1(&self) -> bool {
715 *self == MST_A::_1
716 }
717}
718#[doc = "Field `MST` writer - Master Enable"]
719pub type MST_W<'a, const O: u8> = crate::BitWriter<'a, u32, SSICR_SPEC, MST_A, O>;
720impl<'a, const O: u8> MST_W<'a, O> {
721 #[doc = "Slave-mode communication"]
722 #[inline(always)]
723 pub fn _0(self) -> &'a mut W {
724 self.variant(MST_A::_0)
725 }
726 #[doc = "Master-mode communication"]
727 #[inline(always)]
728 pub fn _1(self) -> &'a mut W {
729 self.variant(MST_A::_1)
730 }
731}
732#[doc = "Field `SWL` reader - Selects System Word Length"]
733pub type SWL_R = crate::FieldReader<u8, SWL_A>;
734#[doc = "Selects System Word Length\n\nValue on reset: 0"]
735#[derive(Clone, Copy, Debug, PartialEq, Eq)]
736#[repr(u8)]
737pub enum SWL_A {
738 #[doc = "0: 8 bits"]
739 _000 = 0,
740 #[doc = "1: 16 bits"]
741 _001 = 1,
742 #[doc = "2: 24 bits"]
743 _010 = 2,
744 #[doc = "3: 32 bits"]
745 _011 = 3,
746 #[doc = "4: 48 bits"]
747 _100 = 4,
748 #[doc = "5: 64 bits"]
749 _101 = 5,
750 #[doc = "6: 128 bits"]
751 _110 = 6,
752 #[doc = "7: 256 bits"]
753 _111 = 7,
754}
755impl From<SWL_A> for u8 {
756 #[inline(always)]
757 fn from(variant: SWL_A) -> Self {
758 variant as _
759 }
760}
761impl SWL_R {
762 #[doc = "Get enumerated values variant"]
763 #[inline(always)]
764 pub fn variant(&self) -> SWL_A {
765 match self.bits {
766 0 => SWL_A::_000,
767 1 => SWL_A::_001,
768 2 => SWL_A::_010,
769 3 => SWL_A::_011,
770 4 => SWL_A::_100,
771 5 => SWL_A::_101,
772 6 => SWL_A::_110,
773 7 => SWL_A::_111,
774 _ => unreachable!(),
775 }
776 }
777 #[doc = "Checks if the value of the field is `_000`"]
778 #[inline(always)]
779 pub fn is_000(&self) -> bool {
780 *self == SWL_A::_000
781 }
782 #[doc = "Checks if the value of the field is `_001`"]
783 #[inline(always)]
784 pub fn is_001(&self) -> bool {
785 *self == SWL_A::_001
786 }
787 #[doc = "Checks if the value of the field is `_010`"]
788 #[inline(always)]
789 pub fn is_010(&self) -> bool {
790 *self == SWL_A::_010
791 }
792 #[doc = "Checks if the value of the field is `_011`"]
793 #[inline(always)]
794 pub fn is_011(&self) -> bool {
795 *self == SWL_A::_011
796 }
797 #[doc = "Checks if the value of the field is `_100`"]
798 #[inline(always)]
799 pub fn is_100(&self) -> bool {
800 *self == SWL_A::_100
801 }
802 #[doc = "Checks if the value of the field is `_101`"]
803 #[inline(always)]
804 pub fn is_101(&self) -> bool {
805 *self == SWL_A::_101
806 }
807 #[doc = "Checks if the value of the field is `_110`"]
808 #[inline(always)]
809 pub fn is_110(&self) -> bool {
810 *self == SWL_A::_110
811 }
812 #[doc = "Checks if the value of the field is `_111`"]
813 #[inline(always)]
814 pub fn is_111(&self) -> bool {
815 *self == SWL_A::_111
816 }
817}
818#[doc = "Field `SWL` writer - Selects System Word Length"]
819pub type SWL_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, SSICR_SPEC, u8, SWL_A, 3, O>;
820impl<'a, const O: u8> SWL_W<'a, O> {
821 #[doc = "8 bits"]
822 #[inline(always)]
823 pub fn _000(self) -> &'a mut W {
824 self.variant(SWL_A::_000)
825 }
826 #[doc = "16 bits"]
827 #[inline(always)]
828 pub fn _001(self) -> &'a mut W {
829 self.variant(SWL_A::_001)
830 }
831 #[doc = "24 bits"]
832 #[inline(always)]
833 pub fn _010(self) -> &'a mut W {
834 self.variant(SWL_A::_010)
835 }
836 #[doc = "32 bits"]
837 #[inline(always)]
838 pub fn _011(self) -> &'a mut W {
839 self.variant(SWL_A::_011)
840 }
841 #[doc = "48 bits"]
842 #[inline(always)]
843 pub fn _100(self) -> &'a mut W {
844 self.variant(SWL_A::_100)
845 }
846 #[doc = "64 bits"]
847 #[inline(always)]
848 pub fn _101(self) -> &'a mut W {
849 self.variant(SWL_A::_101)
850 }
851 #[doc = "128 bits"]
852 #[inline(always)]
853 pub fn _110(self) -> &'a mut W {
854 self.variant(SWL_A::_110)
855 }
856 #[doc = "256 bits"]
857 #[inline(always)]
858 pub fn _111(self) -> &'a mut W {
859 self.variant(SWL_A::_111)
860 }
861}
862#[doc = "Field `DWL` reader - Selects Data Word Length"]
863pub type DWL_R = crate::FieldReader<u8, DWL_A>;
864#[doc = "Selects Data Word Length\n\nValue on reset: 0"]
865#[derive(Clone, Copy, Debug, PartialEq, Eq)]
866#[repr(u8)]
867pub enum DWL_A {
868 #[doc = "0: 8 bits"]
869 _000 = 0,
870 #[doc = "1: 16 bits"]
871 _001 = 1,
872 #[doc = "2: 18 bits"]
873 _010 = 2,
874 #[doc = "3: 20 bits"]
875 _011 = 3,
876 #[doc = "4: 22 bits"]
877 _100 = 4,
878 #[doc = "5: 24 bits"]
879 _101 = 5,
880 #[doc = "6: 32 bits"]
881 _110 = 6,
882 #[doc = "7: Setting prohibited"]
883 _111 = 7,
884}
885impl From<DWL_A> for u8 {
886 #[inline(always)]
887 fn from(variant: DWL_A) -> Self {
888 variant as _
889 }
890}
891impl DWL_R {
892 #[doc = "Get enumerated values variant"]
893 #[inline(always)]
894 pub fn variant(&self) -> DWL_A {
895 match self.bits {
896 0 => DWL_A::_000,
897 1 => DWL_A::_001,
898 2 => DWL_A::_010,
899 3 => DWL_A::_011,
900 4 => DWL_A::_100,
901 5 => DWL_A::_101,
902 6 => DWL_A::_110,
903 7 => DWL_A::_111,
904 _ => unreachable!(),
905 }
906 }
907 #[doc = "Checks if the value of the field is `_000`"]
908 #[inline(always)]
909 pub fn is_000(&self) -> bool {
910 *self == DWL_A::_000
911 }
912 #[doc = "Checks if the value of the field is `_001`"]
913 #[inline(always)]
914 pub fn is_001(&self) -> bool {
915 *self == DWL_A::_001
916 }
917 #[doc = "Checks if the value of the field is `_010`"]
918 #[inline(always)]
919 pub fn is_010(&self) -> bool {
920 *self == DWL_A::_010
921 }
922 #[doc = "Checks if the value of the field is `_011`"]
923 #[inline(always)]
924 pub fn is_011(&self) -> bool {
925 *self == DWL_A::_011
926 }
927 #[doc = "Checks if the value of the field is `_100`"]
928 #[inline(always)]
929 pub fn is_100(&self) -> bool {
930 *self == DWL_A::_100
931 }
932 #[doc = "Checks if the value of the field is `_101`"]
933 #[inline(always)]
934 pub fn is_101(&self) -> bool {
935 *self == DWL_A::_101
936 }
937 #[doc = "Checks if the value of the field is `_110`"]
938 #[inline(always)]
939 pub fn is_110(&self) -> bool {
940 *self == DWL_A::_110
941 }
942 #[doc = "Checks if the value of the field is `_111`"]
943 #[inline(always)]
944 pub fn is_111(&self) -> bool {
945 *self == DWL_A::_111
946 }
947}
948#[doc = "Field `DWL` writer - Selects Data Word Length"]
949pub type DWL_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, SSICR_SPEC, u8, DWL_A, 3, O>;
950impl<'a, const O: u8> DWL_W<'a, O> {
951 #[doc = "8 bits"]
952 #[inline(always)]
953 pub fn _000(self) -> &'a mut W {
954 self.variant(DWL_A::_000)
955 }
956 #[doc = "16 bits"]
957 #[inline(always)]
958 pub fn _001(self) -> &'a mut W {
959 self.variant(DWL_A::_001)
960 }
961 #[doc = "18 bits"]
962 #[inline(always)]
963 pub fn _010(self) -> &'a mut W {
964 self.variant(DWL_A::_010)
965 }
966 #[doc = "20 bits"]
967 #[inline(always)]
968 pub fn _011(self) -> &'a mut W {
969 self.variant(DWL_A::_011)
970 }
971 #[doc = "22 bits"]
972 #[inline(always)]
973 pub fn _100(self) -> &'a mut W {
974 self.variant(DWL_A::_100)
975 }
976 #[doc = "24 bits"]
977 #[inline(always)]
978 pub fn _101(self) -> &'a mut W {
979 self.variant(DWL_A::_101)
980 }
981 #[doc = "32 bits"]
982 #[inline(always)]
983 pub fn _110(self) -> &'a mut W {
984 self.variant(DWL_A::_110)
985 }
986 #[doc = "Setting prohibited"]
987 #[inline(always)]
988 pub fn _111(self) -> &'a mut W {
989 self.variant(DWL_A::_111)
990 }
991}
992#[doc = "Field `FRM` reader - Selects Frame Word Number"]
993pub type FRM_R = crate::FieldReader<u8, u8>;
994#[doc = "Field `FRM` writer - Selects Frame Word Number"]
995pub type FRM_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SSICR_SPEC, u8, u8, 2, O>;
996#[doc = "Field `IIEN` reader - Idle Mode Interrupt Output Enable"]
997pub type IIEN_R = crate::BitReader<IIEN_A>;
998#[doc = "Idle Mode Interrupt Output Enable\n\nValue on reset: 0"]
999#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1000pub enum IIEN_A {
1001 #[doc = "0: Disables idle mode interrupt output"]
1002 _0 = 0,
1003 #[doc = "1: Enables idle mode interrupt output"]
1004 _1 = 1,
1005}
1006impl From<IIEN_A> for bool {
1007 #[inline(always)]
1008 fn from(variant: IIEN_A) -> Self {
1009 variant as u8 != 0
1010 }
1011}
1012impl IIEN_R {
1013 #[doc = "Get enumerated values variant"]
1014 #[inline(always)]
1015 pub fn variant(&self) -> IIEN_A {
1016 match self.bits {
1017 false => IIEN_A::_0,
1018 true => IIEN_A::_1,
1019 }
1020 }
1021 #[doc = "Checks if the value of the field is `_0`"]
1022 #[inline(always)]
1023 pub fn is_0(&self) -> bool {
1024 *self == IIEN_A::_0
1025 }
1026 #[doc = "Checks if the value of the field is `_1`"]
1027 #[inline(always)]
1028 pub fn is_1(&self) -> bool {
1029 *self == IIEN_A::_1
1030 }
1031}
1032#[doc = "Field `IIEN` writer - Idle Mode Interrupt Output Enable"]
1033pub type IIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SSICR_SPEC, IIEN_A, O>;
1034impl<'a, const O: u8> IIEN_W<'a, O> {
1035 #[doc = "Disables idle mode interrupt output"]
1036 #[inline(always)]
1037 pub fn _0(self) -> &'a mut W {
1038 self.variant(IIEN_A::_0)
1039 }
1040 #[doc = "Enables idle mode interrupt output"]
1041 #[inline(always)]
1042 pub fn _1(self) -> &'a mut W {
1043 self.variant(IIEN_A::_1)
1044 }
1045}
1046#[doc = "Field `ROIEN` reader - Receive Overflow Interrupt Output Enable"]
1047pub type ROIEN_R = crate::BitReader<ROIEN_A>;
1048#[doc = "Receive Overflow Interrupt Output Enable\n\nValue on reset: 0"]
1049#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1050pub enum ROIEN_A {
1051 #[doc = "0: Disables receive overflow interrupt output"]
1052 _0 = 0,
1053 #[doc = "1: Enables receive overflow interrupt output"]
1054 _1 = 1,
1055}
1056impl From<ROIEN_A> for bool {
1057 #[inline(always)]
1058 fn from(variant: ROIEN_A) -> Self {
1059 variant as u8 != 0
1060 }
1061}
1062impl ROIEN_R {
1063 #[doc = "Get enumerated values variant"]
1064 #[inline(always)]
1065 pub fn variant(&self) -> ROIEN_A {
1066 match self.bits {
1067 false => ROIEN_A::_0,
1068 true => ROIEN_A::_1,
1069 }
1070 }
1071 #[doc = "Checks if the value of the field is `_0`"]
1072 #[inline(always)]
1073 pub fn is_0(&self) -> bool {
1074 *self == ROIEN_A::_0
1075 }
1076 #[doc = "Checks if the value of the field is `_1`"]
1077 #[inline(always)]
1078 pub fn is_1(&self) -> bool {
1079 *self == ROIEN_A::_1
1080 }
1081}
1082#[doc = "Field `ROIEN` writer - Receive Overflow Interrupt Output Enable"]
1083pub type ROIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SSICR_SPEC, ROIEN_A, O>;
1084impl<'a, const O: u8> ROIEN_W<'a, O> {
1085 #[doc = "Disables receive overflow interrupt output"]
1086 #[inline(always)]
1087 pub fn _0(self) -> &'a mut W {
1088 self.variant(ROIEN_A::_0)
1089 }
1090 #[doc = "Enables receive overflow interrupt output"]
1091 #[inline(always)]
1092 pub fn _1(self) -> &'a mut W {
1093 self.variant(ROIEN_A::_1)
1094 }
1095}
1096#[doc = "Field `RUIEN` reader - Receive Underflow Interrupt Output Enable"]
1097pub type RUIEN_R = crate::BitReader<RUIEN_A>;
1098#[doc = "Receive Underflow Interrupt Output Enable\n\nValue on reset: 0"]
1099#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1100pub enum RUIEN_A {
1101 #[doc = "0: Disables receive underflow interrupt output"]
1102 _0 = 0,
1103 #[doc = "1: Enables receive underflow interrupt output"]
1104 _1 = 1,
1105}
1106impl From<RUIEN_A> for bool {
1107 #[inline(always)]
1108 fn from(variant: RUIEN_A) -> Self {
1109 variant as u8 != 0
1110 }
1111}
1112impl RUIEN_R {
1113 #[doc = "Get enumerated values variant"]
1114 #[inline(always)]
1115 pub fn variant(&self) -> RUIEN_A {
1116 match self.bits {
1117 false => RUIEN_A::_0,
1118 true => RUIEN_A::_1,
1119 }
1120 }
1121 #[doc = "Checks if the value of the field is `_0`"]
1122 #[inline(always)]
1123 pub fn is_0(&self) -> bool {
1124 *self == RUIEN_A::_0
1125 }
1126 #[doc = "Checks if the value of the field is `_1`"]
1127 #[inline(always)]
1128 pub fn is_1(&self) -> bool {
1129 *self == RUIEN_A::_1
1130 }
1131}
1132#[doc = "Field `RUIEN` writer - Receive Underflow Interrupt Output Enable"]
1133pub type RUIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SSICR_SPEC, RUIEN_A, O>;
1134impl<'a, const O: u8> RUIEN_W<'a, O> {
1135 #[doc = "Disables receive underflow interrupt output"]
1136 #[inline(always)]
1137 pub fn _0(self) -> &'a mut W {
1138 self.variant(RUIEN_A::_0)
1139 }
1140 #[doc = "Enables receive underflow interrupt output"]
1141 #[inline(always)]
1142 pub fn _1(self) -> &'a mut W {
1143 self.variant(RUIEN_A::_1)
1144 }
1145}
1146#[doc = "Field `TOIEN` reader - Transmit Overflow Interrupt Output Enable"]
1147pub type TOIEN_R = crate::BitReader<TOIEN_A>;
1148#[doc = "Transmit Overflow Interrupt Output Enable\n\nValue on reset: 0"]
1149#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1150pub enum TOIEN_A {
1151 #[doc = "0: Disables transmit overflow interrupt output"]
1152 _0 = 0,
1153 #[doc = "1: Enables transmit overflow interrupt output"]
1154 _1 = 1,
1155}
1156impl From<TOIEN_A> for bool {
1157 #[inline(always)]
1158 fn from(variant: TOIEN_A) -> Self {
1159 variant as u8 != 0
1160 }
1161}
1162impl TOIEN_R {
1163 #[doc = "Get enumerated values variant"]
1164 #[inline(always)]
1165 pub fn variant(&self) -> TOIEN_A {
1166 match self.bits {
1167 false => TOIEN_A::_0,
1168 true => TOIEN_A::_1,
1169 }
1170 }
1171 #[doc = "Checks if the value of the field is `_0`"]
1172 #[inline(always)]
1173 pub fn is_0(&self) -> bool {
1174 *self == TOIEN_A::_0
1175 }
1176 #[doc = "Checks if the value of the field is `_1`"]
1177 #[inline(always)]
1178 pub fn is_1(&self) -> bool {
1179 *self == TOIEN_A::_1
1180 }
1181}
1182#[doc = "Field `TOIEN` writer - Transmit Overflow Interrupt Output Enable"]
1183pub type TOIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SSICR_SPEC, TOIEN_A, O>;
1184impl<'a, const O: u8> TOIEN_W<'a, O> {
1185 #[doc = "Disables transmit overflow interrupt output"]
1186 #[inline(always)]
1187 pub fn _0(self) -> &'a mut W {
1188 self.variant(TOIEN_A::_0)
1189 }
1190 #[doc = "Enables transmit overflow interrupt output"]
1191 #[inline(always)]
1192 pub fn _1(self) -> &'a mut W {
1193 self.variant(TOIEN_A::_1)
1194 }
1195}
1196#[doc = "Field `TUIEN` reader - Transmit Underflow Interrupt Output Enable"]
1197pub type TUIEN_R = crate::BitReader<TUIEN_A>;
1198#[doc = "Transmit Underflow Interrupt Output Enable\n\nValue on reset: 0"]
1199#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1200pub enum TUIEN_A {
1201 #[doc = "0: Disables transmit underflow interrupt output"]
1202 _0 = 0,
1203 #[doc = "1: Enables transmit underflow interrupt output"]
1204 _1 = 1,
1205}
1206impl From<TUIEN_A> for bool {
1207 #[inline(always)]
1208 fn from(variant: TUIEN_A) -> Self {
1209 variant as u8 != 0
1210 }
1211}
1212impl TUIEN_R {
1213 #[doc = "Get enumerated values variant"]
1214 #[inline(always)]
1215 pub fn variant(&self) -> TUIEN_A {
1216 match self.bits {
1217 false => TUIEN_A::_0,
1218 true => TUIEN_A::_1,
1219 }
1220 }
1221 #[doc = "Checks if the value of the field is `_0`"]
1222 #[inline(always)]
1223 pub fn is_0(&self) -> bool {
1224 *self == TUIEN_A::_0
1225 }
1226 #[doc = "Checks if the value of the field is `_1`"]
1227 #[inline(always)]
1228 pub fn is_1(&self) -> bool {
1229 *self == TUIEN_A::_1
1230 }
1231}
1232#[doc = "Field `TUIEN` writer - Transmit Underflow Interrupt Output Enable"]
1233pub type TUIEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SSICR_SPEC, TUIEN_A, O>;
1234impl<'a, const O: u8> TUIEN_W<'a, O> {
1235 #[doc = "Disables transmit underflow interrupt output"]
1236 #[inline(always)]
1237 pub fn _0(self) -> &'a mut W {
1238 self.variant(TUIEN_A::_0)
1239 }
1240 #[doc = "Enables transmit underflow interrupt output"]
1241 #[inline(always)]
1242 pub fn _1(self) -> &'a mut W {
1243 self.variant(TUIEN_A::_1)
1244 }
1245}
1246#[doc = "Field `CKS` reader - Selects an Audio Clock for Master-mode Communication"]
1247pub type CKS_R = crate::BitReader<CKS_A>;
1248#[doc = "Selects an Audio Clock for Master-mode Communication\n\nValue on reset: 0"]
1249#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1250pub enum CKS_A {
1251 #[doc = "0: Selects the AUDIO_CLK input"]
1252 _0 = 0,
1253 #[doc = "1: Selects the GTIOC2A (GPT output)"]
1254 _1 = 1,
1255}
1256impl From<CKS_A> for bool {
1257 #[inline(always)]
1258 fn from(variant: CKS_A) -> Self {
1259 variant as u8 != 0
1260 }
1261}
1262impl CKS_R {
1263 #[doc = "Get enumerated values variant"]
1264 #[inline(always)]
1265 pub fn variant(&self) -> CKS_A {
1266 match self.bits {
1267 false => CKS_A::_0,
1268 true => CKS_A::_1,
1269 }
1270 }
1271 #[doc = "Checks if the value of the field is `_0`"]
1272 #[inline(always)]
1273 pub fn is_0(&self) -> bool {
1274 *self == CKS_A::_0
1275 }
1276 #[doc = "Checks if the value of the field is `_1`"]
1277 #[inline(always)]
1278 pub fn is_1(&self) -> bool {
1279 *self == CKS_A::_1
1280 }
1281}
1282#[doc = "Field `CKS` writer - Selects an Audio Clock for Master-mode Communication"]
1283pub type CKS_W<'a, const O: u8> = crate::BitWriter<'a, u32, SSICR_SPEC, CKS_A, O>;
1284impl<'a, const O: u8> CKS_W<'a, O> {
1285 #[doc = "Selects the AUDIO_CLK input"]
1286 #[inline(always)]
1287 pub fn _0(self) -> &'a mut W {
1288 self.variant(CKS_A::_0)
1289 }
1290 #[doc = "Selects the GTIOC2A (GPT output)"]
1291 #[inline(always)]
1292 pub fn _1(self) -> &'a mut W {
1293 self.variant(CKS_A::_1)
1294 }
1295}
1296impl R {
1297 #[doc = "Bit 0 - Reception Enable"]
1298 #[inline(always)]
1299 pub fn ren(&self) -> REN_R {
1300 REN_R::new((self.bits & 1) != 0)
1301 }
1302 #[doc = "Bit 1 - Transmission Enable"]
1303 #[inline(always)]
1304 pub fn ten(&self) -> TEN_R {
1305 TEN_R::new(((self.bits >> 1) & 1) != 0)
1306 }
1307 #[doc = "Bit 3 - Mute Enable"]
1308 #[inline(always)]
1309 pub fn muen(&self) -> MUEN_R {
1310 MUEN_R::new(((self.bits >> 3) & 1) != 0)
1311 }
1312 #[doc = "Bits 4:7 - Selects Bit Clock Division Ratio"]
1313 #[inline(always)]
1314 pub fn ckdv(&self) -> CKDV_R {
1315 CKDV_R::new(((self.bits >> 4) & 0x0f) as u8)
1316 }
1317 #[doc = "Bit 8 - Selects Serial Data Delay"]
1318 #[inline(always)]
1319 pub fn del(&self) -> DEL_R {
1320 DEL_R::new(((self.bits >> 8) & 1) != 0)
1321 }
1322 #[doc = "Bit 9 - Selects Placement Data Alignment"]
1323 #[inline(always)]
1324 pub fn pdta(&self) -> PDTA_R {
1325 PDTA_R::new(((self.bits >> 9) & 1) != 0)
1326 }
1327 #[doc = "Bit 10 - Selects Serial Data Alignment"]
1328 #[inline(always)]
1329 pub fn sdta(&self) -> SDTA_R {
1330 SDTA_R::new(((self.bits >> 10) & 1) != 0)
1331 }
1332 #[doc = "Bit 11 - Selects Serial Padding Polarity"]
1333 #[inline(always)]
1334 pub fn spdp(&self) -> SPDP_R {
1335 SPDP_R::new(((self.bits >> 11) & 1) != 0)
1336 }
1337 #[doc = "Bit 12 - Selects the Initial Value and Polarity of LR Clock/Frame Synchronization Signal"]
1338 #[inline(always)]
1339 pub fn lrckp(&self) -> LRCKP_R {
1340 LRCKP_R::new(((self.bits >> 12) & 1) != 0)
1341 }
1342 #[doc = "Bit 13 - Selects Bit Clock Polarity"]
1343 #[inline(always)]
1344 pub fn bckp(&self) -> BCKP_R {
1345 BCKP_R::new(((self.bits >> 13) & 1) != 0)
1346 }
1347 #[doc = "Bit 14 - Master Enable"]
1348 #[inline(always)]
1349 pub fn mst(&self) -> MST_R {
1350 MST_R::new(((self.bits >> 14) & 1) != 0)
1351 }
1352 #[doc = "Bits 16:18 - Selects System Word Length"]
1353 #[inline(always)]
1354 pub fn swl(&self) -> SWL_R {
1355 SWL_R::new(((self.bits >> 16) & 7) as u8)
1356 }
1357 #[doc = "Bits 19:21 - Selects Data Word Length"]
1358 #[inline(always)]
1359 pub fn dwl(&self) -> DWL_R {
1360 DWL_R::new(((self.bits >> 19) & 7) as u8)
1361 }
1362 #[doc = "Bits 22:23 - Selects Frame Word Number"]
1363 #[inline(always)]
1364 pub fn frm(&self) -> FRM_R {
1365 FRM_R::new(((self.bits >> 22) & 3) as u8)
1366 }
1367 #[doc = "Bit 25 - Idle Mode Interrupt Output Enable"]
1368 #[inline(always)]
1369 pub fn iien(&self) -> IIEN_R {
1370 IIEN_R::new(((self.bits >> 25) & 1) != 0)
1371 }
1372 #[doc = "Bit 26 - Receive Overflow Interrupt Output Enable"]
1373 #[inline(always)]
1374 pub fn roien(&self) -> ROIEN_R {
1375 ROIEN_R::new(((self.bits >> 26) & 1) != 0)
1376 }
1377 #[doc = "Bit 27 - Receive Underflow Interrupt Output Enable"]
1378 #[inline(always)]
1379 pub fn ruien(&self) -> RUIEN_R {
1380 RUIEN_R::new(((self.bits >> 27) & 1) != 0)
1381 }
1382 #[doc = "Bit 28 - Transmit Overflow Interrupt Output Enable"]
1383 #[inline(always)]
1384 pub fn toien(&self) -> TOIEN_R {
1385 TOIEN_R::new(((self.bits >> 28) & 1) != 0)
1386 }
1387 #[doc = "Bit 29 - Transmit Underflow Interrupt Output Enable"]
1388 #[inline(always)]
1389 pub fn tuien(&self) -> TUIEN_R {
1390 TUIEN_R::new(((self.bits >> 29) & 1) != 0)
1391 }
1392 #[doc = "Bit 30 - Selects an Audio Clock for Master-mode Communication"]
1393 #[inline(always)]
1394 pub fn cks(&self) -> CKS_R {
1395 CKS_R::new(((self.bits >> 30) & 1) != 0)
1396 }
1397}
1398impl W {
1399 #[doc = "Bit 0 - Reception Enable"]
1400 #[inline(always)]
1401 #[must_use]
1402 pub fn ren(&mut self) -> REN_W<0> {
1403 REN_W::new(self)
1404 }
1405 #[doc = "Bit 1 - Transmission Enable"]
1406 #[inline(always)]
1407 #[must_use]
1408 pub fn ten(&mut self) -> TEN_W<1> {
1409 TEN_W::new(self)
1410 }
1411 #[doc = "Bit 3 - Mute Enable"]
1412 #[inline(always)]
1413 #[must_use]
1414 pub fn muen(&mut self) -> MUEN_W<3> {
1415 MUEN_W::new(self)
1416 }
1417 #[doc = "Bits 4:7 - Selects Bit Clock Division Ratio"]
1418 #[inline(always)]
1419 #[must_use]
1420 pub fn ckdv(&mut self) -> CKDV_W<4> {
1421 CKDV_W::new(self)
1422 }
1423 #[doc = "Bit 8 - Selects Serial Data Delay"]
1424 #[inline(always)]
1425 #[must_use]
1426 pub fn del(&mut self) -> DEL_W<8> {
1427 DEL_W::new(self)
1428 }
1429 #[doc = "Bit 9 - Selects Placement Data Alignment"]
1430 #[inline(always)]
1431 #[must_use]
1432 pub fn pdta(&mut self) -> PDTA_W<9> {
1433 PDTA_W::new(self)
1434 }
1435 #[doc = "Bit 10 - Selects Serial Data Alignment"]
1436 #[inline(always)]
1437 #[must_use]
1438 pub fn sdta(&mut self) -> SDTA_W<10> {
1439 SDTA_W::new(self)
1440 }
1441 #[doc = "Bit 11 - Selects Serial Padding Polarity"]
1442 #[inline(always)]
1443 #[must_use]
1444 pub fn spdp(&mut self) -> SPDP_W<11> {
1445 SPDP_W::new(self)
1446 }
1447 #[doc = "Bit 12 - Selects the Initial Value and Polarity of LR Clock/Frame Synchronization Signal"]
1448 #[inline(always)]
1449 #[must_use]
1450 pub fn lrckp(&mut self) -> LRCKP_W<12> {
1451 LRCKP_W::new(self)
1452 }
1453 #[doc = "Bit 13 - Selects Bit Clock Polarity"]
1454 #[inline(always)]
1455 #[must_use]
1456 pub fn bckp(&mut self) -> BCKP_W<13> {
1457 BCKP_W::new(self)
1458 }
1459 #[doc = "Bit 14 - Master Enable"]
1460 #[inline(always)]
1461 #[must_use]
1462 pub fn mst(&mut self) -> MST_W<14> {
1463 MST_W::new(self)
1464 }
1465 #[doc = "Bits 16:18 - Selects System Word Length"]
1466 #[inline(always)]
1467 #[must_use]
1468 pub fn swl(&mut self) -> SWL_W<16> {
1469 SWL_W::new(self)
1470 }
1471 #[doc = "Bits 19:21 - Selects Data Word Length"]
1472 #[inline(always)]
1473 #[must_use]
1474 pub fn dwl(&mut self) -> DWL_W<19> {
1475 DWL_W::new(self)
1476 }
1477 #[doc = "Bits 22:23 - Selects Frame Word Number"]
1478 #[inline(always)]
1479 #[must_use]
1480 pub fn frm(&mut self) -> FRM_W<22> {
1481 FRM_W::new(self)
1482 }
1483 #[doc = "Bit 25 - Idle Mode Interrupt Output Enable"]
1484 #[inline(always)]
1485 #[must_use]
1486 pub fn iien(&mut self) -> IIEN_W<25> {
1487 IIEN_W::new(self)
1488 }
1489 #[doc = "Bit 26 - Receive Overflow Interrupt Output Enable"]
1490 #[inline(always)]
1491 #[must_use]
1492 pub fn roien(&mut self) -> ROIEN_W<26> {
1493 ROIEN_W::new(self)
1494 }
1495 #[doc = "Bit 27 - Receive Underflow Interrupt Output Enable"]
1496 #[inline(always)]
1497 #[must_use]
1498 pub fn ruien(&mut self) -> RUIEN_W<27> {
1499 RUIEN_W::new(self)
1500 }
1501 #[doc = "Bit 28 - Transmit Overflow Interrupt Output Enable"]
1502 #[inline(always)]
1503 #[must_use]
1504 pub fn toien(&mut self) -> TOIEN_W<28> {
1505 TOIEN_W::new(self)
1506 }
1507 #[doc = "Bit 29 - Transmit Underflow Interrupt Output Enable"]
1508 #[inline(always)]
1509 #[must_use]
1510 pub fn tuien(&mut self) -> TUIEN_W<29> {
1511 TUIEN_W::new(self)
1512 }
1513 #[doc = "Bit 30 - Selects an Audio Clock for Master-mode Communication"]
1514 #[inline(always)]
1515 #[must_use]
1516 pub fn cks(&mut self) -> CKS_W<30> {
1517 CKS_W::new(self)
1518 }
1519 #[doc = "Writes raw bits to the register."]
1520 #[inline(always)]
1521 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1522 self.0.bits(bits);
1523 self
1524 }
1525}
1526#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ssicr](index.html) module"]
1527pub struct SSICR_SPEC;
1528impl crate::RegisterSpec for SSICR_SPEC {
1529 type Ux = u32;
1530}
1531#[doc = "`read()` method returns [ssicr::R](R) reader structure"]
1532impl crate::Readable for SSICR_SPEC {
1533 type Reader = R;
1534}
1535#[doc = "`write(|w| ..)` method takes [ssicr::W](W) writer structure"]
1536impl crate::Writable for SSICR_SPEC {
1537 type Writer = W;
1538 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
1539 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
1540}
1541#[doc = "`reset()` method sets SSICR to value 0"]
1542impl crate::Resettable for SSICR_SPEC {
1543 const RESET_VALUE: Self::Ux = 0;
1544}