ra6m3/edmac0/
eesipr.rs

1#[doc = "Register `EESIPR` reader"]
2pub struct R(crate::R<EESIPR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<EESIPR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<EESIPR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<EESIPR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `EESIPR` writer"]
17pub struct W(crate::W<EESIPR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<EESIPR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<EESIPR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<EESIPR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CERFIP` reader - CRC Error Interrupt Request Enable"]
38pub type CERFIP_R = crate::BitReader<CERFIP_A>;
39#[doc = "CRC Error Interrupt Request Enable\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum CERFIP_A {
42    #[doc = "0: CRC error interrupt request is disabled."]
43    _0 = 0,
44    #[doc = "1: CRC error interrupt request is enabled."]
45    _1 = 1,
46}
47impl From<CERFIP_A> for bool {
48    #[inline(always)]
49    fn from(variant: CERFIP_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl CERFIP_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> CERFIP_A {
57        match self.bits {
58            false => CERFIP_A::_0,
59            true => CERFIP_A::_1,
60        }
61    }
62    #[doc = "Checks if the value of the field is `_0`"]
63    #[inline(always)]
64    pub fn is_0(&self) -> bool {
65        *self == CERFIP_A::_0
66    }
67    #[doc = "Checks if the value of the field is `_1`"]
68    #[inline(always)]
69    pub fn is_1(&self) -> bool {
70        *self == CERFIP_A::_1
71    }
72}
73#[doc = "Field `CERFIP` writer - CRC Error Interrupt Request Enable"]
74pub type CERFIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EESIPR_SPEC, CERFIP_A, O>;
75impl<'a, const O: u8> CERFIP_W<'a, O> {
76    #[doc = "CRC error interrupt request is disabled."]
77    #[inline(always)]
78    pub fn _0(self) -> &'a mut W {
79        self.variant(CERFIP_A::_0)
80    }
81    #[doc = "CRC error interrupt request is enabled."]
82    #[inline(always)]
83    pub fn _1(self) -> &'a mut W {
84        self.variant(CERFIP_A::_1)
85    }
86}
87#[doc = "Field `PREIP` reader - PHY-LSI Receive Error Interrupt Request Enable"]
88pub type PREIP_R = crate::BitReader<PREIP_A>;
89#[doc = "PHY-LSI Receive Error Interrupt Request Enable\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum PREIP_A {
92    #[doc = "0: PHY-LSI receive error interrupt request is disabled."]
93    _0 = 0,
94    #[doc = "1: PHY-LSI receive error interrupt request is enabled."]
95    _1 = 1,
96}
97impl From<PREIP_A> for bool {
98    #[inline(always)]
99    fn from(variant: PREIP_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl PREIP_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> PREIP_A {
107        match self.bits {
108            false => PREIP_A::_0,
109            true => PREIP_A::_1,
110        }
111    }
112    #[doc = "Checks if the value of the field is `_0`"]
113    #[inline(always)]
114    pub fn is_0(&self) -> bool {
115        *self == PREIP_A::_0
116    }
117    #[doc = "Checks if the value of the field is `_1`"]
118    #[inline(always)]
119    pub fn is_1(&self) -> bool {
120        *self == PREIP_A::_1
121    }
122}
123#[doc = "Field `PREIP` writer - PHY-LSI Receive Error Interrupt Request Enable"]
124pub type PREIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EESIPR_SPEC, PREIP_A, O>;
125impl<'a, const O: u8> PREIP_W<'a, O> {
126    #[doc = "PHY-LSI receive error interrupt request is disabled."]
127    #[inline(always)]
128    pub fn _0(self) -> &'a mut W {
129        self.variant(PREIP_A::_0)
130    }
131    #[doc = "PHY-LSI receive error interrupt request is enabled."]
132    #[inline(always)]
133    pub fn _1(self) -> &'a mut W {
134        self.variant(PREIP_A::_1)
135    }
136}
137#[doc = "Field `RTSFIP` reader - Frame-Too-Short Error Interrupt Request Enable"]
138pub type RTSFIP_R = crate::BitReader<RTSFIP_A>;
139#[doc = "Frame-Too-Short Error Interrupt Request Enable\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum RTSFIP_A {
142    #[doc = "0: Frame-too-short error interrupt request is disabled."]
143    _0 = 0,
144    #[doc = "1: Frame-too-short error interrupt request is enabled."]
145    _1 = 1,
146}
147impl From<RTSFIP_A> for bool {
148    #[inline(always)]
149    fn from(variant: RTSFIP_A) -> Self {
150        variant as u8 != 0
151    }
152}
153impl RTSFIP_R {
154    #[doc = "Get enumerated values variant"]
155    #[inline(always)]
156    pub fn variant(&self) -> RTSFIP_A {
157        match self.bits {
158            false => RTSFIP_A::_0,
159            true => RTSFIP_A::_1,
160        }
161    }
162    #[doc = "Checks if the value of the field is `_0`"]
163    #[inline(always)]
164    pub fn is_0(&self) -> bool {
165        *self == RTSFIP_A::_0
166    }
167    #[doc = "Checks if the value of the field is `_1`"]
168    #[inline(always)]
169    pub fn is_1(&self) -> bool {
170        *self == RTSFIP_A::_1
171    }
172}
173#[doc = "Field `RTSFIP` writer - Frame-Too-Short Error Interrupt Request Enable"]
174pub type RTSFIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EESIPR_SPEC, RTSFIP_A, O>;
175impl<'a, const O: u8> RTSFIP_W<'a, O> {
176    #[doc = "Frame-too-short error interrupt request is disabled."]
177    #[inline(always)]
178    pub fn _0(self) -> &'a mut W {
179        self.variant(RTSFIP_A::_0)
180    }
181    #[doc = "Frame-too-short error interrupt request is enabled."]
182    #[inline(always)]
183    pub fn _1(self) -> &'a mut W {
184        self.variant(RTSFIP_A::_1)
185    }
186}
187#[doc = "Field `RTLFIP` reader - Frame-Too-Long Error Interrupt Request Enable"]
188pub type RTLFIP_R = crate::BitReader<RTLFIP_A>;
189#[doc = "Frame-Too-Long Error Interrupt Request Enable\n\nValue on reset: 0"]
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191pub enum RTLFIP_A {
192    #[doc = "0: Frame-too-long error interrupt request is disabled."]
193    _0 = 0,
194    #[doc = "1: Frame-too-long error interrupt request is enabled."]
195    _1 = 1,
196}
197impl From<RTLFIP_A> for bool {
198    #[inline(always)]
199    fn from(variant: RTLFIP_A) -> Self {
200        variant as u8 != 0
201    }
202}
203impl RTLFIP_R {
204    #[doc = "Get enumerated values variant"]
205    #[inline(always)]
206    pub fn variant(&self) -> RTLFIP_A {
207        match self.bits {
208            false => RTLFIP_A::_0,
209            true => RTLFIP_A::_1,
210        }
211    }
212    #[doc = "Checks if the value of the field is `_0`"]
213    #[inline(always)]
214    pub fn is_0(&self) -> bool {
215        *self == RTLFIP_A::_0
216    }
217    #[doc = "Checks if the value of the field is `_1`"]
218    #[inline(always)]
219    pub fn is_1(&self) -> bool {
220        *self == RTLFIP_A::_1
221    }
222}
223#[doc = "Field `RTLFIP` writer - Frame-Too-Long Error Interrupt Request Enable"]
224pub type RTLFIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EESIPR_SPEC, RTLFIP_A, O>;
225impl<'a, const O: u8> RTLFIP_W<'a, O> {
226    #[doc = "Frame-too-long error interrupt request is disabled."]
227    #[inline(always)]
228    pub fn _0(self) -> &'a mut W {
229        self.variant(RTLFIP_A::_0)
230    }
231    #[doc = "Frame-too-long error interrupt request is enabled."]
232    #[inline(always)]
233    pub fn _1(self) -> &'a mut W {
234        self.variant(RTLFIP_A::_1)
235    }
236}
237#[doc = "Field `RRFIP` reader - Alignment Error Interrupt Request Enable"]
238pub type RRFIP_R = crate::BitReader<RRFIP_A>;
239#[doc = "Alignment Error Interrupt Request Enable\n\nValue on reset: 0"]
240#[derive(Clone, Copy, Debug, PartialEq, Eq)]
241pub enum RRFIP_A {
242    #[doc = "0: Alignment error interrupt request is disabled."]
243    _0 = 0,
244    #[doc = "1: Alignment error interrupt request is enabled."]
245    _1 = 1,
246}
247impl From<RRFIP_A> for bool {
248    #[inline(always)]
249    fn from(variant: RRFIP_A) -> Self {
250        variant as u8 != 0
251    }
252}
253impl RRFIP_R {
254    #[doc = "Get enumerated values variant"]
255    #[inline(always)]
256    pub fn variant(&self) -> RRFIP_A {
257        match self.bits {
258            false => RRFIP_A::_0,
259            true => RRFIP_A::_1,
260        }
261    }
262    #[doc = "Checks if the value of the field is `_0`"]
263    #[inline(always)]
264    pub fn is_0(&self) -> bool {
265        *self == RRFIP_A::_0
266    }
267    #[doc = "Checks if the value of the field is `_1`"]
268    #[inline(always)]
269    pub fn is_1(&self) -> bool {
270        *self == RRFIP_A::_1
271    }
272}
273#[doc = "Field `RRFIP` writer - Alignment Error Interrupt Request Enable"]
274pub type RRFIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EESIPR_SPEC, RRFIP_A, O>;
275impl<'a, const O: u8> RRFIP_W<'a, O> {
276    #[doc = "Alignment error interrupt request is disabled."]
277    #[inline(always)]
278    pub fn _0(self) -> &'a mut W {
279        self.variant(RRFIP_A::_0)
280    }
281    #[doc = "Alignment error interrupt request is enabled."]
282    #[inline(always)]
283    pub fn _1(self) -> &'a mut W {
284        self.variant(RRFIP_A::_1)
285    }
286}
287#[doc = "Field `RMAFIP` reader - Multicast Address Frame Receive Interrupt Request Enable"]
288pub type RMAFIP_R = crate::BitReader<RMAFIP_A>;
289#[doc = "Multicast Address Frame Receive Interrupt Request Enable\n\nValue on reset: 0"]
290#[derive(Clone, Copy, Debug, PartialEq, Eq)]
291pub enum RMAFIP_A {
292    #[doc = "0: Multicast address frame receive interrupt request is disabled."]
293    _0 = 0,
294    #[doc = "1: Multicast address frame receive interrupt request is enabled."]
295    _1 = 1,
296}
297impl From<RMAFIP_A> for bool {
298    #[inline(always)]
299    fn from(variant: RMAFIP_A) -> Self {
300        variant as u8 != 0
301    }
302}
303impl RMAFIP_R {
304    #[doc = "Get enumerated values variant"]
305    #[inline(always)]
306    pub fn variant(&self) -> RMAFIP_A {
307        match self.bits {
308            false => RMAFIP_A::_0,
309            true => RMAFIP_A::_1,
310        }
311    }
312    #[doc = "Checks if the value of the field is `_0`"]
313    #[inline(always)]
314    pub fn is_0(&self) -> bool {
315        *self == RMAFIP_A::_0
316    }
317    #[doc = "Checks if the value of the field is `_1`"]
318    #[inline(always)]
319    pub fn is_1(&self) -> bool {
320        *self == RMAFIP_A::_1
321    }
322}
323#[doc = "Field `RMAFIP` writer - Multicast Address Frame Receive Interrupt Request Enable"]
324pub type RMAFIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EESIPR_SPEC, RMAFIP_A, O>;
325impl<'a, const O: u8> RMAFIP_W<'a, O> {
326    #[doc = "Multicast address frame receive interrupt request is disabled."]
327    #[inline(always)]
328    pub fn _0(self) -> &'a mut W {
329        self.variant(RMAFIP_A::_0)
330    }
331    #[doc = "Multicast address frame receive interrupt request is enabled."]
332    #[inline(always)]
333    pub fn _1(self) -> &'a mut W {
334        self.variant(RMAFIP_A::_1)
335    }
336}
337#[doc = "Field `TROIP` reader - Transmit Retry Over Interrupt Request Enable"]
338pub type TROIP_R = crate::BitReader<TROIP_A>;
339#[doc = "Transmit Retry Over Interrupt Request Enable\n\nValue on reset: 0"]
340#[derive(Clone, Copy, Debug, PartialEq, Eq)]
341pub enum TROIP_A {
342    #[doc = "0: Transmit retry over interrupt request is disabled."]
343    _0 = 0,
344    #[doc = "1: Transmit retry over interrupt request is enabled."]
345    _1 = 1,
346}
347impl From<TROIP_A> for bool {
348    #[inline(always)]
349    fn from(variant: TROIP_A) -> Self {
350        variant as u8 != 0
351    }
352}
353impl TROIP_R {
354    #[doc = "Get enumerated values variant"]
355    #[inline(always)]
356    pub fn variant(&self) -> TROIP_A {
357        match self.bits {
358            false => TROIP_A::_0,
359            true => TROIP_A::_1,
360        }
361    }
362    #[doc = "Checks if the value of the field is `_0`"]
363    #[inline(always)]
364    pub fn is_0(&self) -> bool {
365        *self == TROIP_A::_0
366    }
367    #[doc = "Checks if the value of the field is `_1`"]
368    #[inline(always)]
369    pub fn is_1(&self) -> bool {
370        *self == TROIP_A::_1
371    }
372}
373#[doc = "Field `TROIP` writer - Transmit Retry Over Interrupt Request Enable"]
374pub type TROIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EESIPR_SPEC, TROIP_A, O>;
375impl<'a, const O: u8> TROIP_W<'a, O> {
376    #[doc = "Transmit retry over interrupt request is disabled."]
377    #[inline(always)]
378    pub fn _0(self) -> &'a mut W {
379        self.variant(TROIP_A::_0)
380    }
381    #[doc = "Transmit retry over interrupt request is enabled."]
382    #[inline(always)]
383    pub fn _1(self) -> &'a mut W {
384        self.variant(TROIP_A::_1)
385    }
386}
387#[doc = "Field `CDIP` reader - Late Collision Detect Interrupt Request Enable"]
388pub type CDIP_R = crate::BitReader<CDIP_A>;
389#[doc = "Late Collision Detect Interrupt Request Enable\n\nValue on reset: 0"]
390#[derive(Clone, Copy, Debug, PartialEq, Eq)]
391pub enum CDIP_A {
392    #[doc = "0: Late collision detect interrupt request is disabled."]
393    _0 = 0,
394    #[doc = "1: Late collision detect interrupt request is enabled."]
395    _1 = 1,
396}
397impl From<CDIP_A> for bool {
398    #[inline(always)]
399    fn from(variant: CDIP_A) -> Self {
400        variant as u8 != 0
401    }
402}
403impl CDIP_R {
404    #[doc = "Get enumerated values variant"]
405    #[inline(always)]
406    pub fn variant(&self) -> CDIP_A {
407        match self.bits {
408            false => CDIP_A::_0,
409            true => CDIP_A::_1,
410        }
411    }
412    #[doc = "Checks if the value of the field is `_0`"]
413    #[inline(always)]
414    pub fn is_0(&self) -> bool {
415        *self == CDIP_A::_0
416    }
417    #[doc = "Checks if the value of the field is `_1`"]
418    #[inline(always)]
419    pub fn is_1(&self) -> bool {
420        *self == CDIP_A::_1
421    }
422}
423#[doc = "Field `CDIP` writer - Late Collision Detect Interrupt Request Enable"]
424pub type CDIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EESIPR_SPEC, CDIP_A, O>;
425impl<'a, const O: u8> CDIP_W<'a, O> {
426    #[doc = "Late collision detect interrupt request is disabled."]
427    #[inline(always)]
428    pub fn _0(self) -> &'a mut W {
429        self.variant(CDIP_A::_0)
430    }
431    #[doc = "Late collision detect interrupt request is enabled."]
432    #[inline(always)]
433    pub fn _1(self) -> &'a mut W {
434        self.variant(CDIP_A::_1)
435    }
436}
437#[doc = "Field `DLCIP` reader - Loss of Carrier Detect Interrupt Request Enable"]
438pub type DLCIP_R = crate::BitReader<DLCIP_A>;
439#[doc = "Loss of Carrier Detect Interrupt Request Enable\n\nValue on reset: 0"]
440#[derive(Clone, Copy, Debug, PartialEq, Eq)]
441pub enum DLCIP_A {
442    #[doc = "0: Loss of carrier detect interrupt request is disabled."]
443    _0 = 0,
444    #[doc = "1: Loss of carrier detect interrupt request is enabled."]
445    _1 = 1,
446}
447impl From<DLCIP_A> for bool {
448    #[inline(always)]
449    fn from(variant: DLCIP_A) -> Self {
450        variant as u8 != 0
451    }
452}
453impl DLCIP_R {
454    #[doc = "Get enumerated values variant"]
455    #[inline(always)]
456    pub fn variant(&self) -> DLCIP_A {
457        match self.bits {
458            false => DLCIP_A::_0,
459            true => DLCIP_A::_1,
460        }
461    }
462    #[doc = "Checks if the value of the field is `_0`"]
463    #[inline(always)]
464    pub fn is_0(&self) -> bool {
465        *self == DLCIP_A::_0
466    }
467    #[doc = "Checks if the value of the field is `_1`"]
468    #[inline(always)]
469    pub fn is_1(&self) -> bool {
470        *self == DLCIP_A::_1
471    }
472}
473#[doc = "Field `DLCIP` writer - Loss of Carrier Detect Interrupt Request Enable"]
474pub type DLCIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EESIPR_SPEC, DLCIP_A, O>;
475impl<'a, const O: u8> DLCIP_W<'a, O> {
476    #[doc = "Loss of carrier detect interrupt request is disabled."]
477    #[inline(always)]
478    pub fn _0(self) -> &'a mut W {
479        self.variant(DLCIP_A::_0)
480    }
481    #[doc = "Loss of carrier detect interrupt request is enabled."]
482    #[inline(always)]
483    pub fn _1(self) -> &'a mut W {
484        self.variant(DLCIP_A::_1)
485    }
486}
487#[doc = "Field `CNDIP` reader - Carrier Not Detect Interrupt Request Enable"]
488pub type CNDIP_R = crate::BitReader<CNDIP_A>;
489#[doc = "Carrier Not Detect Interrupt Request Enable\n\nValue on reset: 0"]
490#[derive(Clone, Copy, Debug, PartialEq, Eq)]
491pub enum CNDIP_A {
492    #[doc = "0: Carrier not detect interrupt request is disabled."]
493    _0 = 0,
494    #[doc = "1: Carrier not detect interrupt request is enabled."]
495    _1 = 1,
496}
497impl From<CNDIP_A> for bool {
498    #[inline(always)]
499    fn from(variant: CNDIP_A) -> Self {
500        variant as u8 != 0
501    }
502}
503impl CNDIP_R {
504    #[doc = "Get enumerated values variant"]
505    #[inline(always)]
506    pub fn variant(&self) -> CNDIP_A {
507        match self.bits {
508            false => CNDIP_A::_0,
509            true => CNDIP_A::_1,
510        }
511    }
512    #[doc = "Checks if the value of the field is `_0`"]
513    #[inline(always)]
514    pub fn is_0(&self) -> bool {
515        *self == CNDIP_A::_0
516    }
517    #[doc = "Checks if the value of the field is `_1`"]
518    #[inline(always)]
519    pub fn is_1(&self) -> bool {
520        *self == CNDIP_A::_1
521    }
522}
523#[doc = "Field `CNDIP` writer - Carrier Not Detect Interrupt Request Enable"]
524pub type CNDIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EESIPR_SPEC, CNDIP_A, O>;
525impl<'a, const O: u8> CNDIP_W<'a, O> {
526    #[doc = "Carrier not detect interrupt request is disabled."]
527    #[inline(always)]
528    pub fn _0(self) -> &'a mut W {
529        self.variant(CNDIP_A::_0)
530    }
531    #[doc = "Carrier not detect interrupt request is enabled."]
532    #[inline(always)]
533    pub fn _1(self) -> &'a mut W {
534        self.variant(CNDIP_A::_1)
535    }
536}
537#[doc = "Field `RFOFIP` reader - Receive FIFO Overflow Interrupt Request Enable"]
538pub type RFOFIP_R = crate::BitReader<RFOFIP_A>;
539#[doc = "Receive FIFO Overflow Interrupt Request Enable\n\nValue on reset: 0"]
540#[derive(Clone, Copy, Debug, PartialEq, Eq)]
541pub enum RFOFIP_A {
542    #[doc = "0: Overflow interrupt request is disabled."]
543    _0 = 0,
544    #[doc = "1: Overflow interrupt request is enabled."]
545    _1 = 1,
546}
547impl From<RFOFIP_A> for bool {
548    #[inline(always)]
549    fn from(variant: RFOFIP_A) -> Self {
550        variant as u8 != 0
551    }
552}
553impl RFOFIP_R {
554    #[doc = "Get enumerated values variant"]
555    #[inline(always)]
556    pub fn variant(&self) -> RFOFIP_A {
557        match self.bits {
558            false => RFOFIP_A::_0,
559            true => RFOFIP_A::_1,
560        }
561    }
562    #[doc = "Checks if the value of the field is `_0`"]
563    #[inline(always)]
564    pub fn is_0(&self) -> bool {
565        *self == RFOFIP_A::_0
566    }
567    #[doc = "Checks if the value of the field is `_1`"]
568    #[inline(always)]
569    pub fn is_1(&self) -> bool {
570        *self == RFOFIP_A::_1
571    }
572}
573#[doc = "Field `RFOFIP` writer - Receive FIFO Overflow Interrupt Request Enable"]
574pub type RFOFIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EESIPR_SPEC, RFOFIP_A, O>;
575impl<'a, const O: u8> RFOFIP_W<'a, O> {
576    #[doc = "Overflow interrupt request is disabled."]
577    #[inline(always)]
578    pub fn _0(self) -> &'a mut W {
579        self.variant(RFOFIP_A::_0)
580    }
581    #[doc = "Overflow interrupt request is enabled."]
582    #[inline(always)]
583    pub fn _1(self) -> &'a mut W {
584        self.variant(RFOFIP_A::_1)
585    }
586}
587#[doc = "Field `RDEIP` reader - Receive Descriptor Empty Interrupt Request Enable"]
588pub type RDEIP_R = crate::BitReader<RDEIP_A>;
589#[doc = "Receive Descriptor Empty Interrupt Request Enable\n\nValue on reset: 0"]
590#[derive(Clone, Copy, Debug, PartialEq, Eq)]
591pub enum RDEIP_A {
592    #[doc = "0: Receive descriptor empty interrupt request is disabled."]
593    _0 = 0,
594    #[doc = "1: Receive descriptor empty interrupt request is enabled."]
595    _1 = 1,
596}
597impl From<RDEIP_A> for bool {
598    #[inline(always)]
599    fn from(variant: RDEIP_A) -> Self {
600        variant as u8 != 0
601    }
602}
603impl RDEIP_R {
604    #[doc = "Get enumerated values variant"]
605    #[inline(always)]
606    pub fn variant(&self) -> RDEIP_A {
607        match self.bits {
608            false => RDEIP_A::_0,
609            true => RDEIP_A::_1,
610        }
611    }
612    #[doc = "Checks if the value of the field is `_0`"]
613    #[inline(always)]
614    pub fn is_0(&self) -> bool {
615        *self == RDEIP_A::_0
616    }
617    #[doc = "Checks if the value of the field is `_1`"]
618    #[inline(always)]
619    pub fn is_1(&self) -> bool {
620        *self == RDEIP_A::_1
621    }
622}
623#[doc = "Field `RDEIP` writer - Receive Descriptor Empty Interrupt Request Enable"]
624pub type RDEIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EESIPR_SPEC, RDEIP_A, O>;
625impl<'a, const O: u8> RDEIP_W<'a, O> {
626    #[doc = "Receive descriptor empty interrupt request is disabled."]
627    #[inline(always)]
628    pub fn _0(self) -> &'a mut W {
629        self.variant(RDEIP_A::_0)
630    }
631    #[doc = "Receive descriptor empty interrupt request is enabled."]
632    #[inline(always)]
633    pub fn _1(self) -> &'a mut W {
634        self.variant(RDEIP_A::_1)
635    }
636}
637#[doc = "Field `FRIP` reader - Frame Receive Interrupt Request Enable"]
638pub type FRIP_R = crate::BitReader<FRIP_A>;
639#[doc = "Frame Receive Interrupt Request Enable\n\nValue on reset: 0"]
640#[derive(Clone, Copy, Debug, PartialEq, Eq)]
641pub enum FRIP_A {
642    #[doc = "0: Frame reception interrupt request is disabled."]
643    _0 = 0,
644    #[doc = "1: Frame reception interrupt request is enabled."]
645    _1 = 1,
646}
647impl From<FRIP_A> for bool {
648    #[inline(always)]
649    fn from(variant: FRIP_A) -> Self {
650        variant as u8 != 0
651    }
652}
653impl FRIP_R {
654    #[doc = "Get enumerated values variant"]
655    #[inline(always)]
656    pub fn variant(&self) -> FRIP_A {
657        match self.bits {
658            false => FRIP_A::_0,
659            true => FRIP_A::_1,
660        }
661    }
662    #[doc = "Checks if the value of the field is `_0`"]
663    #[inline(always)]
664    pub fn is_0(&self) -> bool {
665        *self == FRIP_A::_0
666    }
667    #[doc = "Checks if the value of the field is `_1`"]
668    #[inline(always)]
669    pub fn is_1(&self) -> bool {
670        *self == FRIP_A::_1
671    }
672}
673#[doc = "Field `FRIP` writer - Frame Receive Interrupt Request Enable"]
674pub type FRIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EESIPR_SPEC, FRIP_A, O>;
675impl<'a, const O: u8> FRIP_W<'a, O> {
676    #[doc = "Frame reception interrupt request is disabled."]
677    #[inline(always)]
678    pub fn _0(self) -> &'a mut W {
679        self.variant(FRIP_A::_0)
680    }
681    #[doc = "Frame reception interrupt request is enabled."]
682    #[inline(always)]
683    pub fn _1(self) -> &'a mut W {
684        self.variant(FRIP_A::_1)
685    }
686}
687#[doc = "Field `TFUFIP` reader - Transmit FIFO Underflow Interrupt Request Enable"]
688pub type TFUFIP_R = crate::BitReader<TFUFIP_A>;
689#[doc = "Transmit FIFO Underflow Interrupt Request Enable\n\nValue on reset: 0"]
690#[derive(Clone, Copy, Debug, PartialEq, Eq)]
691pub enum TFUFIP_A {
692    #[doc = "0: Underflow interrupt request is disabled."]
693    _0 = 0,
694    #[doc = "1: Underflow interrupt request is enabled."]
695    _1 = 1,
696}
697impl From<TFUFIP_A> for bool {
698    #[inline(always)]
699    fn from(variant: TFUFIP_A) -> Self {
700        variant as u8 != 0
701    }
702}
703impl TFUFIP_R {
704    #[doc = "Get enumerated values variant"]
705    #[inline(always)]
706    pub fn variant(&self) -> TFUFIP_A {
707        match self.bits {
708            false => TFUFIP_A::_0,
709            true => TFUFIP_A::_1,
710        }
711    }
712    #[doc = "Checks if the value of the field is `_0`"]
713    #[inline(always)]
714    pub fn is_0(&self) -> bool {
715        *self == TFUFIP_A::_0
716    }
717    #[doc = "Checks if the value of the field is `_1`"]
718    #[inline(always)]
719    pub fn is_1(&self) -> bool {
720        *self == TFUFIP_A::_1
721    }
722}
723#[doc = "Field `TFUFIP` writer - Transmit FIFO Underflow Interrupt Request Enable"]
724pub type TFUFIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EESIPR_SPEC, TFUFIP_A, O>;
725impl<'a, const O: u8> TFUFIP_W<'a, O> {
726    #[doc = "Underflow interrupt request is disabled."]
727    #[inline(always)]
728    pub fn _0(self) -> &'a mut W {
729        self.variant(TFUFIP_A::_0)
730    }
731    #[doc = "Underflow interrupt request is enabled."]
732    #[inline(always)]
733    pub fn _1(self) -> &'a mut W {
734        self.variant(TFUFIP_A::_1)
735    }
736}
737#[doc = "Field `TDEIP` reader - Transmit Descriptor Empty Interrupt Request Enable"]
738pub type TDEIP_R = crate::BitReader<TDEIP_A>;
739#[doc = "Transmit Descriptor Empty Interrupt Request Enable\n\nValue on reset: 0"]
740#[derive(Clone, Copy, Debug, PartialEq, Eq)]
741pub enum TDEIP_A {
742    #[doc = "0: Transmit descriptor empty interrupt request is disabled."]
743    _0 = 0,
744    #[doc = "1: Transmit descriptor empty interrupt request is enabled."]
745    _1 = 1,
746}
747impl From<TDEIP_A> for bool {
748    #[inline(always)]
749    fn from(variant: TDEIP_A) -> Self {
750        variant as u8 != 0
751    }
752}
753impl TDEIP_R {
754    #[doc = "Get enumerated values variant"]
755    #[inline(always)]
756    pub fn variant(&self) -> TDEIP_A {
757        match self.bits {
758            false => TDEIP_A::_0,
759            true => TDEIP_A::_1,
760        }
761    }
762    #[doc = "Checks if the value of the field is `_0`"]
763    #[inline(always)]
764    pub fn is_0(&self) -> bool {
765        *self == TDEIP_A::_0
766    }
767    #[doc = "Checks if the value of the field is `_1`"]
768    #[inline(always)]
769    pub fn is_1(&self) -> bool {
770        *self == TDEIP_A::_1
771    }
772}
773#[doc = "Field `TDEIP` writer - Transmit Descriptor Empty Interrupt Request Enable"]
774pub type TDEIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EESIPR_SPEC, TDEIP_A, O>;
775impl<'a, const O: u8> TDEIP_W<'a, O> {
776    #[doc = "Transmit descriptor empty interrupt request is disabled."]
777    #[inline(always)]
778    pub fn _0(self) -> &'a mut W {
779        self.variant(TDEIP_A::_0)
780    }
781    #[doc = "Transmit descriptor empty interrupt request is enabled."]
782    #[inline(always)]
783    pub fn _1(self) -> &'a mut W {
784        self.variant(TDEIP_A::_1)
785    }
786}
787#[doc = "Field `TCIP` reader - Frame Transfer Complete Interrupt Request Enable"]
788pub type TCIP_R = crate::BitReader<TCIP_A>;
789#[doc = "Frame Transfer Complete Interrupt Request Enable\n\nValue on reset: 0"]
790#[derive(Clone, Copy, Debug, PartialEq, Eq)]
791pub enum TCIP_A {
792    #[doc = "0: Frame transmission complete interrupt request is disabled."]
793    _0 = 0,
794    #[doc = "1: Frame transmission complete interrupt request is enabled."]
795    _1 = 1,
796}
797impl From<TCIP_A> for bool {
798    #[inline(always)]
799    fn from(variant: TCIP_A) -> Self {
800        variant as u8 != 0
801    }
802}
803impl TCIP_R {
804    #[doc = "Get enumerated values variant"]
805    #[inline(always)]
806    pub fn variant(&self) -> TCIP_A {
807        match self.bits {
808            false => TCIP_A::_0,
809            true => TCIP_A::_1,
810        }
811    }
812    #[doc = "Checks if the value of the field is `_0`"]
813    #[inline(always)]
814    pub fn is_0(&self) -> bool {
815        *self == TCIP_A::_0
816    }
817    #[doc = "Checks if the value of the field is `_1`"]
818    #[inline(always)]
819    pub fn is_1(&self) -> bool {
820        *self == TCIP_A::_1
821    }
822}
823#[doc = "Field `TCIP` writer - Frame Transfer Complete Interrupt Request Enable"]
824pub type TCIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EESIPR_SPEC, TCIP_A, O>;
825impl<'a, const O: u8> TCIP_W<'a, O> {
826    #[doc = "Frame transmission complete interrupt request is disabled."]
827    #[inline(always)]
828    pub fn _0(self) -> &'a mut W {
829        self.variant(TCIP_A::_0)
830    }
831    #[doc = "Frame transmission complete interrupt request is enabled."]
832    #[inline(always)]
833    pub fn _1(self) -> &'a mut W {
834        self.variant(TCIP_A::_1)
835    }
836}
837#[doc = "Field `ECIIP` reader - ETHERC Status Register Source Interrupt Request Enable"]
838pub type ECIIP_R = crate::BitReader<ECIIP_A>;
839#[doc = "ETHERC Status Register Source Interrupt Request Enable\n\nValue on reset: 0"]
840#[derive(Clone, Copy, Debug, PartialEq, Eq)]
841pub enum ECIIP_A {
842    #[doc = "0: ETHERC status interrupt request is disabled."]
843    _0 = 0,
844    #[doc = "1: ETHERC status interrupt request is enabled."]
845    _1 = 1,
846}
847impl From<ECIIP_A> for bool {
848    #[inline(always)]
849    fn from(variant: ECIIP_A) -> Self {
850        variant as u8 != 0
851    }
852}
853impl ECIIP_R {
854    #[doc = "Get enumerated values variant"]
855    #[inline(always)]
856    pub fn variant(&self) -> ECIIP_A {
857        match self.bits {
858            false => ECIIP_A::_0,
859            true => ECIIP_A::_1,
860        }
861    }
862    #[doc = "Checks if the value of the field is `_0`"]
863    #[inline(always)]
864    pub fn is_0(&self) -> bool {
865        *self == ECIIP_A::_0
866    }
867    #[doc = "Checks if the value of the field is `_1`"]
868    #[inline(always)]
869    pub fn is_1(&self) -> bool {
870        *self == ECIIP_A::_1
871    }
872}
873#[doc = "Field `ECIIP` writer - ETHERC Status Register Source Interrupt Request Enable"]
874pub type ECIIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EESIPR_SPEC, ECIIP_A, O>;
875impl<'a, const O: u8> ECIIP_W<'a, O> {
876    #[doc = "ETHERC status interrupt request is disabled."]
877    #[inline(always)]
878    pub fn _0(self) -> &'a mut W {
879        self.variant(ECIIP_A::_0)
880    }
881    #[doc = "ETHERC status interrupt request is enabled."]
882    #[inline(always)]
883    pub fn _1(self) -> &'a mut W {
884        self.variant(ECIIP_A::_1)
885    }
886}
887#[doc = "Field `ADEIP` reader - Address Error Interrupt Request Enable"]
888pub type ADEIP_R = crate::BitReader<ADEIP_A>;
889#[doc = "Address Error Interrupt Request Enable\n\nValue on reset: 0"]
890#[derive(Clone, Copy, Debug, PartialEq, Eq)]
891pub enum ADEIP_A {
892    #[doc = "0: Address error interrupt request is disabled."]
893    _0 = 0,
894    #[doc = "1: Address error interrupt request is enabled."]
895    _1 = 1,
896}
897impl From<ADEIP_A> for bool {
898    #[inline(always)]
899    fn from(variant: ADEIP_A) -> Self {
900        variant as u8 != 0
901    }
902}
903impl ADEIP_R {
904    #[doc = "Get enumerated values variant"]
905    #[inline(always)]
906    pub fn variant(&self) -> ADEIP_A {
907        match self.bits {
908            false => ADEIP_A::_0,
909            true => ADEIP_A::_1,
910        }
911    }
912    #[doc = "Checks if the value of the field is `_0`"]
913    #[inline(always)]
914    pub fn is_0(&self) -> bool {
915        *self == ADEIP_A::_0
916    }
917    #[doc = "Checks if the value of the field is `_1`"]
918    #[inline(always)]
919    pub fn is_1(&self) -> bool {
920        *self == ADEIP_A::_1
921    }
922}
923#[doc = "Field `ADEIP` writer - Address Error Interrupt Request Enable"]
924pub type ADEIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EESIPR_SPEC, ADEIP_A, O>;
925impl<'a, const O: u8> ADEIP_W<'a, O> {
926    #[doc = "Address error interrupt request is disabled."]
927    #[inline(always)]
928    pub fn _0(self) -> &'a mut W {
929        self.variant(ADEIP_A::_0)
930    }
931    #[doc = "Address error interrupt request is enabled."]
932    #[inline(always)]
933    pub fn _1(self) -> &'a mut W {
934        self.variant(ADEIP_A::_1)
935    }
936}
937#[doc = "Field `RFCOFIP` reader - Receive Frame Counter Overflow Interrupt Request Enable"]
938pub type RFCOFIP_R = crate::BitReader<RFCOFIP_A>;
939#[doc = "Receive Frame Counter Overflow Interrupt Request Enable\n\nValue on reset: 0"]
940#[derive(Clone, Copy, Debug, PartialEq, Eq)]
941pub enum RFCOFIP_A {
942    #[doc = "0: Receive frame counter overflow interrupt request is disabled."]
943    _0 = 0,
944    #[doc = "1: Receive frame counter overflow interrupt request is enabled."]
945    _1 = 1,
946}
947impl From<RFCOFIP_A> for bool {
948    #[inline(always)]
949    fn from(variant: RFCOFIP_A) -> Self {
950        variant as u8 != 0
951    }
952}
953impl RFCOFIP_R {
954    #[doc = "Get enumerated values variant"]
955    #[inline(always)]
956    pub fn variant(&self) -> RFCOFIP_A {
957        match self.bits {
958            false => RFCOFIP_A::_0,
959            true => RFCOFIP_A::_1,
960        }
961    }
962    #[doc = "Checks if the value of the field is `_0`"]
963    #[inline(always)]
964    pub fn is_0(&self) -> bool {
965        *self == RFCOFIP_A::_0
966    }
967    #[doc = "Checks if the value of the field is `_1`"]
968    #[inline(always)]
969    pub fn is_1(&self) -> bool {
970        *self == RFCOFIP_A::_1
971    }
972}
973#[doc = "Field `RFCOFIP` writer - Receive Frame Counter Overflow Interrupt Request Enable"]
974pub type RFCOFIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EESIPR_SPEC, RFCOFIP_A, O>;
975impl<'a, const O: u8> RFCOFIP_W<'a, O> {
976    #[doc = "Receive frame counter overflow interrupt request is disabled."]
977    #[inline(always)]
978    pub fn _0(self) -> &'a mut W {
979        self.variant(RFCOFIP_A::_0)
980    }
981    #[doc = "Receive frame counter overflow interrupt request is enabled."]
982    #[inline(always)]
983    pub fn _1(self) -> &'a mut W {
984        self.variant(RFCOFIP_A::_1)
985    }
986}
987#[doc = "Field `RABTIP` reader - Receive Abort Detect Interrupt Request Enable"]
988pub type RABTIP_R = crate::BitReader<RABTIP_A>;
989#[doc = "Receive Abort Detect Interrupt Request Enable\n\nValue on reset: 0"]
990#[derive(Clone, Copy, Debug, PartialEq, Eq)]
991pub enum RABTIP_A {
992    #[doc = "0: Receive abort detect interrupt request is disabled."]
993    _0 = 0,
994    #[doc = "1: Receive abort detect interrupt request is enabled."]
995    _1 = 1,
996}
997impl From<RABTIP_A> for bool {
998    #[inline(always)]
999    fn from(variant: RABTIP_A) -> Self {
1000        variant as u8 != 0
1001    }
1002}
1003impl RABTIP_R {
1004    #[doc = "Get enumerated values variant"]
1005    #[inline(always)]
1006    pub fn variant(&self) -> RABTIP_A {
1007        match self.bits {
1008            false => RABTIP_A::_0,
1009            true => RABTIP_A::_1,
1010        }
1011    }
1012    #[doc = "Checks if the value of the field is `_0`"]
1013    #[inline(always)]
1014    pub fn is_0(&self) -> bool {
1015        *self == RABTIP_A::_0
1016    }
1017    #[doc = "Checks if the value of the field is `_1`"]
1018    #[inline(always)]
1019    pub fn is_1(&self) -> bool {
1020        *self == RABTIP_A::_1
1021    }
1022}
1023#[doc = "Field `RABTIP` writer - Receive Abort Detect Interrupt Request Enable"]
1024pub type RABTIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EESIPR_SPEC, RABTIP_A, O>;
1025impl<'a, const O: u8> RABTIP_W<'a, O> {
1026    #[doc = "Receive abort detect interrupt request is disabled."]
1027    #[inline(always)]
1028    pub fn _0(self) -> &'a mut W {
1029        self.variant(RABTIP_A::_0)
1030    }
1031    #[doc = "Receive abort detect interrupt request is enabled."]
1032    #[inline(always)]
1033    pub fn _1(self) -> &'a mut W {
1034        self.variant(RABTIP_A::_1)
1035    }
1036}
1037#[doc = "Field `TABTIP` reader - Transmit Abort Detect Interrupt Request Enable"]
1038pub type TABTIP_R = crate::BitReader<TABTIP_A>;
1039#[doc = "Transmit Abort Detect Interrupt Request Enable\n\nValue on reset: 0"]
1040#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1041pub enum TABTIP_A {
1042    #[doc = "0: Transmit abort detect interrupt request is disabled."]
1043    _0 = 0,
1044    #[doc = "1: Transmit abort detect interrupt request is enabled."]
1045    _1 = 1,
1046}
1047impl From<TABTIP_A> for bool {
1048    #[inline(always)]
1049    fn from(variant: TABTIP_A) -> Self {
1050        variant as u8 != 0
1051    }
1052}
1053impl TABTIP_R {
1054    #[doc = "Get enumerated values variant"]
1055    #[inline(always)]
1056    pub fn variant(&self) -> TABTIP_A {
1057        match self.bits {
1058            false => TABTIP_A::_0,
1059            true => TABTIP_A::_1,
1060        }
1061    }
1062    #[doc = "Checks if the value of the field is `_0`"]
1063    #[inline(always)]
1064    pub fn is_0(&self) -> bool {
1065        *self == TABTIP_A::_0
1066    }
1067    #[doc = "Checks if the value of the field is `_1`"]
1068    #[inline(always)]
1069    pub fn is_1(&self) -> bool {
1070        *self == TABTIP_A::_1
1071    }
1072}
1073#[doc = "Field `TABTIP` writer - Transmit Abort Detect Interrupt Request Enable"]
1074pub type TABTIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EESIPR_SPEC, TABTIP_A, O>;
1075impl<'a, const O: u8> TABTIP_W<'a, O> {
1076    #[doc = "Transmit abort detect interrupt request is disabled."]
1077    #[inline(always)]
1078    pub fn _0(self) -> &'a mut W {
1079        self.variant(TABTIP_A::_0)
1080    }
1081    #[doc = "Transmit abort detect interrupt request is enabled."]
1082    #[inline(always)]
1083    pub fn _1(self) -> &'a mut W {
1084        self.variant(TABTIP_A::_1)
1085    }
1086}
1087#[doc = "Field `TWBIP` reader - Write-Back Complete Interrupt Request Enable"]
1088pub type TWBIP_R = crate::BitReader<TWBIP_A>;
1089#[doc = "Write-Back Complete Interrupt Request Enable\n\nValue on reset: 0"]
1090#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1091pub enum TWBIP_A {
1092    #[doc = "0: Write-back complete interrupt request is disabled."]
1093    _0 = 0,
1094    #[doc = "1: Write-back complete interrupt request is enabled."]
1095    _1 = 1,
1096}
1097impl From<TWBIP_A> for bool {
1098    #[inline(always)]
1099    fn from(variant: TWBIP_A) -> Self {
1100        variant as u8 != 0
1101    }
1102}
1103impl TWBIP_R {
1104    #[doc = "Get enumerated values variant"]
1105    #[inline(always)]
1106    pub fn variant(&self) -> TWBIP_A {
1107        match self.bits {
1108            false => TWBIP_A::_0,
1109            true => TWBIP_A::_1,
1110        }
1111    }
1112    #[doc = "Checks if the value of the field is `_0`"]
1113    #[inline(always)]
1114    pub fn is_0(&self) -> bool {
1115        *self == TWBIP_A::_0
1116    }
1117    #[doc = "Checks if the value of the field is `_1`"]
1118    #[inline(always)]
1119    pub fn is_1(&self) -> bool {
1120        *self == TWBIP_A::_1
1121    }
1122}
1123#[doc = "Field `TWBIP` writer - Write-Back Complete Interrupt Request Enable"]
1124pub type TWBIP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EESIPR_SPEC, TWBIP_A, O>;
1125impl<'a, const O: u8> TWBIP_W<'a, O> {
1126    #[doc = "Write-back complete interrupt request is disabled."]
1127    #[inline(always)]
1128    pub fn _0(self) -> &'a mut W {
1129        self.variant(TWBIP_A::_0)
1130    }
1131    #[doc = "Write-back complete interrupt request is enabled."]
1132    #[inline(always)]
1133    pub fn _1(self) -> &'a mut W {
1134        self.variant(TWBIP_A::_1)
1135    }
1136}
1137impl R {
1138    #[doc = "Bit 0 - CRC Error Interrupt Request Enable"]
1139    #[inline(always)]
1140    pub fn cerfip(&self) -> CERFIP_R {
1141        CERFIP_R::new((self.bits & 1) != 0)
1142    }
1143    #[doc = "Bit 1 - PHY-LSI Receive Error Interrupt Request Enable"]
1144    #[inline(always)]
1145    pub fn preip(&self) -> PREIP_R {
1146        PREIP_R::new(((self.bits >> 1) & 1) != 0)
1147    }
1148    #[doc = "Bit 2 - Frame-Too-Short Error Interrupt Request Enable"]
1149    #[inline(always)]
1150    pub fn rtsfip(&self) -> RTSFIP_R {
1151        RTSFIP_R::new(((self.bits >> 2) & 1) != 0)
1152    }
1153    #[doc = "Bit 3 - Frame-Too-Long Error Interrupt Request Enable"]
1154    #[inline(always)]
1155    pub fn rtlfip(&self) -> RTLFIP_R {
1156        RTLFIP_R::new(((self.bits >> 3) & 1) != 0)
1157    }
1158    #[doc = "Bit 4 - Alignment Error Interrupt Request Enable"]
1159    #[inline(always)]
1160    pub fn rrfip(&self) -> RRFIP_R {
1161        RRFIP_R::new(((self.bits >> 4) & 1) != 0)
1162    }
1163    #[doc = "Bit 7 - Multicast Address Frame Receive Interrupt Request Enable"]
1164    #[inline(always)]
1165    pub fn rmafip(&self) -> RMAFIP_R {
1166        RMAFIP_R::new(((self.bits >> 7) & 1) != 0)
1167    }
1168    #[doc = "Bit 8 - Transmit Retry Over Interrupt Request Enable"]
1169    #[inline(always)]
1170    pub fn troip(&self) -> TROIP_R {
1171        TROIP_R::new(((self.bits >> 8) & 1) != 0)
1172    }
1173    #[doc = "Bit 9 - Late Collision Detect Interrupt Request Enable"]
1174    #[inline(always)]
1175    pub fn cdip(&self) -> CDIP_R {
1176        CDIP_R::new(((self.bits >> 9) & 1) != 0)
1177    }
1178    #[doc = "Bit 10 - Loss of Carrier Detect Interrupt Request Enable"]
1179    #[inline(always)]
1180    pub fn dlcip(&self) -> DLCIP_R {
1181        DLCIP_R::new(((self.bits >> 10) & 1) != 0)
1182    }
1183    #[doc = "Bit 11 - Carrier Not Detect Interrupt Request Enable"]
1184    #[inline(always)]
1185    pub fn cndip(&self) -> CNDIP_R {
1186        CNDIP_R::new(((self.bits >> 11) & 1) != 0)
1187    }
1188    #[doc = "Bit 16 - Receive FIFO Overflow Interrupt Request Enable"]
1189    #[inline(always)]
1190    pub fn rfofip(&self) -> RFOFIP_R {
1191        RFOFIP_R::new(((self.bits >> 16) & 1) != 0)
1192    }
1193    #[doc = "Bit 17 - Receive Descriptor Empty Interrupt Request Enable"]
1194    #[inline(always)]
1195    pub fn rdeip(&self) -> RDEIP_R {
1196        RDEIP_R::new(((self.bits >> 17) & 1) != 0)
1197    }
1198    #[doc = "Bit 18 - Frame Receive Interrupt Request Enable"]
1199    #[inline(always)]
1200    pub fn frip(&self) -> FRIP_R {
1201        FRIP_R::new(((self.bits >> 18) & 1) != 0)
1202    }
1203    #[doc = "Bit 19 - Transmit FIFO Underflow Interrupt Request Enable"]
1204    #[inline(always)]
1205    pub fn tfufip(&self) -> TFUFIP_R {
1206        TFUFIP_R::new(((self.bits >> 19) & 1) != 0)
1207    }
1208    #[doc = "Bit 20 - Transmit Descriptor Empty Interrupt Request Enable"]
1209    #[inline(always)]
1210    pub fn tdeip(&self) -> TDEIP_R {
1211        TDEIP_R::new(((self.bits >> 20) & 1) != 0)
1212    }
1213    #[doc = "Bit 21 - Frame Transfer Complete Interrupt Request Enable"]
1214    #[inline(always)]
1215    pub fn tcip(&self) -> TCIP_R {
1216        TCIP_R::new(((self.bits >> 21) & 1) != 0)
1217    }
1218    #[doc = "Bit 22 - ETHERC Status Register Source Interrupt Request Enable"]
1219    #[inline(always)]
1220    pub fn eciip(&self) -> ECIIP_R {
1221        ECIIP_R::new(((self.bits >> 22) & 1) != 0)
1222    }
1223    #[doc = "Bit 23 - Address Error Interrupt Request Enable"]
1224    #[inline(always)]
1225    pub fn adeip(&self) -> ADEIP_R {
1226        ADEIP_R::new(((self.bits >> 23) & 1) != 0)
1227    }
1228    #[doc = "Bit 24 - Receive Frame Counter Overflow Interrupt Request Enable"]
1229    #[inline(always)]
1230    pub fn rfcofip(&self) -> RFCOFIP_R {
1231        RFCOFIP_R::new(((self.bits >> 24) & 1) != 0)
1232    }
1233    #[doc = "Bit 25 - Receive Abort Detect Interrupt Request Enable"]
1234    #[inline(always)]
1235    pub fn rabtip(&self) -> RABTIP_R {
1236        RABTIP_R::new(((self.bits >> 25) & 1) != 0)
1237    }
1238    #[doc = "Bit 26 - Transmit Abort Detect Interrupt Request Enable"]
1239    #[inline(always)]
1240    pub fn tabtip(&self) -> TABTIP_R {
1241        TABTIP_R::new(((self.bits >> 26) & 1) != 0)
1242    }
1243    #[doc = "Bit 30 - Write-Back Complete Interrupt Request Enable"]
1244    #[inline(always)]
1245    pub fn twbip(&self) -> TWBIP_R {
1246        TWBIP_R::new(((self.bits >> 30) & 1) != 0)
1247    }
1248}
1249impl W {
1250    #[doc = "Bit 0 - CRC Error Interrupt Request Enable"]
1251    #[inline(always)]
1252    #[must_use]
1253    pub fn cerfip(&mut self) -> CERFIP_W<0> {
1254        CERFIP_W::new(self)
1255    }
1256    #[doc = "Bit 1 - PHY-LSI Receive Error Interrupt Request Enable"]
1257    #[inline(always)]
1258    #[must_use]
1259    pub fn preip(&mut self) -> PREIP_W<1> {
1260        PREIP_W::new(self)
1261    }
1262    #[doc = "Bit 2 - Frame-Too-Short Error Interrupt Request Enable"]
1263    #[inline(always)]
1264    #[must_use]
1265    pub fn rtsfip(&mut self) -> RTSFIP_W<2> {
1266        RTSFIP_W::new(self)
1267    }
1268    #[doc = "Bit 3 - Frame-Too-Long Error Interrupt Request Enable"]
1269    #[inline(always)]
1270    #[must_use]
1271    pub fn rtlfip(&mut self) -> RTLFIP_W<3> {
1272        RTLFIP_W::new(self)
1273    }
1274    #[doc = "Bit 4 - Alignment Error Interrupt Request Enable"]
1275    #[inline(always)]
1276    #[must_use]
1277    pub fn rrfip(&mut self) -> RRFIP_W<4> {
1278        RRFIP_W::new(self)
1279    }
1280    #[doc = "Bit 7 - Multicast Address Frame Receive Interrupt Request Enable"]
1281    #[inline(always)]
1282    #[must_use]
1283    pub fn rmafip(&mut self) -> RMAFIP_W<7> {
1284        RMAFIP_W::new(self)
1285    }
1286    #[doc = "Bit 8 - Transmit Retry Over Interrupt Request Enable"]
1287    #[inline(always)]
1288    #[must_use]
1289    pub fn troip(&mut self) -> TROIP_W<8> {
1290        TROIP_W::new(self)
1291    }
1292    #[doc = "Bit 9 - Late Collision Detect Interrupt Request Enable"]
1293    #[inline(always)]
1294    #[must_use]
1295    pub fn cdip(&mut self) -> CDIP_W<9> {
1296        CDIP_W::new(self)
1297    }
1298    #[doc = "Bit 10 - Loss of Carrier Detect Interrupt Request Enable"]
1299    #[inline(always)]
1300    #[must_use]
1301    pub fn dlcip(&mut self) -> DLCIP_W<10> {
1302        DLCIP_W::new(self)
1303    }
1304    #[doc = "Bit 11 - Carrier Not Detect Interrupt Request Enable"]
1305    #[inline(always)]
1306    #[must_use]
1307    pub fn cndip(&mut self) -> CNDIP_W<11> {
1308        CNDIP_W::new(self)
1309    }
1310    #[doc = "Bit 16 - Receive FIFO Overflow Interrupt Request Enable"]
1311    #[inline(always)]
1312    #[must_use]
1313    pub fn rfofip(&mut self) -> RFOFIP_W<16> {
1314        RFOFIP_W::new(self)
1315    }
1316    #[doc = "Bit 17 - Receive Descriptor Empty Interrupt Request Enable"]
1317    #[inline(always)]
1318    #[must_use]
1319    pub fn rdeip(&mut self) -> RDEIP_W<17> {
1320        RDEIP_W::new(self)
1321    }
1322    #[doc = "Bit 18 - Frame Receive Interrupt Request Enable"]
1323    #[inline(always)]
1324    #[must_use]
1325    pub fn frip(&mut self) -> FRIP_W<18> {
1326        FRIP_W::new(self)
1327    }
1328    #[doc = "Bit 19 - Transmit FIFO Underflow Interrupt Request Enable"]
1329    #[inline(always)]
1330    #[must_use]
1331    pub fn tfufip(&mut self) -> TFUFIP_W<19> {
1332        TFUFIP_W::new(self)
1333    }
1334    #[doc = "Bit 20 - Transmit Descriptor Empty Interrupt Request Enable"]
1335    #[inline(always)]
1336    #[must_use]
1337    pub fn tdeip(&mut self) -> TDEIP_W<20> {
1338        TDEIP_W::new(self)
1339    }
1340    #[doc = "Bit 21 - Frame Transfer Complete Interrupt Request Enable"]
1341    #[inline(always)]
1342    #[must_use]
1343    pub fn tcip(&mut self) -> TCIP_W<21> {
1344        TCIP_W::new(self)
1345    }
1346    #[doc = "Bit 22 - ETHERC Status Register Source Interrupt Request Enable"]
1347    #[inline(always)]
1348    #[must_use]
1349    pub fn eciip(&mut self) -> ECIIP_W<22> {
1350        ECIIP_W::new(self)
1351    }
1352    #[doc = "Bit 23 - Address Error Interrupt Request Enable"]
1353    #[inline(always)]
1354    #[must_use]
1355    pub fn adeip(&mut self) -> ADEIP_W<23> {
1356        ADEIP_W::new(self)
1357    }
1358    #[doc = "Bit 24 - Receive Frame Counter Overflow Interrupt Request Enable"]
1359    #[inline(always)]
1360    #[must_use]
1361    pub fn rfcofip(&mut self) -> RFCOFIP_W<24> {
1362        RFCOFIP_W::new(self)
1363    }
1364    #[doc = "Bit 25 - Receive Abort Detect Interrupt Request Enable"]
1365    #[inline(always)]
1366    #[must_use]
1367    pub fn rabtip(&mut self) -> RABTIP_W<25> {
1368        RABTIP_W::new(self)
1369    }
1370    #[doc = "Bit 26 - Transmit Abort Detect Interrupt Request Enable"]
1371    #[inline(always)]
1372    #[must_use]
1373    pub fn tabtip(&mut self) -> TABTIP_W<26> {
1374        TABTIP_W::new(self)
1375    }
1376    #[doc = "Bit 30 - Write-Back Complete Interrupt Request Enable"]
1377    #[inline(always)]
1378    #[must_use]
1379    pub fn twbip(&mut self) -> TWBIP_W<30> {
1380        TWBIP_W::new(self)
1381    }
1382    #[doc = "Writes raw bits to the register."]
1383    #[inline(always)]
1384    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1385        self.0.bits(bits);
1386        self
1387    }
1388}
1389#[doc = "ETHERC/EDMAC Status Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eesipr](index.html) module"]
1390pub struct EESIPR_SPEC;
1391impl crate::RegisterSpec for EESIPR_SPEC {
1392    type Ux = u32;
1393}
1394#[doc = "`read()` method returns [eesipr::R](R) reader structure"]
1395impl crate::Readable for EESIPR_SPEC {
1396    type Reader = R;
1397}
1398#[doc = "`write(|w| ..)` method takes [eesipr::W](W) writer structure"]
1399impl crate::Writable for EESIPR_SPEC {
1400    type Writer = W;
1401    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
1402    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
1403}
1404#[doc = "`reset()` method sets EESIPR to value 0"]
1405impl crate::Resettable for EESIPR_SPEC {
1406    const RESET_VALUE: Self::Ux = 0;
1407}
ra6m3/edmac0/eesipr.rs

ra6m3/edmac0/
eesipr.rs
