1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - PTPEDMAC Mode Register"]
5 pub edmr: EDMR,
6 _reserved1: [u8; 0x04],
7 #[doc = "0x08 - EDMAC Transmit Request Register"]
8 pub edtrr: EDTRR,
9 _reserved2: [u8; 0x04],
10 #[doc = "0x10 - EDMAC Receive Request Register"]
11 pub edrrr: EDRRR,
12 _reserved3: [u8; 0x04],
13 #[doc = "0x18 - Transmit Descriptor List Start Address Register"]
14 pub tdlar: TDLAR,
15 _reserved4: [u8; 0x04],
16 #[doc = "0x20 - Receive Descriptor List Start Address Register"]
17 pub rdlar: RDLAR,
18 _reserved5: [u8; 0x04],
19 #[doc = "0x28 - PTP/EDMAC Status Register"]
20 pub eesr: EESR,
21 _reserved6: [u8; 0x04],
22 #[doc = "0x30 - PTP/EDMAC Status Interrupt Enable Register"]
23 pub eesipr: EESIPR,
24 _reserved7: [u8; 0x0c],
25 #[doc = "0x40 - Missed-Frame Counter Register"]
26 pub rmfcr: RMFCR,
27 _reserved8: [u8; 0x04],
28 #[doc = "0x48 - Transmit FIFO Threshold Register"]
29 pub tftr: TFTR,
30 _reserved9: [u8; 0x04],
31 #[doc = "0x50 - Transmit FIFO Threshold Register"]
32 pub fdr: FDR,
33 _reserved10: [u8; 0x04],
34 #[doc = "0x58 - Receive Method Control Register"]
35 pub rmcr: RMCR,
36 _reserved11: [u8; 0x08],
37 #[doc = "0x64 - Transmit FIFO Underflow Counter"]
38 pub tfucr: TFUCR,
39 #[doc = "0x68 - Receive FIFO Overflow Counter"]
40 pub rfocr: RFOCR,
41 #[doc = "0x6c - Independent Output Signal Setting Register"]
42 pub iosr: IOSR,
43 #[doc = "0x70 - Flow Control Start FIFO Threshold Setting Register"]
44 pub fcftr: FCFTR,
45 _reserved15: [u8; 0x04],
46 #[doc = "0x78 - Receive Data Padding Insert Register"]
47 pub rpadir: RPADIR,
48 #[doc = "0x7c - Transmit Interrupt Setting Register"]
49 pub trimd: TRIMD,
50 _reserved17: [u8; 0x48],
51 #[doc = "0xc8 - Receive Buffer Write Address Register"]
52 pub rbwar: RBWAR,
53 #[doc = "0xcc - Receive Descriptor Fetch Address Register"]
54 pub rdfar: RDFAR,
55 _reserved19: [u8; 0x04],
56 #[doc = "0xd4 - Transmit Buffer Read Address Register"]
57 pub tbrar: TBRAR,
58 #[doc = "0xd8 - Transmit Descriptor Fetch Address Register"]
59 pub tdfar: TDFAR,
60}
61#[doc = "EDMR (rw) register accessor: an alias for `Reg<EDMR_SPEC>`"]
62pub type EDMR = crate::Reg<edmr::EDMR_SPEC>;
63#[doc = "PTPEDMAC Mode Register"]
64pub mod edmr;
65#[doc = "EDTRR (rw) register accessor: an alias for `Reg<EDTRR_SPEC>`"]
66pub type EDTRR = crate::Reg<edtrr::EDTRR_SPEC>;
67#[doc = "EDMAC Transmit Request Register"]
68pub mod edtrr;
69#[doc = "EDRRR (rw) register accessor: an alias for `Reg<EDRRR_SPEC>`"]
70pub type EDRRR = crate::Reg<edrrr::EDRRR_SPEC>;
71#[doc = "EDMAC Receive Request Register"]
72pub mod edrrr;
73#[doc = "TDLAR (rw) register accessor: an alias for `Reg<TDLAR_SPEC>`"]
74pub type TDLAR = crate::Reg<tdlar::TDLAR_SPEC>;
75#[doc = "Transmit Descriptor List Start Address Register"]
76pub mod tdlar;
77#[doc = "RDLAR (rw) register accessor: an alias for `Reg<RDLAR_SPEC>`"]
78pub type RDLAR = crate::Reg<rdlar::RDLAR_SPEC>;
79#[doc = "Receive Descriptor List Start Address Register"]
80pub mod rdlar;
81#[doc = "EESR (rw) register accessor: an alias for `Reg<EESR_SPEC>`"]
82pub type EESR = crate::Reg<eesr::EESR_SPEC>;
83#[doc = "PTP/EDMAC Status Register"]
84pub mod eesr;
85#[doc = "EESIPR (rw) register accessor: an alias for `Reg<EESIPR_SPEC>`"]
86pub type EESIPR = crate::Reg<eesipr::EESIPR_SPEC>;
87#[doc = "PTP/EDMAC Status Interrupt Enable Register"]
88pub mod eesipr;
89#[doc = "RMFCR (rw) register accessor: an alias for `Reg<RMFCR_SPEC>`"]
90pub type RMFCR = crate::Reg<rmfcr::RMFCR_SPEC>;
91#[doc = "Missed-Frame Counter Register"]
92pub mod rmfcr;
93#[doc = "TFTR (rw) register accessor: an alias for `Reg<TFTR_SPEC>`"]
94pub type TFTR = crate::Reg<tftr::TFTR_SPEC>;
95#[doc = "Transmit FIFO Threshold Register"]
96pub mod tftr;
97#[doc = "FDR (rw) register accessor: an alias for `Reg<FDR_SPEC>`"]
98pub type FDR = crate::Reg<fdr::FDR_SPEC>;
99#[doc = "Transmit FIFO Threshold Register"]
100pub mod fdr;
101#[doc = "RMCR (rw) register accessor: an alias for `Reg<RMCR_SPEC>`"]
102pub type RMCR = crate::Reg<rmcr::RMCR_SPEC>;
103#[doc = "Receive Method Control Register"]
104pub mod rmcr;
105#[doc = "TFUCR (rw) register accessor: an alias for `Reg<TFUCR_SPEC>`"]
106pub type TFUCR = crate::Reg<tfucr::TFUCR_SPEC>;
107#[doc = "Transmit FIFO Underflow Counter"]
108pub mod tfucr;
109#[doc = "RFOCR (rw) register accessor: an alias for `Reg<RFOCR_SPEC>`"]
110pub type RFOCR = crate::Reg<rfocr::RFOCR_SPEC>;
111#[doc = "Receive FIFO Overflow Counter"]
112pub mod rfocr;
113#[doc = "IOSR (rw) register accessor: an alias for `Reg<IOSR_SPEC>`"]
114pub type IOSR = crate::Reg<iosr::IOSR_SPEC>;
115#[doc = "Independent Output Signal Setting Register"]
116pub mod iosr;
117#[doc = "FCFTR (rw) register accessor: an alias for `Reg<FCFTR_SPEC>`"]
118pub type FCFTR = crate::Reg<fcftr::FCFTR_SPEC>;
119#[doc = "Flow Control Start FIFO Threshold Setting Register"]
120pub mod fcftr;
121#[doc = "RPADIR (rw) register accessor: an alias for `Reg<RPADIR_SPEC>`"]
122pub type RPADIR = crate::Reg<rpadir::RPADIR_SPEC>;
123#[doc = "Receive Data Padding Insert Register"]
124pub mod rpadir;
125#[doc = "TRIMD (rw) register accessor: an alias for `Reg<TRIMD_SPEC>`"]
126pub type TRIMD = crate::Reg<trimd::TRIMD_SPEC>;
127#[doc = "Transmit Interrupt Setting Register"]
128pub mod trimd;
129#[doc = "RBWAR (r) register accessor: an alias for `Reg<RBWAR_SPEC>`"]
130pub type RBWAR = crate::Reg<rbwar::RBWAR_SPEC>;
131#[doc = "Receive Buffer Write Address Register"]
132pub mod rbwar;
133#[doc = "RDFAR (r) register accessor: an alias for `Reg<RDFAR_SPEC>`"]
134pub type RDFAR = crate::Reg<rdfar::RDFAR_SPEC>;
135#[doc = "Receive Descriptor Fetch Address Register"]
136pub mod rdfar;
137#[doc = "TBRAR (r) register accessor: an alias for `Reg<TBRAR_SPEC>`"]
138pub type TBRAR = crate::Reg<tbrar::TBRAR_SPEC>;
139#[doc = "Transmit Buffer Read Address Register"]
140pub mod tbrar;
141#[doc = "TDFAR (r) register accessor: an alias for `Reg<TDFAR_SPEC>`"]
142pub type TDFAR = crate::Reg<tdfar::TDFAR_SPEC>;
143#[doc = "Transmit Descriptor Fetch Address Register"]
144pub mod tdfar;