ra6m3/pdc/
pccr0.rs

1#[doc = "Register `PCCR0` reader"]
2pub struct R(crate::R<PCCR0_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PCCR0_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PCCR0_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PCCR0_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `PCCR0` writer"]
17pub struct W(crate::W<PCCR0_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PCCR0_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PCCR0_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PCCR0_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `PCKE` reader - Channel 0 GTCNT Count Clear"]
38pub type PCKE_R = crate::BitReader<PCKE_A>;
39#[doc = "Channel 0 GTCNT Count Clear\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum PCKE_A {
42    #[doc = "0: Operations for reception are stopped."]
43    _0 = 0,
44    #[doc = "1: Operations for reception are ongoing."]
45    _1 = 1,
46}
47impl From<PCKE_A> for bool {
48    #[inline(always)]
49    fn from(variant: PCKE_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl PCKE_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> PCKE_A {
57        match self.bits {
58            false => PCKE_A::_0,
59            true => PCKE_A::_1,
60        }
61    }
62    #[doc = "Checks if the value of the field is `_0`"]
63    #[inline(always)]
64    pub fn is_0(&self) -> bool {
65        *self == PCKE_A::_0
66    }
67    #[doc = "Checks if the value of the field is `_1`"]
68    #[inline(always)]
69    pub fn is_1(&self) -> bool {
70        *self == PCKE_A::_1
71    }
72}
73#[doc = "Field `PCKE` writer - Channel 0 GTCNT Count Clear"]
74pub type PCKE_W<'a, const O: u8> = crate::BitWriter<'a, u32, PCCR0_SPEC, PCKE_A, O>;
75impl<'a, const O: u8> PCKE_W<'a, O> {
76    #[doc = "Operations for reception are stopped."]
77    #[inline(always)]
78    pub fn _0(self) -> &'a mut W {
79        self.variant(PCKE_A::_0)
80    }
81    #[doc = "Operations for reception are ongoing."]
82    #[inline(always)]
83    pub fn _1(self) -> &'a mut W {
84        self.variant(PCKE_A::_1)
85    }
86}
87#[doc = "Field `VPS` reader - VSYNC Signal Polarity Select"]
88pub type VPS_R = crate::BitReader<VPS_A>;
89#[doc = "VSYNC Signal Polarity Select\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum VPS_A {
92    #[doc = "0: VSYNC signal is active high."]
93    _0 = 0,
94    #[doc = "1: VSYNC signal is active low."]
95    _1 = 1,
96}
97impl From<VPS_A> for bool {
98    #[inline(always)]
99    fn from(variant: VPS_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl VPS_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> VPS_A {
107        match self.bits {
108            false => VPS_A::_0,
109            true => VPS_A::_1,
110        }
111    }
112    #[doc = "Checks if the value of the field is `_0`"]
113    #[inline(always)]
114    pub fn is_0(&self) -> bool {
115        *self == VPS_A::_0
116    }
117    #[doc = "Checks if the value of the field is `_1`"]
118    #[inline(always)]
119    pub fn is_1(&self) -> bool {
120        *self == VPS_A::_1
121    }
122}
123#[doc = "Field `VPS` writer - VSYNC Signal Polarity Select"]
124pub type VPS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PCCR0_SPEC, VPS_A, O>;
125impl<'a, const O: u8> VPS_W<'a, O> {
126    #[doc = "VSYNC signal is active high."]
127    #[inline(always)]
128    pub fn _0(self) -> &'a mut W {
129        self.variant(VPS_A::_0)
130    }
131    #[doc = "VSYNC signal is active low."]
132    #[inline(always)]
133    pub fn _1(self) -> &'a mut W {
134        self.variant(VPS_A::_1)
135    }
136}
137#[doc = "Field `HPS` reader - HSYNC Signal Polarity Select"]
138pub type HPS_R = crate::BitReader<HPS_A>;
139#[doc = "HSYNC Signal Polarity Select\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum HPS_A {
142    #[doc = "0: HSYNC signal is active high."]
143    _0 = 0,
144    #[doc = "1: HSYNC signal is active low."]
145    _1 = 1,
146}
147impl From<HPS_A> for bool {
148    #[inline(always)]
149    fn from(variant: HPS_A) -> Self {
150        variant as u8 != 0
151    }
152}
153impl HPS_R {
154    #[doc = "Get enumerated values variant"]
155    #[inline(always)]
156    pub fn variant(&self) -> HPS_A {
157        match self.bits {
158            false => HPS_A::_0,
159            true => HPS_A::_1,
160        }
161    }
162    #[doc = "Checks if the value of the field is `_0`"]
163    #[inline(always)]
164    pub fn is_0(&self) -> bool {
165        *self == HPS_A::_0
166    }
167    #[doc = "Checks if the value of the field is `_1`"]
168    #[inline(always)]
169    pub fn is_1(&self) -> bool {
170        *self == HPS_A::_1
171    }
172}
173#[doc = "Field `HPS` writer - HSYNC Signal Polarity Select"]
174pub type HPS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PCCR0_SPEC, HPS_A, O>;
175impl<'a, const O: u8> HPS_W<'a, O> {
176    #[doc = "HSYNC signal is active high."]
177    #[inline(always)]
178    pub fn _0(self) -> &'a mut W {
179        self.variant(HPS_A::_0)
180    }
181    #[doc = "HSYNC signal is active low."]
182    #[inline(always)]
183    pub fn _1(self) -> &'a mut W {
184        self.variant(HPS_A::_1)
185    }
186}
187#[doc = "PDC Reset\n\nValue on reset: 0"]
188#[derive(Clone, Copy, Debug, PartialEq, Eq)]
189pub enum PRST_AW {
190    #[doc = "0: PDC reset is not applied."]
191    _0 = 0,
192    #[doc = "1: PDC is reset."]
193    _1 = 1,
194}
195impl From<PRST_AW> for bool {
196    #[inline(always)]
197    fn from(variant: PRST_AW) -> Self {
198        variant as u8 != 0
199    }
200}
201#[doc = "Field `PRST` writer - PDC Reset"]
202pub type PRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, PCCR0_SPEC, PRST_AW, O>;
203impl<'a, const O: u8> PRST_W<'a, O> {
204    #[doc = "PDC reset is not applied."]
205    #[inline(always)]
206    pub fn _0(self) -> &'a mut W {
207        self.variant(PRST_AW::_0)
208    }
209    #[doc = "PDC is reset."]
210    #[inline(always)]
211    pub fn _1(self) -> &'a mut W {
212        self.variant(PRST_AW::_1)
213    }
214}
215#[doc = "Field `DFIE` reader - Receive Data Ready Interrupt Enable"]
216pub type DFIE_R = crate::BitReader<DFIE_A>;
217#[doc = "Receive Data Ready Interrupt Enable\n\nValue on reset: 0"]
218#[derive(Clone, Copy, Debug, PartialEq, Eq)]
219pub enum DFIE_A {
220    #[doc = "0: Generation of receive data ready interrupt requests is disabled."]
221    _0 = 0,
222    #[doc = "1: Generation of receive data ready interrupt requests is enabled."]
223    _1 = 1,
224}
225impl From<DFIE_A> for bool {
226    #[inline(always)]
227    fn from(variant: DFIE_A) -> Self {
228        variant as u8 != 0
229    }
230}
231impl DFIE_R {
232    #[doc = "Get enumerated values variant"]
233    #[inline(always)]
234    pub fn variant(&self) -> DFIE_A {
235        match self.bits {
236            false => DFIE_A::_0,
237            true => DFIE_A::_1,
238        }
239    }
240    #[doc = "Checks if the value of the field is `_0`"]
241    #[inline(always)]
242    pub fn is_0(&self) -> bool {
243        *self == DFIE_A::_0
244    }
245    #[doc = "Checks if the value of the field is `_1`"]
246    #[inline(always)]
247    pub fn is_1(&self) -> bool {
248        *self == DFIE_A::_1
249    }
250}
251#[doc = "Field `DFIE` writer - Receive Data Ready Interrupt Enable"]
252pub type DFIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, PCCR0_SPEC, DFIE_A, O>;
253impl<'a, const O: u8> DFIE_W<'a, O> {
254    #[doc = "Generation of receive data ready interrupt requests is disabled."]
255    #[inline(always)]
256    pub fn _0(self) -> &'a mut W {
257        self.variant(DFIE_A::_0)
258    }
259    #[doc = "Generation of receive data ready interrupt requests is enabled."]
260    #[inline(always)]
261    pub fn _1(self) -> &'a mut W {
262        self.variant(DFIE_A::_1)
263    }
264}
265#[doc = "Field `FEIE` reader - Frame End Interrupt Enable"]
266pub type FEIE_R = crate::BitReader<FEIE_A>;
267#[doc = "Frame End Interrupt Enable\n\nValue on reset: 0"]
268#[derive(Clone, Copy, Debug, PartialEq, Eq)]
269pub enum FEIE_A {
270    #[doc = "0: Generation of frame end interrupt requests is disabled."]
271    _0 = 0,
272    #[doc = "1: Generation of frame end interrupt requests is enabled."]
273    _1 = 1,
274}
275impl From<FEIE_A> for bool {
276    #[inline(always)]
277    fn from(variant: FEIE_A) -> Self {
278        variant as u8 != 0
279    }
280}
281impl FEIE_R {
282    #[doc = "Get enumerated values variant"]
283    #[inline(always)]
284    pub fn variant(&self) -> FEIE_A {
285        match self.bits {
286            false => FEIE_A::_0,
287            true => FEIE_A::_1,
288        }
289    }
290    #[doc = "Checks if the value of the field is `_0`"]
291    #[inline(always)]
292    pub fn is_0(&self) -> bool {
293        *self == FEIE_A::_0
294    }
295    #[doc = "Checks if the value of the field is `_1`"]
296    #[inline(always)]
297    pub fn is_1(&self) -> bool {
298        *self == FEIE_A::_1
299    }
300}
301#[doc = "Field `FEIE` writer - Frame End Interrupt Enable"]
302pub type FEIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, PCCR0_SPEC, FEIE_A, O>;
303impl<'a, const O: u8> FEIE_W<'a, O> {
304    #[doc = "Generation of frame end interrupt requests is disabled."]
305    #[inline(always)]
306    pub fn _0(self) -> &'a mut W {
307        self.variant(FEIE_A::_0)
308    }
309    #[doc = "Generation of frame end interrupt requests is enabled."]
310    #[inline(always)]
311    pub fn _1(self) -> &'a mut W {
312        self.variant(FEIE_A::_1)
313    }
314}
315#[doc = "Field `OVIE` reader - Overrun Interrupt Enable"]
316pub type OVIE_R = crate::BitReader<OVIE_A>;
317#[doc = "Overrun Interrupt Enable\n\nValue on reset: 0"]
318#[derive(Clone, Copy, Debug, PartialEq, Eq)]
319pub enum OVIE_A {
320    #[doc = "0: Generation of overrun interrupt requests is disabled."]
321    _0 = 0,
322    #[doc = "1: Generation of overrun interrupt requests is enabled."]
323    _1 = 1,
324}
325impl From<OVIE_A> for bool {
326    #[inline(always)]
327    fn from(variant: OVIE_A) -> Self {
328        variant as u8 != 0
329    }
330}
331impl OVIE_R {
332    #[doc = "Get enumerated values variant"]
333    #[inline(always)]
334    pub fn variant(&self) -> OVIE_A {
335        match self.bits {
336            false => OVIE_A::_0,
337            true => OVIE_A::_1,
338        }
339    }
340    #[doc = "Checks if the value of the field is `_0`"]
341    #[inline(always)]
342    pub fn is_0(&self) -> bool {
343        *self == OVIE_A::_0
344    }
345    #[doc = "Checks if the value of the field is `_1`"]
346    #[inline(always)]
347    pub fn is_1(&self) -> bool {
348        *self == OVIE_A::_1
349    }
350}
351#[doc = "Field `OVIE` writer - Overrun Interrupt Enable"]
352pub type OVIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, PCCR0_SPEC, OVIE_A, O>;
353impl<'a, const O: u8> OVIE_W<'a, O> {
354    #[doc = "Generation of overrun interrupt requests is disabled."]
355    #[inline(always)]
356    pub fn _0(self) -> &'a mut W {
357        self.variant(OVIE_A::_0)
358    }
359    #[doc = "Generation of overrun interrupt requests is enabled."]
360    #[inline(always)]
361    pub fn _1(self) -> &'a mut W {
362        self.variant(OVIE_A::_1)
363    }
364}
365#[doc = "Field `UDRIE` reader - Underrun Interrupt Enable"]
366pub type UDRIE_R = crate::BitReader<UDRIE_A>;
367#[doc = "Underrun Interrupt Enable\n\nValue on reset: 0"]
368#[derive(Clone, Copy, Debug, PartialEq, Eq)]
369pub enum UDRIE_A {
370    #[doc = "0: Generation of underrun interrupt requests is disabled."]
371    _0 = 0,
372    #[doc = "1: Generation of underrun interrupt requests is enabled."]
373    _1 = 1,
374}
375impl From<UDRIE_A> for bool {
376    #[inline(always)]
377    fn from(variant: UDRIE_A) -> Self {
378        variant as u8 != 0
379    }
380}
381impl UDRIE_R {
382    #[doc = "Get enumerated values variant"]
383    #[inline(always)]
384    pub fn variant(&self) -> UDRIE_A {
385        match self.bits {
386            false => UDRIE_A::_0,
387            true => UDRIE_A::_1,
388        }
389    }
390    #[doc = "Checks if the value of the field is `_0`"]
391    #[inline(always)]
392    pub fn is_0(&self) -> bool {
393        *self == UDRIE_A::_0
394    }
395    #[doc = "Checks if the value of the field is `_1`"]
396    #[inline(always)]
397    pub fn is_1(&self) -> bool {
398        *self == UDRIE_A::_1
399    }
400}
401#[doc = "Field `UDRIE` writer - Underrun Interrupt Enable"]
402pub type UDRIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, PCCR0_SPEC, UDRIE_A, O>;
403impl<'a, const O: u8> UDRIE_W<'a, O> {
404    #[doc = "Generation of underrun interrupt requests is disabled."]
405    #[inline(always)]
406    pub fn _0(self) -> &'a mut W {
407        self.variant(UDRIE_A::_0)
408    }
409    #[doc = "Generation of underrun interrupt requests is enabled."]
410    #[inline(always)]
411    pub fn _1(self) -> &'a mut W {
412        self.variant(UDRIE_A::_1)
413    }
414}
415#[doc = "Field `VERIE` reader - Vertical Line Number Setting Error Interrupt Enable"]
416pub type VERIE_R = crate::BitReader<VERIE_A>;
417#[doc = "Vertical Line Number Setting Error Interrupt Enable\n\nValue on reset: 0"]
418#[derive(Clone, Copy, Debug, PartialEq, Eq)]
419pub enum VERIE_A {
420    #[doc = "0: Generation of vertical line number setting error interrupt requests is disabled."]
421    _0 = 0,
422    #[doc = "1: Generation of vertical line number setting error interrupt requests is enabled."]
423    _1 = 1,
424}
425impl From<VERIE_A> for bool {
426    #[inline(always)]
427    fn from(variant: VERIE_A) -> Self {
428        variant as u8 != 0
429    }
430}
431impl VERIE_R {
432    #[doc = "Get enumerated values variant"]
433    #[inline(always)]
434    pub fn variant(&self) -> VERIE_A {
435        match self.bits {
436            false => VERIE_A::_0,
437            true => VERIE_A::_1,
438        }
439    }
440    #[doc = "Checks if the value of the field is `_0`"]
441    #[inline(always)]
442    pub fn is_0(&self) -> bool {
443        *self == VERIE_A::_0
444    }
445    #[doc = "Checks if the value of the field is `_1`"]
446    #[inline(always)]
447    pub fn is_1(&self) -> bool {
448        *self == VERIE_A::_1
449    }
450}
451#[doc = "Field `VERIE` writer - Vertical Line Number Setting Error Interrupt Enable"]
452pub type VERIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, PCCR0_SPEC, VERIE_A, O>;
453impl<'a, const O: u8> VERIE_W<'a, O> {
454    #[doc = "Generation of vertical line number setting error interrupt requests is disabled."]
455    #[inline(always)]
456    pub fn _0(self) -> &'a mut W {
457        self.variant(VERIE_A::_0)
458    }
459    #[doc = "Generation of vertical line number setting error interrupt requests is enabled."]
460    #[inline(always)]
461    pub fn _1(self) -> &'a mut W {
462        self.variant(VERIE_A::_1)
463    }
464}
465#[doc = "Field `HERIE` reader - Horizontal Byte Number Setting Error Interrupt Enable"]
466pub type HERIE_R = crate::BitReader<HERIE_A>;
467#[doc = "Horizontal Byte Number Setting Error Interrupt Enable\n\nValue on reset: 0"]
468#[derive(Clone, Copy, Debug, PartialEq, Eq)]
469pub enum HERIE_A {
470    #[doc = "0: Generation of horizontal byte number setting error interrupt requests is disabled."]
471    _0 = 0,
472    #[doc = "1: Generation of horizontal byte number setting error interrupt requests is enabled."]
473    _1 = 1,
474}
475impl From<HERIE_A> for bool {
476    #[inline(always)]
477    fn from(variant: HERIE_A) -> Self {
478        variant as u8 != 0
479    }
480}
481impl HERIE_R {
482    #[doc = "Get enumerated values variant"]
483    #[inline(always)]
484    pub fn variant(&self) -> HERIE_A {
485        match self.bits {
486            false => HERIE_A::_0,
487            true => HERIE_A::_1,
488        }
489    }
490    #[doc = "Checks if the value of the field is `_0`"]
491    #[inline(always)]
492    pub fn is_0(&self) -> bool {
493        *self == HERIE_A::_0
494    }
495    #[doc = "Checks if the value of the field is `_1`"]
496    #[inline(always)]
497    pub fn is_1(&self) -> bool {
498        *self == HERIE_A::_1
499    }
500}
501#[doc = "Field `HERIE` writer - Horizontal Byte Number Setting Error Interrupt Enable"]
502pub type HERIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, PCCR0_SPEC, HERIE_A, O>;
503impl<'a, const O: u8> HERIE_W<'a, O> {
504    #[doc = "Generation of horizontal byte number setting error interrupt requests is disabled."]
505    #[inline(always)]
506    pub fn _0(self) -> &'a mut W {
507        self.variant(HERIE_A::_0)
508    }
509    #[doc = "Generation of horizontal byte number setting error interrupt requests is enabled."]
510    #[inline(always)]
511    pub fn _1(self) -> &'a mut W {
512        self.variant(HERIE_A::_1)
513    }
514}
515#[doc = "Field `PCKOE` reader - PCKO Output Enable"]
516pub type PCKOE_R = crate::BitReader<PCKOE_A>;
517#[doc = "PCKO Output Enable\n\nValue on reset: 0"]
518#[derive(Clone, Copy, Debug, PartialEq, Eq)]
519pub enum PCKOE_A {
520    #[doc = "0: PCKO output is disabled (fixed to the high level)"]
521    _0 = 0,
522    #[doc = "1: PCKO output is enabled."]
523    _1 = 1,
524}
525impl From<PCKOE_A> for bool {
526    #[inline(always)]
527    fn from(variant: PCKOE_A) -> Self {
528        variant as u8 != 0
529    }
530}
531impl PCKOE_R {
532    #[doc = "Get enumerated values variant"]
533    #[inline(always)]
534    pub fn variant(&self) -> PCKOE_A {
535        match self.bits {
536            false => PCKOE_A::_0,
537            true => PCKOE_A::_1,
538        }
539    }
540    #[doc = "Checks if the value of the field is `_0`"]
541    #[inline(always)]
542    pub fn is_0(&self) -> bool {
543        *self == PCKOE_A::_0
544    }
545    #[doc = "Checks if the value of the field is `_1`"]
546    #[inline(always)]
547    pub fn is_1(&self) -> bool {
548        *self == PCKOE_A::_1
549    }
550}
551#[doc = "Field `PCKOE` writer - PCKO Output Enable"]
552pub type PCKOE_W<'a, const O: u8> = crate::BitWriter<'a, u32, PCCR0_SPEC, PCKOE_A, O>;
553impl<'a, const O: u8> PCKOE_W<'a, O> {
554    #[doc = "PCKO output is disabled (fixed to the high level)"]
555    #[inline(always)]
556    pub fn _0(self) -> &'a mut W {
557        self.variant(PCKOE_A::_0)
558    }
559    #[doc = "PCKO output is enabled."]
560    #[inline(always)]
561    pub fn _1(self) -> &'a mut W {
562        self.variant(PCKOE_A::_1)
563    }
564}
565#[doc = "Field `PCKDIV` reader - PCKO Frequency Division Ratio Select"]
566pub type PCKDIV_R = crate::FieldReader<u8, PCKDIV_A>;
567#[doc = "PCKO Frequency Division Ratio Select\n\nValue on reset: 0"]
568#[derive(Clone, Copy, Debug, PartialEq, Eq)]
569#[repr(u8)]
570pub enum PCKDIV_A {
571    #[doc = "0: PCKO/2"]
572    _000 = 0,
573    #[doc = "1: PCKO/4"]
574    _001 = 1,
575    #[doc = "2: PCKO/6"]
576    _010 = 2,
577    #[doc = "3: PCKO/8"]
578    _011 = 3,
579    #[doc = "4: PCKO/10"]
580    _100 = 4,
581    #[doc = "5: PCKO/12"]
582    _101 = 5,
583    #[doc = "6: PCKO/14"]
584    _110 = 6,
585    #[doc = "7: PCKO/16"]
586    _111 = 7,
587}
588impl From<PCKDIV_A> for u8 {
589    #[inline(always)]
590    fn from(variant: PCKDIV_A) -> Self {
591        variant as _
592    }
593}
594impl PCKDIV_R {
595    #[doc = "Get enumerated values variant"]
596    #[inline(always)]
597    pub fn variant(&self) -> PCKDIV_A {
598        match self.bits {
599            0 => PCKDIV_A::_000,
600            1 => PCKDIV_A::_001,
601            2 => PCKDIV_A::_010,
602            3 => PCKDIV_A::_011,
603            4 => PCKDIV_A::_100,
604            5 => PCKDIV_A::_101,
605            6 => PCKDIV_A::_110,
606            7 => PCKDIV_A::_111,
607            _ => unreachable!(),
608        }
609    }
610    #[doc = "Checks if the value of the field is `_000`"]
611    #[inline(always)]
612    pub fn is_000(&self) -> bool {
613        *self == PCKDIV_A::_000
614    }
615    #[doc = "Checks if the value of the field is `_001`"]
616    #[inline(always)]
617    pub fn is_001(&self) -> bool {
618        *self == PCKDIV_A::_001
619    }
620    #[doc = "Checks if the value of the field is `_010`"]
621    #[inline(always)]
622    pub fn is_010(&self) -> bool {
623        *self == PCKDIV_A::_010
624    }
625    #[doc = "Checks if the value of the field is `_011`"]
626    #[inline(always)]
627    pub fn is_011(&self) -> bool {
628        *self == PCKDIV_A::_011
629    }
630    #[doc = "Checks if the value of the field is `_100`"]
631    #[inline(always)]
632    pub fn is_100(&self) -> bool {
633        *self == PCKDIV_A::_100
634    }
635    #[doc = "Checks if the value of the field is `_101`"]
636    #[inline(always)]
637    pub fn is_101(&self) -> bool {
638        *self == PCKDIV_A::_101
639    }
640    #[doc = "Checks if the value of the field is `_110`"]
641    #[inline(always)]
642    pub fn is_110(&self) -> bool {
643        *self == PCKDIV_A::_110
644    }
645    #[doc = "Checks if the value of the field is `_111`"]
646    #[inline(always)]
647    pub fn is_111(&self) -> bool {
648        *self == PCKDIV_A::_111
649    }
650}
651#[doc = "Field `PCKDIV` writer - PCKO Frequency Division Ratio Select"]
652pub type PCKDIV_W<'a, const O: u8> =
653    crate::FieldWriterSafe<'a, u32, PCCR0_SPEC, u8, PCKDIV_A, 3, O>;
654impl<'a, const O: u8> PCKDIV_W<'a, O> {
655    #[doc = "PCKO/2"]
656    #[inline(always)]
657    pub fn _000(self) -> &'a mut W {
658        self.variant(PCKDIV_A::_000)
659    }
660    #[doc = "PCKO/4"]
661    #[inline(always)]
662    pub fn _001(self) -> &'a mut W {
663        self.variant(PCKDIV_A::_001)
664    }
665    #[doc = "PCKO/6"]
666    #[inline(always)]
667    pub fn _010(self) -> &'a mut W {
668        self.variant(PCKDIV_A::_010)
669    }
670    #[doc = "PCKO/8"]
671    #[inline(always)]
672    pub fn _011(self) -> &'a mut W {
673        self.variant(PCKDIV_A::_011)
674    }
675    #[doc = "PCKO/10"]
676    #[inline(always)]
677    pub fn _100(self) -> &'a mut W {
678        self.variant(PCKDIV_A::_100)
679    }
680    #[doc = "PCKO/12"]
681    #[inline(always)]
682    pub fn _101(self) -> &'a mut W {
683        self.variant(PCKDIV_A::_101)
684    }
685    #[doc = "PCKO/14"]
686    #[inline(always)]
687    pub fn _110(self) -> &'a mut W {
688        self.variant(PCKDIV_A::_110)
689    }
690    #[doc = "PCKO/16"]
691    #[inline(always)]
692    pub fn _111(self) -> &'a mut W {
693        self.variant(PCKDIV_A::_111)
694    }
695}
696#[doc = "Field `EDS` reader - Endian Select"]
697pub type EDS_R = crate::BitReader<EDS_A>;
698#[doc = "Endian Select\n\nValue on reset: 0"]
699#[derive(Clone, Copy, Debug, PartialEq, Eq)]
700pub enum EDS_A {
701    #[doc = "0: Little endian"]
702    _0 = 0,
703    #[doc = "1: Big endian"]
704    _1 = 1,
705}
706impl From<EDS_A> for bool {
707    #[inline(always)]
708    fn from(variant: EDS_A) -> Self {
709        variant as u8 != 0
710    }
711}
712impl EDS_R {
713    #[doc = "Get enumerated values variant"]
714    #[inline(always)]
715    pub fn variant(&self) -> EDS_A {
716        match self.bits {
717            false => EDS_A::_0,
718            true => EDS_A::_1,
719        }
720    }
721    #[doc = "Checks if the value of the field is `_0`"]
722    #[inline(always)]
723    pub fn is_0(&self) -> bool {
724        *self == EDS_A::_0
725    }
726    #[doc = "Checks if the value of the field is `_1`"]
727    #[inline(always)]
728    pub fn is_1(&self) -> bool {
729        *self == EDS_A::_1
730    }
731}
732#[doc = "Field `EDS` writer - Endian Select"]
733pub type EDS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PCCR0_SPEC, EDS_A, O>;
734impl<'a, const O: u8> EDS_W<'a, O> {
735    #[doc = "Little endian"]
736    #[inline(always)]
737    pub fn _0(self) -> &'a mut W {
738        self.variant(EDS_A::_0)
739    }
740    #[doc = "Big endian"]
741    #[inline(always)]
742    pub fn _1(self) -> &'a mut W {
743        self.variant(EDS_A::_1)
744    }
745}
746impl R {
747    #[doc = "Bit 0 - Channel 0 GTCNT Count Clear"]
748    #[inline(always)]
749    pub fn pcke(&self) -> PCKE_R {
750        PCKE_R::new((self.bits & 1) != 0)
751    }
752    #[doc = "Bit 1 - VSYNC Signal Polarity Select"]
753    #[inline(always)]
754    pub fn vps(&self) -> VPS_R {
755        VPS_R::new(((self.bits >> 1) & 1) != 0)
756    }
757    #[doc = "Bit 2 - HSYNC Signal Polarity Select"]
758    #[inline(always)]
759    pub fn hps(&self) -> HPS_R {
760        HPS_R::new(((self.bits >> 2) & 1) != 0)
761    }
762    #[doc = "Bit 4 - Receive Data Ready Interrupt Enable"]
763    #[inline(always)]
764    pub fn dfie(&self) -> DFIE_R {
765        DFIE_R::new(((self.bits >> 4) & 1) != 0)
766    }
767    #[doc = "Bit 5 - Frame End Interrupt Enable"]
768    #[inline(always)]
769    pub fn feie(&self) -> FEIE_R {
770        FEIE_R::new(((self.bits >> 5) & 1) != 0)
771    }
772    #[doc = "Bit 6 - Overrun Interrupt Enable"]
773    #[inline(always)]
774    pub fn ovie(&self) -> OVIE_R {
775        OVIE_R::new(((self.bits >> 6) & 1) != 0)
776    }
777    #[doc = "Bit 7 - Underrun Interrupt Enable"]
778    #[inline(always)]
779    pub fn udrie(&self) -> UDRIE_R {
780        UDRIE_R::new(((self.bits >> 7) & 1) != 0)
781    }
782    #[doc = "Bit 8 - Vertical Line Number Setting Error Interrupt Enable"]
783    #[inline(always)]
784    pub fn verie(&self) -> VERIE_R {
785        VERIE_R::new(((self.bits >> 8) & 1) != 0)
786    }
787    #[doc = "Bit 9 - Horizontal Byte Number Setting Error Interrupt Enable"]
788    #[inline(always)]
789    pub fn herie(&self) -> HERIE_R {
790        HERIE_R::new(((self.bits >> 9) & 1) != 0)
791    }
792    #[doc = "Bit 10 - PCKO Output Enable"]
793    #[inline(always)]
794    pub fn pckoe(&self) -> PCKOE_R {
795        PCKOE_R::new(((self.bits >> 10) & 1) != 0)
796    }
797    #[doc = "Bits 11:13 - PCKO Frequency Division Ratio Select"]
798    #[inline(always)]
799    pub fn pckdiv(&self) -> PCKDIV_R {
800        PCKDIV_R::new(((self.bits >> 11) & 7) as u8)
801    }
802    #[doc = "Bit 14 - Endian Select"]
803    #[inline(always)]
804    pub fn eds(&self) -> EDS_R {
805        EDS_R::new(((self.bits >> 14) & 1) != 0)
806    }
807}
808impl W {
809    #[doc = "Bit 0 - Channel 0 GTCNT Count Clear"]
810    #[inline(always)]
811    #[must_use]
812    pub fn pcke(&mut self) -> PCKE_W<0> {
813        PCKE_W::new(self)
814    }
815    #[doc = "Bit 1 - VSYNC Signal Polarity Select"]
816    #[inline(always)]
817    #[must_use]
818    pub fn vps(&mut self) -> VPS_W<1> {
819        VPS_W::new(self)
820    }
821    #[doc = "Bit 2 - HSYNC Signal Polarity Select"]
822    #[inline(always)]
823    #[must_use]
824    pub fn hps(&mut self) -> HPS_W<2> {
825        HPS_W::new(self)
826    }
827    #[doc = "Bit 3 - PDC Reset"]
828    #[inline(always)]
829    #[must_use]
830    pub fn prst(&mut self) -> PRST_W<3> {
831        PRST_W::new(self)
832    }
833    #[doc = "Bit 4 - Receive Data Ready Interrupt Enable"]
834    #[inline(always)]
835    #[must_use]
836    pub fn dfie(&mut self) -> DFIE_W<4> {
837        DFIE_W::new(self)
838    }
839    #[doc = "Bit 5 - Frame End Interrupt Enable"]
840    #[inline(always)]
841    #[must_use]
842    pub fn feie(&mut self) -> FEIE_W<5> {
843        FEIE_W::new(self)
844    }
845    #[doc = "Bit 6 - Overrun Interrupt Enable"]
846    #[inline(always)]
847    #[must_use]
848    pub fn ovie(&mut self) -> OVIE_W<6> {
849        OVIE_W::new(self)
850    }
851    #[doc = "Bit 7 - Underrun Interrupt Enable"]
852    #[inline(always)]
853    #[must_use]
854    pub fn udrie(&mut self) -> UDRIE_W<7> {
855        UDRIE_W::new(self)
856    }
857    #[doc = "Bit 8 - Vertical Line Number Setting Error Interrupt Enable"]
858    #[inline(always)]
859    #[must_use]
860    pub fn verie(&mut self) -> VERIE_W<8> {
861        VERIE_W::new(self)
862    }
863    #[doc = "Bit 9 - Horizontal Byte Number Setting Error Interrupt Enable"]
864    #[inline(always)]
865    #[must_use]
866    pub fn herie(&mut self) -> HERIE_W<9> {
867        HERIE_W::new(self)
868    }
869    #[doc = "Bit 10 - PCKO Output Enable"]
870    #[inline(always)]
871    #[must_use]
872    pub fn pckoe(&mut self) -> PCKOE_W<10> {
873        PCKOE_W::new(self)
874    }
875    #[doc = "Bits 11:13 - PCKO Frequency Division Ratio Select"]
876    #[inline(always)]
877    #[must_use]
878    pub fn pckdiv(&mut self) -> PCKDIV_W<11> {
879        PCKDIV_W::new(self)
880    }
881    #[doc = "Bit 14 - Endian Select"]
882    #[inline(always)]
883    #[must_use]
884    pub fn eds(&mut self) -> EDS_W<14> {
885        EDS_W::new(self)
886    }
887    #[doc = "Writes raw bits to the register."]
888    #[inline(always)]
889    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
890        self.0.bits(bits);
891        self
892    }
893}
894#[doc = "PDC Control Register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pccr0](index.html) module"]
895pub struct PCCR0_SPEC;
896impl crate::RegisterSpec for PCCR0_SPEC {
897    type Ux = u32;
898}
899#[doc = "`read()` method returns [pccr0::R](R) reader structure"]
900impl crate::Readable for PCCR0_SPEC {
901    type Reader = R;
902}
903#[doc = "`write(|w| ..)` method takes [pccr0::W](W) writer structure"]
904impl crate::Writable for PCCR0_SPEC {
905    type Writer = W;
906    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
907    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
908}
909#[doc = "`reset()` method sets PCCR0 to value 0"]
910impl crate::Resettable for PCCR0_SPEC {
911    const RESET_VALUE: Self::Ux = 0;
912}
ra6m3/pdc/pccr0.rs

ra6m3/pdc/
pccr0.rs
