1#[doc = "Register `SDCCR` reader"]
2pub struct R(crate::R<SDCCR_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SDCCR_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SDCCR_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SDCCR_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `SDCCR` writer"]
17pub struct W(crate::W<SDCCR_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SDCCR_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SDCCR_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SDCCR_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `EXENB` reader - Operation Enable"]
38pub type EXENB_R = crate::BitReader<EXENB_A>;
39#[doc = "Operation Enable\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum EXENB_A {
42 #[doc = "0: Disable"]
43 _0 = 0,
44 #[doc = "1: Enable"]
45 _1 = 1,
46}
47impl From<EXENB_A> for bool {
48 #[inline(always)]
49 fn from(variant: EXENB_A) -> Self {
50 variant as u8 != 0
51 }
52}
53impl EXENB_R {
54 #[doc = "Get enumerated values variant"]
55 #[inline(always)]
56 pub fn variant(&self) -> EXENB_A {
57 match self.bits {
58 false => EXENB_A::_0,
59 true => EXENB_A::_1,
60 }
61 }
62 #[doc = "Checks if the value of the field is `_0`"]
63 #[inline(always)]
64 pub fn is_0(&self) -> bool {
65 *self == EXENB_A::_0
66 }
67 #[doc = "Checks if the value of the field is `_1`"]
68 #[inline(always)]
69 pub fn is_1(&self) -> bool {
70 *self == EXENB_A::_1
71 }
72}
73#[doc = "Field `EXENB` writer - Operation Enable"]
74pub type EXENB_W<'a, const O: u8> = crate::BitWriter<'a, u8, SDCCR_SPEC, EXENB_A, O>;
75impl<'a, const O: u8> EXENB_W<'a, O> {
76 #[doc = "Disable"]
77 #[inline(always)]
78 pub fn _0(self) -> &'a mut W {
79 self.variant(EXENB_A::_0)
80 }
81 #[doc = "Enable"]
82 #[inline(always)]
83 pub fn _1(self) -> &'a mut W {
84 self.variant(EXENB_A::_1)
85 }
86}
87#[doc = "Field `BSIZE` reader - SDRAM Bus Width Select"]
88pub type BSIZE_R = crate::FieldReader<u8, BSIZE_A>;
89#[doc = "SDRAM Bus Width Select\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91#[repr(u8)]
92pub enum BSIZE_A {
93 #[doc = "0: A 16-bit bus space"]
94 _00 = 0,
95 #[doc = "1: Setting prohibited"]
96 _01 = 1,
97 #[doc = "2: An 8-bit bus space"]
98 _10 = 2,
99 #[doc = "3: Setting prohibited"]
100 _11 = 3,
101}
102impl From<BSIZE_A> for u8 {
103 #[inline(always)]
104 fn from(variant: BSIZE_A) -> Self {
105 variant as _
106 }
107}
108impl BSIZE_R {
109 #[doc = "Get enumerated values variant"]
110 #[inline(always)]
111 pub fn variant(&self) -> BSIZE_A {
112 match self.bits {
113 0 => BSIZE_A::_00,
114 1 => BSIZE_A::_01,
115 2 => BSIZE_A::_10,
116 3 => BSIZE_A::_11,
117 _ => unreachable!(),
118 }
119 }
120 #[doc = "Checks if the value of the field is `_00`"]
121 #[inline(always)]
122 pub fn is_00(&self) -> bool {
123 *self == BSIZE_A::_00
124 }
125 #[doc = "Checks if the value of the field is `_01`"]
126 #[inline(always)]
127 pub fn is_01(&self) -> bool {
128 *self == BSIZE_A::_01
129 }
130 #[doc = "Checks if the value of the field is `_10`"]
131 #[inline(always)]
132 pub fn is_10(&self) -> bool {
133 *self == BSIZE_A::_10
134 }
135 #[doc = "Checks if the value of the field is `_11`"]
136 #[inline(always)]
137 pub fn is_11(&self) -> bool {
138 *self == BSIZE_A::_11
139 }
140}
141#[doc = "Field `BSIZE` writer - SDRAM Bus Width Select"]
142pub type BSIZE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u8, SDCCR_SPEC, u8, BSIZE_A, 2, O>;
143impl<'a, const O: u8> BSIZE_W<'a, O> {
144 #[doc = "A 16-bit bus space"]
145 #[inline(always)]
146 pub fn _00(self) -> &'a mut W {
147 self.variant(BSIZE_A::_00)
148 }
149 #[doc = "Setting prohibited"]
150 #[inline(always)]
151 pub fn _01(self) -> &'a mut W {
152 self.variant(BSIZE_A::_01)
153 }
154 #[doc = "An 8-bit bus space"]
155 #[inline(always)]
156 pub fn _10(self) -> &'a mut W {
157 self.variant(BSIZE_A::_10)
158 }
159 #[doc = "Setting prohibited"]
160 #[inline(always)]
161 pub fn _11(self) -> &'a mut W {
162 self.variant(BSIZE_A::_11)
163 }
164}
165impl R {
166 #[doc = "Bit 0 - Operation Enable"]
167 #[inline(always)]
168 pub fn exenb(&self) -> EXENB_R {
169 EXENB_R::new((self.bits & 1) != 0)
170 }
171 #[doc = "Bits 4:5 - SDRAM Bus Width Select"]
172 #[inline(always)]
173 pub fn bsize(&self) -> BSIZE_R {
174 BSIZE_R::new((self.bits >> 4) & 3)
175 }
176}
177impl W {
178 #[doc = "Bit 0 - Operation Enable"]
179 #[inline(always)]
180 #[must_use]
181 pub fn exenb(&mut self) -> EXENB_W<0> {
182 EXENB_W::new(self)
183 }
184 #[doc = "Bits 4:5 - SDRAM Bus Width Select"]
185 #[inline(always)]
186 #[must_use]
187 pub fn bsize(&mut self) -> BSIZE_W<4> {
188 BSIZE_W::new(self)
189 }
190 #[doc = "Writes raw bits to the register."]
191 #[inline(always)]
192 pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
193 self.0.bits(bits);
194 self
195 }
196}
197#[doc = "SDC Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sdccr](index.html) module"]
198pub struct SDCCR_SPEC;
199impl crate::RegisterSpec for SDCCR_SPEC {
200 type Ux = u8;
201}
202#[doc = "`read()` method returns [sdccr::R](R) reader structure"]
203impl crate::Readable for SDCCR_SPEC {
204 type Reader = R;
205}
206#[doc = "`write(|w| ..)` method takes [sdccr::W](W) writer structure"]
207impl crate::Writable for SDCCR_SPEC {
208 type Writer = W;
209 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
210 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
211}
212#[doc = "`reset()` method sets SDCCR to value 0"]
213impl crate::Resettable for SDCCR_SPEC {
214 const RESET_VALUE: Self::Ux = 0;
215}